;	[]===========================================================[]
;
;	NOTICE: THIS PROGRAM BELONGS TO AWARD SOFTWARE INTERNATIONAL(R)
;	        INC. IT IS CONSIDERED A TRADE SECRET AND IS NOT TO BE 	
;	        DIVULGED OR USED BY PARTIES WHO HAVE NOT RECEIVED	
;	        WRITTEN AUTHORIZATION FROM THE OWNER.
;
; 	[]===========================================================[]
; 									
;----------------------------------------------------------------------------
;Rev	Date	 Name	Description
;----------------------------------------------------------------------------


;---------------------------------------
KB	equ	1024			
MB	equ	(KB*KB)			
;---------------------------------------

;**************************************************
;	Equates for K7 MSRs
;**************************************************
MCG_CTL			EQU	00000017Bh		;
MC2_CTL			EQU	000000408h
SYS_CFG			EQU	0C0010010h
K7_SysCfg_Reg		EQU     SYS_CFG			;
HWCR			EQU	0C0010015h
TOP_MEM			EQU	0C001001Ah
CLK_CTL			EQU	0C001001Bh
L2_CFG			EQU	0C001001Ch
SysBus_ConfigBase	EQU	0C0010101h
SMMLocalAddr		EQU	0C0010112h		;
SMMDestAddr		EQU	0C0010113h		;
SMM_BASE		equ	0c0010111h		;new in K7-Bx
SMMADDRHL		equ	0c0010112h		;new in K7-Bx
SMMMASKHL		equ	0c0010113h		;new in K7-Bx
SysBus_Special1QW	EQU	0C0010115h

;**************************************************
;moved from e0post.asm.
;**************************************************
K7_MSR_En_CMOS	EQU     50h				;#
K7_start_CMOS   EQU     53h				;#

;==================================================
;	Equates for SYS_CFG
;==================================================
MtrrFixDramEn		EQU	00040000h	;(18) 1 = enables fixed_MTRR RDMEM/WRMEM mechanism
MtrrFixDramModEn	EQU 	00080000h	;(19) 1 = enables R/W of RDMEM/WRMEM bits
MtrrVarDramEn		EQU 	00100000h	;(20) 1 = enables TOM_MEM register

;==================================================
;	Equates for MTRRs
;==================================================
; variable range MTRRs				
MTRRphysBase0		equ	00000200h	;
MTRRphysMask0		equ	00000201h	;
MTRRphysBase1		equ	00000202h	;
MTRRphysMask1		equ	00000203h	;
MTRRphysBase2		equ	00000204h	;
MTRRphysMask2		equ	00000205h	;
MTRRphysBase3		equ	00000206h	;
MTRRphysMask3		equ	00000207h	;
MTRRphysBase4		equ	00000208h	;
MTRRphysMask4		equ	00000209h	;
MTRRphysBase5		equ	0000020Ah	;
MTRRphysMask5		equ	0000020Bh	;
MTRRphysBase6		equ	0000020Ch	;
MTRRphysMask6		equ	0000020Dh	;
MTRRphysBase7		equ	0000020Eh	;
MTRRphysMask7		equ	0000020Fh	;
						
; fixed range MTRRs (8 ranges ea, 1 MT byte/range)
MTRRfix64k_0000 	equ	00000250h	;
MTRRfix16k_8000 	equ	00000258h	;
MTRRfix16k_A000 	equ	00000259h	;
MTRRfix4k_C000 		equ	00000268h	;
MTRRfix4k_C800 		equ	00000269h	;
MTRRfix4k_D000 		equ	0000026Ah	;
MTRRfix4k_D800 		equ	0000026Bh	;
MTRRfix4k_E000 		equ	0000026Ch	;
MTRRfix4k_E800 		equ	0000026Dh	;
MTRRfix4k_F000 		equ	0000026Eh	;
MTRRfix4k_F800 		equ	0000026Fh	;
						
; default type reg				
MTRRdefType		equ	000002FFh	;
  MTRR_E		 equ 0000100000000000b	;[11] MTRRs Enabled
  MTRR_FE		 equ 0000010000000000b	;[10] MTRR Fixed Range Enabled
						
; Fixed MTRR Memory Type definitions				
  MTUC  		equ	0		;Uncachable region
  MTWC  		equ	1		;Write Combining
  MTWT  		equ	4		;Write Thru
  MTWP  		equ	5		;Write Protect
  MTWB  		equ	6		;Write Back
  MT_RDMEM		equ	00010000b	;
  MT_WRMEM		equ	00001000b	;
  MTUCdword  		equ	00000000h	;# I/O-UC
  MTWBRWdword  		equ	1E1E1E1Eh	;# Memory-WB-RW

; Variable MTRR Memory Type definitions				
  MTWCdword  		equ	01010101h	;# Memory-WC
  MTWTdword  		equ	04040404h	;# Memory-WT
  MTWPdword  		equ	05050505h	;# Memory-WP
  MTWBdword  		equ	06060606h	;# Memory-WB

;==================================================
;	Equates for HWCR
;==================================================
L2FE		EQU	00000800h

;**************************************************
;	Misc
;**************************************************
Lo4byte			EQU	0000h	;AMD DS071398
Hi4byte			EQU	1000h	;AMD DS071398

MemWBrw			EQU	1E1E1E1Eh   ;AMD DS072998
MemWPr                  EQU     15151515h   ;AMD DS072998

;**************************************************
;	Macros for MSR read/write
;**************************************************

RDMSR_K7	macro	k7_msr
    IFNB <k7_msr>
	mov	ecx,k7_msr
    ENDIF
	RDMSR
	endm

WRMSR_K7	macro	k7_msr
    IFNB <k7_msr>
	mov	ecx,k7_msr
    ENDIF
	WRMSR
	endm

WAIT_SYSCLK	macro	count
	LOCAL	WS0
	mov	cx,count
WS0:
	newiodelay
	loop	WS0
	endm

K7_CPUID macro	cpuidindex
    IFNB <cpuidindex>
	mov	eax, cpuidindex
    ENDIF
	db	0Fh, 0A2h	; {eax,ebx,ecx,edx} <-- CPUID Fn[eax] 
	endm