; []===========================================================[] ; ; NOTICE: THIS PROGRAM BELONGS TO AWARD SOFTWARE INTERNATIONAL(R) ; INC. IT IS CONSIDERED A TRADE SECRET AND IS NOT TO BE ; DIVULGED OR USED BY PARTIES WHO HAVE NOT RECEIVED ; WRITTEN AUTHORIZATION FROM THE OWNER. ; ; []===========================================================[] ; ;Note : this file is include in bootrom.asm for compressed code ;---------------------------------------------------------------------------- ;Rev Date Name Description ;---------------------------------------------------------------------------- ;R122 03/23/98 GAR Add W83977CTF ;R121 03/22/99 KGN Add code for SMC37N869 can use LPT port debug ;R120 02/10/99 GAR Add Ali5113B ;R119 01/25/99 GAR Ali513xB can not enable hardware Fast A20 ;R118 01/21/99 GAR Add watch dog of W83977 ;R117 01/19/99 GAR Ali513x and Ali513xB use Ali513xF code ;R116 01/12/99 GAR added SMC37M81X ;R114A 01/06/99 RCH Fixed A20 failure of HIMEM.SYS for SMC47B27x LPC ; super I/O. ;R115 12/29/98 GAR Move code about ITE8661 and SIS6801 to ITE8661.EIO ;R114 12/09/98 TNY Add "Use_2eh" option. ;R113 11/17/98 GAR Move code about NS309/NS351 to NS309.EIO ;R112 11/12/98 GAR Move code about NS307/NS308/NS317 to NS307.EIO ;R111 11/05/98 GAR Add code for fan controller of NS351 ;R110 10/28/98 GAR Rewirte NS351 and NS309 code for gpio function ;R109 10/22/98 GAR Add code about ITE8673 and ITE8693 ;R75A 09/24/98 KGN Remove this code to local chiprun ;R108 08/10/98 RCH Enable Parallel port earlier for POST output for ; ALi513xF & Winbond 977TF super I/O. ;R58A 08/04/98 RIC Support VIA VT596 new SouthBridge SD Bus. ;R107 07/20/98 GAR Add "Enable_W83977ATF_SERIRQ" for W83977ATF serial ; IRQ ;R106 07/15/98 GAR Enable the generation og an nSMI due to IRQ of Mouse, ; KBC, Printer, FDC, UartA or UartB ;R105 07/15/98 GAR Add for W83977 FDC DMA mode default Burst mode ;R104 07/13/98 GAR When define "Use_GP25", the pin, GA20/GP25, wasn't set ; to GA20 ;R103 07/13/98 RCH Program 0E8H register of W977 to support GP20 or ; KBRST(P20). ;R102 07/07/98 GAR Add W83977EF ;R101a 07/07/98 KNH Cancel R101 ;R101 07/03/98 KNH Control W977 GP25 as Hi ;R100 07/01/98 RCH Don't set Pin 103 to PLED too early to have normal ; LED output for power indicator. ;R99 07/01/98 GAR Add "NO_USE_FDD" for Ali5123 ;R98 05/27/98 LAW add support NS351 ;R97 05/11/98 LAW added for "Secondary_IO_Use" must disable some function ; (like KBC, KBM, FDC ....) ;R96 05/11/98 LAW define "Always_Use_370H" for fixed some environment have ; problem (W83977TF, W83977AF, W83977ATF) ;R95 05/06/98 GAR added SIS6801 ;R94 04/17/98 LAW added SMC37M70X ;R92A 04/08/98 LAW added "Use_DMA_012_Routing" for some MB use Special DMA ; Routing (now for SMC37C67X and W83977TF) ;R93 03/31/98 LAW fixed NS PC97317 power on reset cann't clean APC rigister ; so ATX power control fail ;R92 03/04/98 LAW added "Use_DMA_012_Routing" for some MB use Special DMA ; Routing (now for SMC37C67X) ;R91 03/03/98 LAW added NS317 "SUPPORT_NET_ON" ;R90 03/02/98 LAW move SMC67X set powercontrol to superio, because some ; MB hang up at here ;R89 02/19/98 LAW added NS317 "ACPI_SUPPORT" ;R88 02/17/98 LAW Cancel "KeyLock_Use_Pin" xchange to "KeyLock_Use_GPIO" ; because ITE8671/ITE8681 GPIO PIN change ;R87 10/16/97 LAW added debug_port use lpt port (W83877 Serial) ;R86 02/10/98 LAW added "Decode_2E8h_by_CS0" for Atrend special ;R84A 01/20/98 LAW added set NS307 GPIO switch for GXi/GXM TV out ;R85 01/20/98 LAW modify W83977xx GPIO set program ;R84 12/31/97 LAW Set NS307 GPIO device address ;R83 12/27/97 LAW Let NS307/NS308/NS319 always Use IO port 2Eh ;R82 12/22/97 LAW "Use_On_chip_clock_multipliper" for NS307/NS308/NS317 ; use 32.768kHz clock ;R81 12/22/97 LAW added "Use_48MHz" for ITE8661 ;R80 12/06/97 MIL added "Fan_Power_By_GPIO" ,"Power_LED_By_GPIO" ; "Suspend_LED_By_GPIO" function for SMC93x ;R79 11/26/97 MIL added "No_Use_GATE_A20" define, for don't use SMC93x ; control Gate A20. ;R78 11/26/97 LAW added ITE8661_WITH_UMC8670 ;R77 11/06/97 LAW added SMC37N769 and NS338 bootrom fdd enable ;R76 11/06/97 LAW added Ali513xF.SIO for New Ali513x support FastIR and KB ; ,Mouse Power on ;R75 11/05/97 RCH Added ELAN/400 chipset support ;R74 10/27/97 LAW added "W83977ATF" and set clock use 24MHz ;R73 10/16/97 LAW added "Use_GP15_to_decode" for SMC37C93x ;R72 10/16/97 LAW added debug_port use lpt port ; (now support ITE8661, SMC37C669, NS338) ;R71 10/15/97 LAW added "ITE8681" and "ITE8671" ;R70 10/13/97 LAW added "NS317" for NS pc97317VLJ ;R69 09/22/97 ADS Added "SMC37C93XPM" to Support SMC37C931PM. ;R68 09/17/97 PAL added SMC37C669_ITE8661 ;R67 09/04/97 LAW added ALi513x_5113 ;R66 09/04/97 LAW added W83977TF "Power_Led_Use" ;R65 08/29/97 LAW add "SPECIAL_GPIO1" ;R64 08/27/97 LAW fixed SMC37Cxxx cann't work at Bootblock ;R63 08/27/97 LAW move ITE8679 "PWRON_Rtc_Kbc_Init" to "Enable_SuperIO_Fdd" ; and "Kill_Onboard_PnP_IO" to fix Umc9008f Net card cann't ; work ;R39A 08/20/97 LAW modify SMC37C93xFR Key_Lock define ;R52A 08/08/97 LAW default W83977TF clock "Use_24MHz" ;R62 07/29/97 RCH Added auto-detection of external KBC and 977 internal ; KBC. This need two switch AUTO_CHECK_EXTERN_KBC & ; NO_USE_KB ;R61 07/18/97 MIL Added "USE_GPIO_FOR_POWER_LED" to Turn ON LED (GP22), ; By PowerON default. ;R59A 07/14/97 LAW KBRST hardware speed up cann't for old verison chipset ;R60 07/08/97 LAW Remove SMC37C93xFR IRRX3 setting to SMC93x.SIO ;R54A 07/09/97 RCH Fixed GPO no output due to device not enabled. ;R59 07/08/97 LAW change KBRST software control to KBRST hardware speed up ;R58 07/07/97 RIC Enable SD Bus of VIA Chip in EARLYIO otherwise RTC ; will fail when use the RTC of superio. (ex: W977) ; You must define "SUPERIO_AT_SD_BUS". ;R57 07/03/97 LAW Added "NS309" for NS PC87309VLJ ;R56 06/26/97 LAW added support "NO_USE_KB" for W83977AF ;R55 06/15/97 LAW Added support SMC37M60x, SMC37M61x ;R54 06/10/97 LAW added "Flash_W_By_GPIO_Low" for flash write protect ;R53 06/06/97 LAW added ALi5123 support "SUSPEND_LED_USE_GPIO" ;R52 05/29/97 LAW Added W83977TF SUPPORT ;R51 05/27/97 LAW Turn on CPU's fan at power on for W967/977 thru GP24 ;R50 05/16/97 TNY Added NS307 CS# pin for I/O decode of LM78 ;R49 05/16/97 RCH Added pin 24 as GPIO for I/O decode of LM78 ;R48 05/05/97 LAW added "USE_CIO32_BOOT_HIGH" for ALi51xx ;R47 05/02/97 LAW added W9775119.sio (Winbond W83977AF + ALi5119 com4) ;R46A 04/24/97 LAW fixed code error ;R46 04/23/97 LAW Added "No_USE_KB" for some MB use extension KB ;R45 04/21/97 RCH Turn on CPU's fan at power on for W967/977 thru GP10 ;R44 04/21/97 LAW Added W839x7 POWER_LED_LOW_ACTIVE function ;R43 04/17/97 DRS Added SMC68X.SIO for SMC37C68X ;R42 04/17/97 LAW Added S93X8669.SIO (SMC37C93X I/O & UMC8669 com3 + com4 ; lpt2) ;R41 04/10/97 LAW Added "POWER_LED_USE" define ;R40 04/10/97 LAW clear W83967AF/977AF bank 2 49h for Power failure ;R39 04/03/97 LAW Added SMC37C93XRF,SMC93XAPM "KEYLOCK_USE","Turbo_LED_USE" ; define ;R38 03/25/97 LAW Added ALi5123,SMC37C93x enabled fdd for boot block ;R37 03/24/97 LAW Added "SPECIAL_GPIO" for W83967AF ;R36 03/20/97 LAW Add Use device 1 "HDCS0" to do IO Decode A16 - A3 ;R35 03/20/97 LAW Added SMC37C93XAPM, SMC37C93XFR ;R34 03/10/97 LAW Added W83877ATF, W83877ATF "ENABLE_W83877F_SERIRQ" function ;R33 03/13/97 LAW Move Set W83967AF/W83977AF Fast GA20 to W967.SIO ;R32 03/07/97 LAW Added Ali514x "SUPPORT_POWER_LED" ;R31 03/06/97 LAW Added SMC67x.SIO for SMC37C67x ;R27C 03/03/97 LAW Remove ITE8680/WINBOND PCI_RESET_SUPPORT ;R27B 02/26/97 LAW Fixed cmos check sum error with some flash rom ;R30 02/21/97 LAW Fixed W83967AF/W83977AF with some power supply halt ; on post 05h ; PCI_RESET_CMOS EQU 48h ; please define same IOCSOM ; you can find IOCMOS at IOFEAT.asm ;R27A 02/20/97 LAW Fixed some chipset not support pci reset and no use ; rtc error ;R29 02/12/97 LAW Some customer didn't implement pull high of pull low ; resistor for access port control. BIOS patch it with ; auto-detection for 370H and 3F0H if define ; AUTO_3F0H_370H ;R28 02/03/97 LAW Change ALi513x KB Reset,Gate A20,KeyLock setting to ; ALi5123.sio ;R27 02/03/97 LAW Fixed ITE8680 with some power supply halt on post 05h ;R26 01/22/97 LAW Added SMC93xFR IRR3_PIN_USE,POWER_LED_USE,nSMI_USE ;R25 01/27/97 RCH Added non-serial IRQ mode support for 67X and use ; Pin 97 for IRQ 1, note this system lose COM2. ;R24 01/27/97 LAW Fixed W83967AF No_Use_RTC ;R22A 01/20/97 LAW Fixed ALi514x PM1 enable FDD work hanug up ;R23 01/17/97 LAW Added W83967AF/W83977AF APC_POWER_SWITCH_SUPPORT and ; FAST_GA20_SUPPORT ;R22 01/09/97 LAW added ALi514x APC_POWER_SWITCH_SUPPORT ;R21 01/09/97 LAW Added I8680663.SIO support (I/O, RTC, KBC, PS2 mouse) ;R20 12/16/96 LAW Added "SMC37C669FR" ; SMC37C669FR --> SMC37C669 + SUPPORT_FAST_IR ; SMC37C67X ---> SMC37C93X ; SMC37C68X ---> SMC37C93X ; ITE8679 ---> ITE8680 + NO_RTC_USE ;R19 12/16/96 LAW Added W83967AF/W83977AF support 24MHz,48MHz ;R18 12/10/96 RCH Added SMC67X/68X super I/O support , the I/O have no ; RTC but with KBC built-in. ;R17 12/09/96 LAW Modify superio define ; ALi513x + ALi5123 -- > ALi513X ; ALi514x + ALi5123 -- > ALi514X ; W86967AF + W83977AF -- > W83977AF ; NS307 + NS308 -- > NS308 ;R11E 12/05/96 LAW Added support ITE8680 keylock pin 27 - 31 (gpio8 - 11) ;R15A 10/29/96 LAW added "No_Use_RTC" define For All sio have RTC ;R16 10/17/96 LAW Added Winbond W83967AF.sio (I/O, RTC, KBC, PS2 mouse) ;R15 10/16/96 LAW added "No_Use_RTC" define For sio have RTC ;R12A 10/16/96 KGN Fix SMC93xFR after Power off will touch twice can ; power on ;R14 10/15/96 KGN Add SMC93xFR Leylock, Turbo LED Function ;R11D 06/10/96 LAW Added "no_support_keylock" define and fixed chip bug ;R11C 09/23/96 LAW Chang ITE8680 PWRON_Rtc_Kbc_Init because of 12Mhz KBC ; clock running error in UNIX ;R13 09/18/96 LAW Added NS307.SIO (NS307 I/O, RTC, KBC, PS2 mouse) ;R11B 09/13/96 LAW Move Enable_ITE8680_Fdd & enable keylock function ;R12 09/12/96 KGN Add Smc93x Power Off Support ;R11A 08/30/96 LAW Remove ITE8680 PWRON_Rtc_Kbc_Init because of Chip fixed ; Disabled KBC mouse impact work of KB ;R11 08/27/96 LAW Adds ITE8680 SIO boot from Fdd to update normal BIOS ;R10 08/14/96 LAW Adds SMC669 , UMC8669 Dual SIO boot from Fdd to update ; normal BIOS ;R09 06/25/96 RCH Enable FDC of 8669 to boot from bootblock if the ; M/B did not enable FDC by hardware trap. ;R08 06/17/96 RCH Some super I/Os' FDD is disabled , BIOS's in boot ; block need to enable it for booting access, otherwise ; can not boot from FDD to update normal BIOS.(chips ; like SMC669,UMC8669 ...) ;R07 XX/XX/96 KGN Add Smc93X , Ali5123 Dual support ;R06 05/01/96 RIC Turn Off VLSI Lynx Chipset Keyboard Controller. ;R05 01/19/96 KGN Add Ali5123 support ;R04 12/11/95 DNL Add compress code support ;R03 12/04/95 RAY Add Smc_92X support ;R02 06/17/95 RCH Added chipset dependent hook for special programming ; after CPU reset ;R01 06/06/95 RCH Disable RTC & KBC decode in SIO chip if the super I/O ; is connected to SD bus ; public PWRON_Rtc_Kbc_Init ; extrn PWRON_Rtc_Kbc_Exit:near ;R72 - start ifdef debug_port Use_lpt_debug_port = 0 if debug_port eq 378h Use_lpt_debug_port = 378h endif; debug_port eq 378h if debug_port eq 278h Use_lpt_debug_port = 278h endif; debug_port eq 278h if debug_port eq 3BCh Use_lpt_debug_port = 3BCh endif; debug_port eq 3BCh endif; debug_port ;R72 - end ;R18 - start BUILT_IN_RTC = 1 ;with built-in RTC interface ifdef SMC37C67X BUILT_IN_RTC = 0 ;no built-in RTC interface endif; SMC37C67X ifdef SMC37C68X BUILT_IN_RTC = 0 ;no built-in RTC interface endif; SMC37C68X ;R18 - end ;R17 - start ;------------------ ; ALi5123/513x/514x ;------------------ ;R117ifdef ALi513XB ;R117ALi5123 EQU 1 ;R117endif; ALi513XB ;R117ifdef ALi513X ;R117ALi5123 EQU 1 ;R117endif; ALi513X ;R120 - start ifdef ALi5113B ALi5123 EQU 1 endif; ALi5113B ;R120 - end ifdef ALi514X ALi5123 EQU 1 endif; ALi514X ifdef ALi513x_5113 ;R67 ALi5123 EQU 1 ;R67 endif; ALi514X_5113 ;R67 ;R117- start ifdef ALi513x ;RgaALi513xF EQU 1 ALi5123 EQU 1 endif ;ALi513x ifdef ALi513xB ALi513xF EQU 1 endif ;ALi513xB ;R117 - end ;------------------ ; W83967/977 ;------------------ ;R47 - start ifdef W83977_N_ALi5119 W83977AF EQU 1 endif; W83977_N_ALi5119 ;R47 - end ifdef W83967AF W83977AF EQU 1 endif; W83967AF ;R122 - start ifdef W83977CTF W83977TF EQU 1 endif; W83977CTF ;R122 - end ;R102 - start ifdef W83977EF W83977TF EQU 1 endif; W83977EF ;R102 - end ifdef W83977TF ;R52 ifndef Use_48MHz ;R52A Use_24MHz EQU 1 ;R52A endif; Use_48MHz ;R52A W83977AF EQU 1 ;R52 endif; W83977TF ;R52 ifdef W83977ATF ;R74 ifndef Use_48MHz ;R74 Use_24MHz EQU 1 ;R74 endif; Use_48MHz ;R74 W83977AF EQU 1 ;R74 endif; W83977ATF ;R74 ;R112;------------------ ;R112; NS307/308 ;R112;------------------ ;R112ifdef NS308 ;R112NS307 EQU 1 ;R112endif; NS308 ;R112ifdef NS317 ;R70 ;R112NS307 EQU 1 ;R70 ;R112endif; NS317 ;R70 ;R17 - end ;R20 - start ;------------------ ; SMC37C669/669FR ;------------------ ifdef SMC37N869 ;R121 SMC37C669 EQU 1 ;R121 endif; SMC37N869 ;R121 ifdef SMC37C669FR SMC37C669 EQU 1 endif; SMC37C669FR ifdef SMC37N769 ;R77 SMC37C669 EQU 1 ;R77 endif; SMC37N769 ;R77 ifdef SMC37C669_ITE8661 ;R68 SMC37C669 EQU 1 endif; SMC37C669_ITE8661 ifdef ITE8661_WITH_UMC8670 ;R78 ITE8661 EQU 1 ;R78 endif; ITE8661_WITH_UMC8670 ;R78 ;R31ifndef SMC37C93X ;R31ifdef SMC37C67X ;R31SMC37C93X EQU 1 ;R31endif; SMC37C67X ;R31endif; SMC37C93X ;R43 ifndef SMC37C93X ;R43 ifdef SMC37C68X ;R43 SMC37C93X EQU 1 ;R43 endif; SMC37C68X ;R43 endif; SMC37C93X ;R63ifdef ITE8679 ;R63ITE8680 EQU 1 ;R63No_Use_RTC EQU 1 ;R63endif; ITE8679 ifdef ITE8681 ;R71 ITE8679 EQU 1 ;R71 endif; ITE8681 ;R71 ifdef ITE8671 ;R71 ITE8679 EQU 1 ;R71 endif; ITE8671 ;R71 ;R20 - end ;R109 - start ifdef ITE8693 ITE8673 EQU 1 endif; ITE8693 ifdef ITE8673 ITE8679 EQU 1 endif; ITE8673 ;R109 - end ;R21 - start ifdef I8680663 ITE8680 EQU 1 endif; I8680663 ;R21 - end ifdef SMC37C93XPM ;R69 SMC37C93X EQU 1 ;R69 endif; SMC37C93XPM ;R69 ;R35 - start ifdef SMC37C93XAPM SMC37C93X EQU 1 endif; SMC37C93XAPM ifdef SMC37C93XFR SMC37C93X EQU 1 endif; SMC37C93XFR ;R35 - end ;R42 - start ifdef S93x8669 SMC37C93X EQU 1 endif; S93X8669 ;R42 - end ifdef SMC37M81X ;R116 SMC37C67X EQU 1 ;R116 endif; SMC37M81X ;R116 ifdef SMC37M60x ;R55 SMC37C67X EQU 1 ;R55 endif; SMC37M60x ;R55 ifdef SMC37M61x ;R55 SMC37C67X EQU 1 ;R55 endif; SMC37M61x ;R55 ifdef SMC37B77x ;R94 SMC37C67X EQU 1 ;R94 endif; SMC37B77x ;R94 ifdef SMC37M70X ;R94 SMC37C67X EQU 1 ;R94 endif; SMC37M70X ;R94 ;R115ifdef SIS6801 ;R95 ;R115ITE8661 EQU 1 ;R95 ;R115endif; SIS6801 ;R95 ;[]========================================================================[] ;Procedure: PWRON_Rtc_Kbc_Init ; ;Function : Program super I/O to turn on RTC & KBC for POST after power on ; ;Input : None ; ;Output : ; ;Registers: all except DI,SI and DL ; ;Note : 1. stack is not available ; 2. The programmer should implement this routine to support ; super I/O that the RTC & KBC are disabled after power on ; 3. Typical chips are: SMC37C932 & PC87306(NS) ;[]========================================================================[] ;R03 - starts ifdef SMC_92X Write_92X Macro INDEX, VALUE mov dx, 03f0h mov al, 055h out dx, al out dx, al mov al, INDEX out dx, al IODELAY inc dx mov al, VALUE out dx, al mov dx, 03F0h mov al, 0aah out dx, al IODELAY ENDM Read_92X Macro INDEX mov dx, 03f0h mov al, 055h out dx, al out dx, al mov al, INDEX out dx, al IODELAY inc dx in al, dx IODELAY mov ah, al mov dx, 03F0h mov al, 0aah out dx, al IODELAY mov al, ah ENDM endif ;SMC_92X ;R03 - ends ifdef SMC37C93X ifdef SMC37C93XPM ;R69 _Smc93X_PORT EQU 0EAh ;R69 else; SMC37C93XPM ;R69 ifdef Use_370h _Smc93X_PORT EQU 370h else ;Use_370h ifdef Use_2eh ;R114 _Smc93X_PORT EQU 2eh ;R114 else; Use_2eh ;R114 _Smc93X_PORT EQU 3f0h endif; Use_2eh ;R114 endif ;Use_370h endif; SMC37C93XPM ;R69 UNLOCK_93X macro ifdef SMC37C93XPM ;R69 mov dx,0FBH ;R69 mov al,055H ;R69 unlock pattern out dx,al ;R69 else; SMC37C93XPM ;R69 mov dx,_smc93x_port mov al,055H ;unlock pattern out dx,al ;need 2 continuous write out dx,al endif; SMC37C93XPM ;R69 endm LOCK_93X macro ifdef SMC37C93XPM ;R69 mov dx,0F9h ;R69 mov al,055H ;R69 unlock pattern out dx,al ;R69 else; SMC37C93XPM ;R69 mov dx,_smc93x_port mov al,0AAH ;lock pattern out dx,al endif; SMC37C93XPM ;R69 endm SMC93X_Tbl: ;index , data ;R114A - start ifdef Use_2eh db 07H,0AH ;logic device 0AH db 060H,06H ;set I/O port at 300H db 061H,00H db 030H,01H ;enable logic device endif; Use_2eh ;R114A - end ;enable Fdd in device 0 db 07H,00H ;R64device 0 db 30h,01H ;R64enable FDD if BUILT_IN_RTC ;R18 ifndef No_Use_RTC ;R15A ;enable RTC in device 6 db 07H,06H ;device 6 db 30h,01H ;enable RTC db 70H,08H ;IRQ 8 for RTC endif; No_Use_RTC ;R15A endif; BUILT_IN_RTC ;R18 ;enable Keyboard controller in device 7 db 07H,07H ;device 7 db 30h,01H ;enable KBC ifdef IRQ1_USE_67X_PIN97 ;R25 db 70H,0AH ;IRQ 1 connect on pin97(IRQ10) ;R25 else; IRQ1_USE_67X_PIN97 ;R25 db 70H,01H ;IRQ 1 for KB endif; IRQ1_USE_67X_PIN97 ;R25 db 72H,0CH ;IRQ 12 for PS2 mouse ;R25 - start ifdef NON_SERIRQ_MODE ;Set non-serial IRQ for 67X and use DMA 3 db 07H,08H ;device 8 db 0c0h,02h ;non-serial IRQ, use DMA 3 endif; NON_SERIRQ_MODE ;R25 - end if BUILT_IN_RTC ;R18 ;enable port 92H in device 8 db 07H,08H ;device 8 db 0e8h,18h ;GPIO 20 ifndef No_Use_GATE_A20 ;R79 db 0edh,08h ;enable 92H port endif ;No_Use_GATE_A20 ;R79 endif; BUILT_IN_RTC ;R18 db 22H,39H ;enable power for FDD,COM,LPT ifdef POWEROFF_BY_GPIO ;R39 - start if GPIO_93X_INDEX EQ 0C9h Turbo_LED_USE EQU 1 KEYLOCK_USE EQU 1 APC_POWER_SWITCH_SUPPORT EQU 1 endif; GPIO_93X_INDEX endif; POWEROFF_BY_GPIO ;R39 - end ifdef APC_POWER_SWITCH_SUPPORT ;R39 ;R12A db GPIO_93X_INDEX,80H ;R12 db 003H,83H ;R12 endif; APC_POWER_SWITCH_SUPPORT ;R39A ;R39if GPIO_93X_INDEX EQ 0C9h ;R14 ifdef Turbo_LED_USE ;R39 db 0d3h,12h ;R14 Turbo LED endif; Turbo_LED_USE ;R39 ifdef KEYLOCK_USE ;R39 db 0d7h,11h ;R14 Keylock endif; KEYLOCK_USE ;R39 ;R39endif ;GPIO_93X_INDEX ;R14 ;R39endif ;POWEROFF_BY_GPIO ;R39Aendif; APC_POWER_SWITCH_SUPPORT ;enable FDD port in device 0 db 07H,00H ;device 0 db 30h,01h ;R38enable db 60H,03H ;base I/O high byte db 61H,0f0H ;base I/O low byte db 70H,06H ;IRQ 6 db 07H,08H ;device 8 ;R73 - start ifdef Use_GP15_to_decode db 62h,byte ptr (Use_GP15_to_decode shr 8) db 63h,byte ptr (Use_GP15_to_decode and 0ffh) db 0e5h,08h ;set gpio15 for Gen. Purpose Write ;Strobe db 0f1h,02h ;Enable GPW db 003h,083h ;Enable GP1, GP2 endif; Use_GP15_to_decode ;R73 - end ifdef SUPERIO_PIN24_AS_GPO ;R49 db 0c3h,08h ;R49 endif; SUPERIO_PIN24_AS_GPO ;R49 ;R60R26 - start ;R60ifdef SUPPORT_FAST_IR ;R60ifdef IRR3_PIN_USE ;R60 IRR3_Control = 0c0h ;R60if IRR3_PIN_USE eq 120 ;R60 IRR3_Control = 0cch ;R60endif; IRR3_PIN_USE eq 120 ;R60 db IRR3_Control,18h ;set IRR3 PIN ;R60endif; IRR3_PIN_USE ;R60endif; SUPPORT_FAST_IR ifdef POWER_LED_USE PLED_Control = 0c6h if POWER_LED_USE eq 111 PLED_Control = 0d0h endif; POWER_LED_USE eq 99 db PLED_Control,10h ;Set POWER LED PIN endif; POWER_LED_USE ifdef nSMI_USE db 0c7h,10h ;Set nSMI PIN endif; nSMI_USE ;R26 - end ;R35 - start ifdef SMC37C93XAPM ifdef APC_POWER_SWITCH_SUPPORT ifndef PM1_BLK_PORT PM1_BLK_PORT EQU 0580h endif; PM1_BLK_PORT ;R39 db 003H,83H db 07h,0ah ;device A db 30h,01h ;enable device A db 60h,byte ptr (PM1_BLK_PORT shr 8) ;set PM1_BLK address db 61h,byte ptr (PM1_BLK_PORT and 0ffh) endif; APC_POWER_SWITCH_SUPPORT endif; SMC37C93XAPM ;R35 - end ;R36 - start ifdef Use_HDCS0_DECODE db 07h,01h ;device 1 db 30h,01h ;enable IDE1 for DECODE db 60h,byte ptr (Use_HDCS0_DECODE shr 8);set IDE1 address db 61h,byte ptr (Use_HDCS0_DECODE and 0ffh) db 62h,00h db 63h,00h db 70h,00h endif; Use_HDCS0_DECODE ;R36 - end ;R61 - start ifdef USE_GPIO_FOR_POWER_LED db 07H,08H ;device 8 db 0EAh,00h ;GP22 for LED default ON endif ;USE_GPIO_FOR_POWER_LED ;R61 - end ;R80 - starts ifdef Fan_Power_By_GPIO ;FAN Control db 07H,08H ;device 8 ifdef Fan_Output_Invert db GPIO_93X_Fan_INDEX,02h ;Set GPIO LOW else ;Fan_Output_Invert db GPIO_93X_Fan_INDEX,00h ;Set GPIO High endif ;Fan_Output_Invert endif ;Fan_Power_By_GPIO ifdef Power_LED_By_GPIO ;POWER LED db 07H,08H ;device 8 ifndef PLED_Output_Invert db GPIO_93X_LED_INDEX,02H ;Set GPIO LOW else ;PLED_Output_Invert db GPIO_93X_LED_INDEX,00H ;Set GPIO High endif ;PLED_Output_Invert endif ;Power_LED_B y_GPIO ifdef Suspend_LED_By_GPIO ;SUSPEND LED db 07H,08H ;device 8 ifndef SLED_Output_Invert db GPIO_93X_SLED_INDEX,02H ;Set GPIO LOW else ;SLED_Output_Invert db GPIO_93X_SLED_INDEX,00H ;Set GPIO High endif ;SLED_Output_Invert endif ;Suspend_LED_By_GPIO ;SUSPEND LED ;R80 - ends SMC93X_Tbl_End: endif; SMC37C93X ;R31 - start ifdef SMC37C67X ifdef Use_370h _Smc67X_PORT EQU 370h else ;Use_370h _Smc67X_PORT EQU 3f0h endif ;Use_370h UNLOCK_67X macro mov dx,_smc67x_port mov al,055H ;unlock pattern out dx,al ;need 2 continuous write out dx,al endm LOCK_67X macro mov dx,_smc67x_port mov al,0AAH ;lock pattern out dx,al endm SMC67X_Tbl: ;index , data ifdef Use_16bit_Decode db 24h,44h endif; Use_16bit_Decode ;enable Fdd in device 0 db 07H,00H ;R64device 0 db 30h,01H ;R64enable FDD ifdef Use_DMA_012_Routing ;R92 db 74h, 3 ;R92;Set DMA2 is connet to DMAC endif; Use_DMA_012_Routing ;R92 ;enable Keyboard controller in device 7 db 07H,07H ;device 7 db 30h,01H ;enable KBC ifdef IRQ1_USE_67X_PIN97 db 70H,0AH ;IRQ 1 connect on pin97(IRQ10) else; IRQ1_USE_67X_PIN97 db 70H,01H ;IRQ 1 for KB endif; IRQ1_USE_67X_PIN97 db 72H,0CH ;IRQ 12 for PS2 mouse db 0f0h, 00000100b ;enable 92 port ifdef NON_SERIRQ_MODE ;Set non-serial IRQ for 67X and use DMA 3 db 07H,08H ;device 8 db 0c0h,02h ;non-serial IRQ, use DMA 3 endif; NON_SERIRQ_MODE ;R90 db 22H,39H ;enable power for FDD,COM,LPT db 22H,01H ;R90enable power for FDD SMC67X_Tbl_End: endif; SMC37C67x ;R31 - end ;R43 - start ifdef SMC37C68X ifdef Use_370h _Smc68X_PORT EQU 370h else ;Use_370h _Smc68X_PORT EQU 3f0h endif ;Use_370h UNLOCK_68X macro mov dx,_smc68X_port mov al,055H ;unlock pattern out dx,al ;need 2 continuous write out dx,al endm LOCK_68X macro mov dx,_smc68X_port mov al,0AAH ;lock pattern out dx,al endm SMC68X_Tbl: ;index , data ifdef Use_16bit_Decode db 24h,44h endif; Use_16bit_Decode ;enable Fdd in device 0 db 07H,00H ;R64device 0 db 30h,01H ;R64enable FDD ;enable Keyboard controller in device 7 db 07H,07H ;device 7 db 30h,01H ;enable KBC ifdef IRQ1_USE_68X_PIN97 db 70H,0AH ;IRQ 1 connect on pin97(IRQ10) else; IRQ1_USE_68X_PIN97 db 70H,01H ;IRQ 1 for KB endif; IRQ1_USE_68X_PIN97 db 72H,0CH ;IRQ 12 for PS2 mouse db 0f0h, 00000100b ;enable 92 port ifdef NON_SERIRQ_MODE ;Set non-serial IRQ for 68X and use DMA 3 db 07H,08H ;device 8 db 0c0h,02h ;non-serial IRQ, use DMA 3 endif; NON_SERIRQ_MODE db 22H,39H ;enable power for FDD,COM,LPT ;enable FDD port in device 0 db 07H,00H ;device 0 db 30h,01h ;R38enable db 60H,03H ;base I/O high byte db 61H,0f0H ;base I/O low byte db 70H,06H ;IRQ 6 SMC68X_Tbl_End: endif; SMC37C68X ;R43 - end ;R07 - Start ifdef S93X_A5123 ifdef Use_370h Chip_PORT EQU 370h else ;Use_370h Chip_PORT EQU 3f0h endif ;Use_370h UNLOCK_5123 macro mov dx,Chip_PORT mov al,51H ;unlock pattern out dx,al ;need 2 continuous write mov al,23H ;unlock pattern out dx,al endm LOCK_5123 macro mov dx,Chip_PORT mov al,0BBH ;lock pattern out dx,al endm UNLOCK_93X macro mov dx,Chip_port mov al,55H ;unlock pattern out dx,al ;need 2 continuous write out dx,al endm LOCK_93X macro mov dx,Chip_port mov al,0AAH ;lock pattern out dx,al endm SMC93X_Tbl: ;index , data ;enable Fdd in device 0 db 07H,00H ;R64device 0 db 30h,01H ;R64enable FDD ifndef No_Use_RTC ;R15A ;enable RTC in device 6 db 07H,06H ;device 6 db 30h,01H ;enable RTC db 70H,08H ;IRQ 8 for RTC endif; No_Use_RTC ;R15A ;enable Keyboard controller in device 7 db 07H,07H ;device 7 db 30h,01H ;enable KBC db 70H,01H ;IRQ 1 for KB db 72H,0CH ;IRQ 12 for PS2 mouse ;enable port 92H in device 8 db 07H,08H ;device 8 db 0e8h,18h ;GPIO 20 ifndef No_Use_GATE_A20 ;R79 db 0edh,08h ;enable 92H port endif ;No_Use_GATE_A20 ;R79 db 22H,39H ;enable power for FDD,COM,LPT ;enable FDD port in device 0 db 07H,00H ;device 0 db 30h,01h ;R38 enable db 60H,03H ;base I/O high byte db 61H,0f0H ;base I/O low byte db 70H,06H ;IRQ 6 SMC93X_Tbl_End: Ali5123_Tbl: ;index , data ifndef No_Use_RTC ;R15A ;enable RTC in device 6 db 07H,06H ;device 6 db 30h,01H ;enable RTC db 70H,08H ;IRQ 8 for RTC db 24H,80H ;IRQ 8 is active Low endif; No_Use_RTC ;R15A ifndef Ali5113B ;R120 ;enable Keyboard controller in device 7 db 07H,07H ;device 7 db 30h,01H ;enable KBC db 70H,01H ;IRQ 1 for KB db 72H,0CH ;IRQ 12 for PS2 mouse endif ;Ali5113B ;R120 ;enable FDD port in device 0 db 07H,00H ;device 0 db 30h,01h ;R38enabled db 60H,03H ;base I/O high byte db 61H,0f0H ;base I/O low byte db 70H,06H ;IRQ 6 ifndef Ali5113B ;R120 ;enable KBC P21 and P20 Function db 07H,08H ;device 8 db 0e4H,09H ;Select KBC P21 function db 0e5H,09H ;Select KBC P20 function db 0edh,09H ;select KEYLOCK Function endif ;Ali5113B ;R120 Ali5123_Tbl_End: endif ;S93X_A5123 ;R07 - End ;R11 - start ifdef ITE8680 ITE8680_Init_Tbl: ;--- Initial key string about I/O port --- ifdef IO_PORT_USE_370H ;--- I/O port = 370h --- ID8680_PORT = 370H db 086H,080H,0AAH,055H elseifdef IO_PORT_USE_3BDH ;--- I/O port = 3BDh --- ID8680_PORT = 3BDH db 086H,080H,055H,0AAH else ;--- I/O port = 3f0h --- ID8680_PORT = 3F0H db 086H,080H,055H,055H endif ;IO_PORT_USE_370H Seq_Data: ;--- Initial key string --- db 06aH,0b5H,0daH,0edH,0f6H,0fbH,07dH,0beH db 0dfH,06fH,037H,01bH,00dH,086H,0c3H,061H db 0b0H,058H,02cH,016H,08bH,045H,0a2H,0d1H db 0e8H,074H,03aH,09dH,0ceH,0e7H,073H,039H ;R11AEnable_8680_RTC_KBC_Tbl: ;index , data ;R11A ;enable RTC in device 4 ;R11A db 07H,04H ;device 4 ;R11A db 30h,01H ;enable RTC ;R11A ;R11A ;enable Keyboard controller in device 5 ;R11A db 07H,05H ;device 5 ;R11A db 30h,01H ;enable KBC ;R11A db 07H,06H ;device 6 ;R11A db 30H,01H ;enable PS2 mouse ;R11A ;lock ITE8680 ;R11A db 02h,02h ;lock 8680 ;R11B - start Enable_8680_Fdd_Tbl: db 007H,000H ;device 0 db 030H,001H ;enable Fdd ;R46Aifdef NO_USE_KB ;R46 ifndef NO_USE_KB ;R46A ifndef no_support_keylock ;R11D ;enable Keylock function db 007h,005h ;device 5 ;R11C db 0f0h,004h ;enable keylock function db 0f0h,00Ch ;R11C ;init KBC clock 8MHz db 007h,007h ;device 7 ifdef KeyLock_Use_GPIO ;R88 - start gpio_control = (KeyLock_Use_GPIO and 08h) if gpio_control gpio_control = 25h gpio = (00010000b shl (KeyLock_Use_GPIO-8)) gpio_location = ((KeyLock_Use_GPIO-7) shl 5) else; gpio_control gpio_control = 26h gpio = (00000001b shl KeyLock_Use_GPIO) gpio_location = 00010000b + (KeyLock_Use_GPIO shl 5) endif; gpio_control else; KeyLock_Use_GPIO gpio_control = 26h gpio = 10000000b gpio_location = 11110000b endif; KeyLock_Use_GPIO ;R88 - end ;R88ifdef keylock_use_pin ;R88 gpio_control = 026h ;R11E ;R88if keylock_use_pin eq 31 ;R11E ;R88 gpio_control = 025h ;R11E ;R88 gpio = 010h ;R11E ;R88 gpio_location = 020h ;R11E ;R88elseif keylock_use_pin eq 30 ;R11E ;R88 gpio_control = 025h ;R11E ;R88 gpio = 020h ;R11E ;R88 gpio_location = 040h ;R11E ;R88elseif keylock_use_pin eq 29 ;R11E ;R88 gpio_control = 025h ;R11E ;R88 gpio = 040h ;R11E ;R88 gpio_location = 060h ;R11E ;R88elseif keylock_use_pin eq 27 ;R11E ;R88 gpio_control = 025h ;R11E ;R88 gpio = 080h ;R11E ;R88 gpio_location = 080h ;R11E ;R88elseif keylock_use_pin eq 74 ;R11E ;R88;R11E if keylock_use_pin eq 74 ;R88 gpio = 080h ;R88 gpio_location = 0f0h ;R88 else ;keylock_use_pin eq 74 ;R88 gpio = (1 shl (keylock_use_pin - 59)) ;R88 gpio_location = 00010000b + ((keylock_use_pin - 59) shl 5) ;R88 endif ;keylock_use_pin eq 74 ;R88else ;keylock_use_pin ;R88 gpio_control = 026h ;R11E ;R88 gpio = 080h ;R88 gpio_location = 0f0h ;R88endif ;keylock_use_pin ;R88;R11E db 026h,gpio ;enable gpio function db gpio_control,gpio ;R11E;enable gpio function db 070h,gpio_location ;select gpio pin location else ;no_support_keylock ;R11D db 007h,005h ;R11D;device 5 db 0f0h,008h ;R11D;init KBC clock 8MHz endif ;no_support_keylock ;R11D else; NO_USE_KB ;R46 db 007h,005h ;R46device 5 db 030h,000h ;R46disable keylock function endif; NO_USE_KB ;R46 ;R15 - start ifdef No_Use_RTC ;enable RTC in device 4 ; db 07H,04H ;device 4 db 30h,00H ;disable RTC endif ;No_Use_RTC ;R15 - end ;lock ITE8680 db 02h,02h TOTAL_INIT_POSSIBLE EQU ($ - offset dgroup:ENABLE_8680_FDD_TBL)/2 ;R15 ;R11B - end endif ;ITE8680 ;R11 - end ;R72 - start ;R81if Use_lpt_debug_port ;R115ifdef ITE8661 ;R115ITE8661_Init_Tbl: ;R115;--- Initial key string about I/O port --- ;R115ifdef IO_PORT_USE_370H ;R115 ;--- I/O port = 370h --- ;R115 ID8661_PORT = 370H ;R115 db 086H,061H,0AAH,055H ;R115elseifdef IO_PORT_USE_3BDH ;R115 ;--- I/O port = 3BDh --- ;R115 ID8661_PORT = 3BDH ;R115 db 086H,061H,055H,0AAH ;R115else ;R115 ;--- I/O port = 3f0h --- ;R115 ID8661_PORT = 3F0H ;R115 db 086H,061H,055H,055H ;R115endif ;IO_PORT_USE_370H ;R115Seq_Data: ;R115;--- Initial key string --- ;R115 db 06aH,0b5H,0daH,0edH,0f6H,0fbH,07dH,0beH ;R115 db 0dfH,06fH,037H,01bH,00dH,086H,0c3H,061H ;R115 db 0b0H,058H,02cH,016H,08bH,045H,0a2H,0d1H ;R115 db 0e8H,074H,03aH,09dH,0ceH,0e7H,073H,039H ;R115 ;R115Enable_8661_Lpt_Tbl: ;R115ifdef Use_48MHz ;R81 ;R115 db 024H,002H ;R81;Set Input 48MHz Ciock ;R115endif; Use_48MHz ;R81 ;R115 ;enable Fdd controller in device 0 ;R115 db 007H,000H ;device 0 ;R115 db 030H,001H ;enable Fdd ;R115 ;R115if Use_lpt_debug_port ;R115 db 007H,003H ;device 3 ;R115 db 030H,001H ;enable parallel port ;R115 db 060H,byte ptr (Use_lpt_debug_port shr 8) ;base I/O high byte ;R115 db 061H,byte ptr (Use_lpt_debug_port and 0ffh);base I/O low byte ;R115endif; Use_lpt_debug_port ;R115 ;lock ITE8661 ;R115 db 02h,02h ;R115TOTAL_INIT_POSSIBLE EQU ($ - offset dgroup:ENABLE_8661_Lpt_TBL)/2 ;R115endif ;ITE8661 ;R81endif; Use_lpt_debug_port ;R72 - end ;R112;R13 - start ;R112ifdef NS307 ;R112;R83ifdef IO_PORT_USE_02EH ;R112;R83 ;--- I/O port = 2Eh --- ;R112;R83 NS307_PORT = 2EH ;R112;R83else ;R112;R83 ;--- I/O port = 15Ch --- ;R112;R83 NS307_PORT = 15CH ;R112;R83endif ;IO_PORT_USE_2EH ;R112 NS307_PORT = 2EH ;always use 2Eh IO port ;R112;R84 - start ;R112Enable_GPIO_Device = 0 ;R112ifdef Fan_Power_By_GPIO ;R112Enable_GPIO_Device = 1 ;R112endif; Fan_Power_By_GPIO ;R112ifdef NS_TV_OUT_Control ;R84A ;R112Enable_GPIO_Device = 1 ;R84A ;R112endif; NS_TV_OUT_Control ;R84A ;R112ifndef GPIO_PORT ;R112GPIO_PORT EQU (800h and 0ffffh) ;R112endif; GPIO_PORT ;R112;R84 - end ;R112NS307_Init_Tbl: ;R112;--- Initial key string about I/O port --- ;R112;R82 - start ;R112ifdef Use_On_chip_clock_multipliper ;R112 db 007h, 008h ;device 8 (Power management) ;R112 db 030h, 001h ;R112 db 060h, 004h ;R112 db 061h, 000h ;R112NS307_Init_clock: ;R112endif; Use_On_chip_clock_multipliper ;R112;R82 - end ;R112ifndef No_Use_RTC ;R15A ;R112 ;R112 ;enable RTC in device 2 ;R112 db 07H,02H ;device 2 ;R112 db 30h,01H ;enable RTC ;R112else; No_Use_RTC ;R112 db 07H,02H ;device 2 ;R112 db 30h,00H ;disable RTC ;R112endif; No_Use_RTC ;R15A ;R112 ;R112ifndef No_Use_KB ;R112 ;enable Keyboard controller in device 0 ;R112 db 07H,00H ;device 0 ;R112 db 30h,01H ;enable KBC ;R112 ;enable PS2 mouse controller in device 1 ;R112 db 07H,01H ;device 1 ;R112 db 30H,01H ;enable PS2 mouse ;R112else; No_Use_KB ;R112 ;disable Keyboard controller in device 0 ;R112 db 07H,00H ;device 0 ;R112 db 30h,00H ;disable KBC ;R112 ;disable PS2 mouse controller in device 1 ;R112 db 07H,01H ;device 1 ;R112 db 30H,00H ;disable PS2 mouse ;R112endif; No_Use_KB ;R112 ;enable Fdd controller in device 3 ;R112 db 007H,003H ;device 3 ;R112 db 030H,001H ;enable Fdd ;R112;R50 - start ;R112ifdef NS307_CS0_Use_294h_Decode ;R112 db 023H,000H ;R112 db 024h,002H ;R112 db 023H,001H ;R112 db 024h,094H ;R112 db 023H,002H ;R112 db 024h,033H ;R112endif; NS307_CS0_Use_294h_Decode ;R112ifdef NS307_CS1_Use_294h_Decode ;R112 db 023H,004H ;R112 db 024h,002H ;R112 db 023H,005H ;R112 db 024h,094H ;R112 db 023H,006H ;R112 db 024h,033H ;R112endif; NS307_CS1_Use_294h_Decode ;R112ifdef NS307_CS2_Use_294h_Decode ;R112 db 023H,008H ;R112 db 024h,002H ;R112 db 023H,009H ;R112 db 024h,094H ;R112 db 023H,00AH ;R112 db 024h,033H ;R112endif; NS307_CS1_Use_294h_Decode ;R112;R50 - end ;R112ifdef Decode_2E8h_by_CS0 ;R86 ;R112 db 023H,000H ;R86 ;R112 db 024h,002H ;R86 ;R112 db 023H,001H ;R86 ;R112 db 024h,0E8H ;R86 ;R112 db 023H,002H ;R86 ;R112 db 024h,037H ;R86 ;R112 db 025h,002h ;R86 ;R112endif; Decode_2E8h_by_CS0 ;R86 ;R112;R84 - start ;R112if Enable_GPIO_Device ;R112 ;enable GPIO controller in device 7 ;R112 db 007H,007H ;device 7 ;R112 db 030H,001H ;enable GPIO ;R112 db 060H,byte ptr (GPIO_PORT shr 8) ;base I/O high byte ;R112 db 061H,byte ptr (GPIO_PORT and 0ffh);base I/O low byte ;R112endif; Enable_GPIO_Device ;R112if Use_lpt_debug_port ;R112 db 007H,004H ;device 4 ;R112 db 030H,001H ;enable parallel port ;R112 db 060H,byte ptr (Use_lpt_debug_port shr 8) ;base I/O high byte ;R112 db 061H,byte ptr (Use_lpt_debug_port and 0ffh);base I/O low byte ;R112endif; Use_lpt_debug_port ;R112;R84 - end ;R112TOTAL_INIT_POSSIBLE EQU ($ - offset dgroup:NS307_Init_Tbl)/2 ;R15A ;R112 ;R112endif ;NS307 ;R112;R13 - end ;R05 - Start ifdef Ali5123 ifdef Use_370h Ali5123_PORT EQU 370h else ;Use_370h Ali5123_PORT EQU 3f0h endif ;Use_370h UNLOCK_5123 macro mov dx,Ali5123_PORT mov al,051H ;unlock pattern out dx,al ;need 2 continuous write mov al,023H ;unlock pattern out dx,al endm LOCK_5123 macro mov dx,Ali5123_PORT mov al,0BBH ;lock pattern out dx,al endm Ali5123_Tbl: ;index , data ifndef No_Use_RTC ;R15A ;enable RTC in device 6 db 07H,06H ;device 6 db 30h,01H ;enable RTC db 70H,08H ;IRQ 8 for RTC db 24H,80H ;IRQ 8 is active Low endif; No_Use_RTC ;R15A ;enable Keyboard controller in device 7 db 07H,07H ;device 7 db 30h,01H ;enable KBC db 70H,01H ;IRQ 1 for KB db 72H,0CH ;IRQ 12 for PS2 mouse ifndef NO_USE_FDD ;R99 ;enable FDD port in device 0 db 07H,00H ;device 0 db 30h,01h ;R38enabled db 60H,03H ;base I/O high byte db 61H,0f0H ;base I/O low byte db 70H,06H ;IRQ 6 endif ;NO_USE_FDD ;R99 ;enable KBC P21 and P20 Function ;R48ifndef ALi513x ;R28 db 007H,08H ;device 8 db 030h,01h ;R48enable device 8 ifndef ALi513x ;R28 db 0e4H,09H ;Select KBC P21 function db 0e5H,09H ;Select KBC P20 function db 0edh,09H ;select KEYLOCK Function ;R32 - start ifdef SUPPORT_POWER_LED db 0e9h,28H ;select POWER LED Function endif; SUPPORT_POWER_LED ;R32 - end ;R53 - start ifdef SUSPEND_LED_USE_GPIO ;turn_off SUSPEND LED ifndef LOW_ACTIVE db SUSPEND_LED_USE_GPIO,02H;Set GPIO LOW else; LOW_ACTIVE db SUSPEND_LED_USE_GPIO,00H;Set GPIO High endif; LOW_ACTIVE endif; SUSPEND_LED_USE_GPIO ;R53 - end ;R48 - start ifdef USE_CIO32_BOOT_HIGH db 0f7h,00H ;select CIO32 boot at high level endif; USE_CIO32_BOOT_HIGH ;R48 - end endif; ALi513x ;R28 ;R22 - start ifdef Ali514x ifdef APC_POWER_SWITCH_SUPPORT ifndef PM1_BLK_PORT PM1_BLK_PORT EQU 0580h endif; PM1_BLK_PORT db 07h,0ah ;device A db 30h,01h ;enable device A db 60h,byte ptr (PM1_BLK_PORT shr 8) ;set PM1_BLK address db 61h,byte ptr (PM1_BLK_PORT and 0ffh) PM1_BLK_POST: ;R22A db 30h,00h ;R22A;disable device A endif; APC_POWER_SWITCH_SUPPORT endif; Ali514x ;R22 - end Ali5123_Tbl_End: endif; Ali5123 ;R05 - End ;R76 - Start ifdef Ali513xF ifdef Use_370h Ali513xF_PORT EQU 370h else ;Use_370h Ali513xF_PORT EQU 3f0h endif ;Use_370h UNLOCK_513xF macro mov dx,Ali513xF_PORT mov al,051H ;unlock pattern out dx,al ;need 2 continuous write mov al,023H ;unlock pattern out dx,al endm LOCK_513xF macro mov dx,Ali513xF_PORT mov al,0BBH ;lock pattern out dx,al endm Ali513xF_Tbl: ;index , data ;enable Keyboard controller in device 7 db 007H,007H ;device 7 db 030h,001H ;enable KBC db 070H,001H ;IRQ 1 for KB db 072H,00CH ;IRQ 12 for PS2 mouse ifndef Ali513xB ;R119 db 0f0h,003h ;set fast GATEA20 HW reset else ;Ali513xB ;R119 db 0f0h,001h ;R119 endif ;Ali513xB ;R119 ;enable FDD port in device 0 db 007H,000H ;device 0 db 030h,001h ;enabled db 060H,003H ;base I/O high byte db 061H,0f0H ;base I/O low byte db 070H,006H ;IRQ 6 ;enable KBC P21 and P20 Function db 007H,08H ;device 8 db 030h,01h ;R48enable device 8 db 0e1H,09H ;Select KBC P21 function db 0e0H,09H ;Select KBC P20 function db 0e2h,09H ;select KEYLOCK Function ;R108 - start ifdef USE_LPT_OUTPUT_PORT LPT_HIGH = USE_LPT_OUTPUT_PORT SHR 8 LPT_LOW = USE_LPT_OUTPUT_PORT AND 0FFH db 007H,003H ;device 3 db 030H,001H ;enable parallel port db 060H,LPT_HIGH ;base I/O high byte db 061H,LPT_LOW ;base I/O low byte endif; USE_LPT_OUTPUT_PORT ;R108 - end Ali513xF_Tbl_End: endif; Ali513xF ;R76 - End ;R16 - start ifdef W83977AF ifdef Always_Use_370h ;R96 Use_370h EQU 1 ;R96 endif; Always_Use_370h ;R96 ifdef Use_370h W83977AF_PORT EQU 370h else ;Use_370h ifdef Use_2eh ;R114 W83977AF_PORT EQU 2eh ;R114 else; Use_2eh ;R114 W83977AF_PORT EQU 3f0h endif; Use_2eh ;R114 endif ;Use_370h UNLOCK_977 macro mov dx,W83977AF_port mov al,087h ;unlock pattern out dx,al ;need 2 continuous write nop nop out dx,al endm LOCK_977 macro mov dx,W83977AF_port mov al,0AAH ;lock pattern out dx,al endm W83977_Init_Tbl: ifdef Use_24MHz ;R19 db 024h,0A4h ;R19clock input 24MHz else; Use_24MHz ;R19 ifdef Use_48MHz ;R19 db 024h,0E4h ;R19clock input 48MHz else; Use_48MHz ;R19 db 024h,084h ;enable PLL/KBC/RTC endif; Use_48MHz ;R19 endif; Use_24MHz ;R19 ;R85;R45 - start ;R85 ifdef CPU_FAN_POWER_BY_GPIO ;R85 ifdef USE_GP10 ; ;R85 db 02ah,01h ;set pin 3 as GP10 ;R85 db 007h, 007h ;device 7 ;R85 ifdef GP10_ACTIVE_LOW ;R85 db 0e0h, 00h ;GPIO 10 as output low ;R85 else; GP10_ACTIVE_LOW ;R85 db 0e0h, 02h ;GPIO 10 as output high to ;R85 endif;GP10_ACTIVE_LOW ;turn on fan ;R85 endif; USE_GP10 ;R85;R51 - start ;R85 ifdef USE_GP24 ; ;R85 db 02ah, 10h ;set pin 40 as GP24 ;R85 db 007h, 007h ;device 7 ;R85 ifdef GP10_ACTIVE_LOW ;R85 db 0ech, 00h ;GPIO 24 as output low ;R85 else; GP10_ACTIVE_LOW ;R85 db 0ech, 02h ;GPIO 24 as output high to ;R85 endif;GP10_ACTIVE_LOW ;turn on fan ;R85 endif; USE_GP24 ;R85;R51 - end ;R85 endif; CPU_FAN_POWER_BY_GPIO ;R85;R45 - end ;R85 - start W83977_CR2A_Value = 0 W83977_CR2B_Value = 0 W83977_CR2C_Value = 0 ifndef W83967AF ifdef USE_GP10 W83977_CR2A_Value = (W83977_CR2A_Value or 00000001b) endif; USE_GP10 ifdef USE_GP11 W83977_CR2A_Value = (W83977_CR2A_Value or 01000000b) endif; USE_GP11 ifdef USE_GP12 W83977_CR2A_Value = (W83977_CR2A_Value or 10000000b) endif; USE_GP12 ifdef USE_GP13 W83977_CR2B_Value = (W83977_CR2B_Value or 00000001b) endif; USE_GP13 ifdef USE_GP14 W83977_CR2C_Value = (W83977_CR2C_Value or 00000001b) endif; USE_GP14 ifdef USE_GP15 W83977_CR2C_Value = (W83977_CR2C_Value or 00000100b) endif; USE_GP15 ifdef USE_GP16 W83977_CR2C_Value = (W83977_CR2C_Value or 00010000b) endif; USE_GP16 ifdef USE_GP17 W83977_CR2C_Value = (W83977_CR2C_Value or 01000000b) endif; USE_GP17 ifdef USE_GP20 W83977_CR2B_Value = (W83977_CR2B_Value or 00000010b) endif; USE_GP20 ifdef USE_GP21 W83977_CR2B_Value = (W83977_CR2B_Value or 00001000b) endif; USE_GP21 ifdef USE_GP22 W83977_CR2B_Value = (W83977_CR2B_Value or 00100000b) endif; USE_GP22 ifdef USE_GP23 W83977_CR2B_Value = (W83977_CR2B_Value or 01000000b) endif; USE_GP23 ifdef USE_GP24 W83977_CR2A_Value = (W83977_CR2A_Value or 00010000b) endif; USE_GP24 ifdef USE_GP25 W83977_CR2A_Value = (W83977_CR2A_Value or 00001000b) endif; USE_GP25 ifdef POWER_LED_USE if POWER_LED_USE eq 58 W83977_CR2B_Value = (W83977_CR2B_Value or 00000001b);Use_GP13 else; POWER_LED_USE eq 58 if POWER_LED_USE eq 121 W83977_CR2C_Value = (W83977_CR2C_Value or 01000000b);Use_GP17 else; POWER_LED_USE eq 103 "defualt" ifndef PLED_ON_SUSPEND_ONLY ;R100 W83977_CR2C_Value = (W83977_CR2C_Value or 00000010b);Use_Pin103 endif; PLED_ON_SUSPEND_ONLY ;R100 endif; POWER_LED_USE eq 103 "defualt" endif; POWER_LED_USE eq 58 endif; POWER_LED_USE ;R118 - start ifdef Superio_Support_Watch_Dog W83977_CR2C_Value = (W83977_CR2C_Value or 00001000b);Set pin 104 ;as Watch Dog ;output endif ;Superio_Support_Watch_Dog ;R118 - end endif; W83967AF if W83977_CR2A_Value db 02ah, W83977_CR2A_Value endif; W83977_CR2A_Value if W83977_CR2B_Value db 02bh, W83977_CR2B_Value endif; W83977_CR2B_Value if W83977_CR2C_Value db 02ch, W83977_CR2C_Value endif; W83977_CR2C_Value ;R106 - start ifndef USE_GP21 W83977_CR0AF6_Value = 00000000b ifdef Superio_SMI_By_Mouse W83977_CR0AF6_Value = (W83977_CR0AF6_Value or 00100000b) endif ;Superio_SMI_By_Mouse ifdef Superio_SMI_By_KBC W83977_CR0AF6_Value = (W83977_CR0AF6_Value or 00010000b) endif ;Superio_SMI_By_KBC ifdef Superio_SMI_By_Printer W83977_CR0AF6_Value = (W83977_CR0AF6_Value or 00001000b) endif ;Superio_SMI_By_Printer ifdef Superio_SMI_By_FDC W83977_CR0AF6_Value = (W83977_CR0AF6_Value or 00000100b) endif ;Superio_SMI_By_FDC ifdef Superio_SMI_By_UartA W83977_CR0AF6_Value = (W83977_CR0AF6_Value or 00000010b) endif ;Superio_SMI_By_UartA ifdef Superio_SMI_By_UartB W83977_CR0AF6_Value = (W83977_CR0AF6_Value or 00000001b) endif ;Superio_SMI_By_UartB IF W83977_CR0AF6_Value db 007h, 00Ah ;set device A db 0F6h, W83977_CR0AF6_Value db 0F7h, 001 ;Set enable nSMI endif ;W83977_CR0AF6_Value endif ;USE_GP21 ;R106 - End ;R107 - start ifdef Enable_W83977ATF_SERIRQ db 007h, 009h ;set device 9 db 030h, 001h db 0F1h, 004h ;enable Serial IRQ endif ;Enable_W83977ATF_SERIRQ ;R107 - end ifdef CPU_FAN_POWER_BY_GPIO db 007h, byte ptr (CPU_FAN_POWER_BY_GPIO shr 8);device munber db byte ptr (CPU_FAN_POWER_BY_GPIO and 0ffh) ifdef FAN_POWER_ACTIVE_LOW db 00h ;output low else; FAN_POWER_ACTIVE_LOW db 02h ;output high to endif; FAN_POWER_ACTIVE_LOW ;turn on fan endif; CPU_FAN_POWER_BY_GPIO ifdef EARLY_SET_GP22_HIGH db 007h, 008h ;set device 8 db 030h, 001h ;enable device db 0eah, 002h ;output GP22 high endif; EARLY_SET_GP22_HIGH ;R85 - end ;R54 - start ifdef Flash_W_By_GPIO_Low db 007h, byte ptr (Flash_W_By_GPIO_Low shr 8);device munber db byte ptr (Flash_W_By_GPIO_Low and 0ffh), 02h;output GPIO16 high db 030h,01h ;enable device 7 ;R54A endif; Flash_W_By_GPIO_Low ;R54 - end ;enable RTC in device 4 ifndef No_Use_RTC db 007h,004h ;device 4 db 030h,001h ;enable RTC db 060h,000h ;base I/O high byte db 061h,070h ;base I/O low byte db 070h,008h ;set RTC IQR else; No_Use_RTC ;R24 db 007h,004h ;R24;device 4 db 030h,000h ;R24;enable RTC endif ;No_Use_RTC ifndef NO_USE_KB ;R56 ;enable KBC function db 007h,005h ;device 5 db 030h,001h ;enable KBC db 060h,000h ;base I/O high byte db 061h,060h ;base I/O low byte db 062h,000h ;base I/O high byte db 063h,064h ;base I/O low byte db 070h,001h ;set KBC IQR db 072h,00ch ;set PS2 Mouse IQR ;R33ifndef NO_FAST_GA20_SUPPORT ;R23 ;R33 db 0f0h,01000010b ;R23;set fast_ga20 ;R33else; NO_FAST_GA20_SUPPORT ;R23 ;R23 db 0f0h,00000000b ;set 8MHz KBC clock input ;R59 db 0f0h,01000000b ;R23set 8MHz KBC clock input ;R59A db 0f0h,01000001b ;R59set 8MHz KBC clock input ;R59A ;R59set KBRST hardware speed up db 0f0h,01000000b ;R59Aset 8MHz KBC clock input ;R33endif; NO_FAST_GA20_SUPPORT ;R23 ;set Port 92 enable ;set Gate20 hardware speed up ;set KBRST hardware speed up else; NO_USE_KB ;R56 ;Disable KBC function ;R56 db 007h,005h ;R56;device 5 db 030h,000h ;R56;Disable db 070h,000h ;R56;Disable db 072h,000h ;R56;Disable endif; NO_USE_KB ;R56 ;R41 - start ifdef POWER_LED_USE db 007h,007h ;device 7 db 030h,001h ;enable if POWER_LED_USE eq 58 ;R85 ifndef W83967AF ;R85 db 02bh, 00000001b ;USE GP13 ;R85 endif; W83967AF ;R85 db 007h, 007h ;device 7 ;R85 db 030h, 001h ;enable ifndef POWER_LED_LOW_ACTIVE ;R44 db 0e3h, 008h ;R44 else; POWER_LED_LOW_ACTIVE ;R44 db 0e3h, 00ah endif; POWER_LED_LOW_ACTIVE ;R44 else; POWER_LED_USE eq 58 if POWER_LED_USE eq 121 ;R85 ifndef W83967AF ;R85 db 02ch, 01000000b ;R85 endif; W83967AF ;R85 db 007h, 007h ;device 7 ;R85 db 030h, 001h ;enable ifndef POWER_LED_LOW_ACTIVE ;R44 db 0e7h, 008h ;R44 else; POWER_LED_LOW_ACTIVE ;R44 db 0e7h, 00ah endif; POWER_LED_LOW_ACTIVE ;R44 ;R85 else; POWER_LED_USE eq 103 "defualt" ;R85 ifndef W83967AF ;R85 db 02ch, 00000010b ;R85 endif; W83967AF ;R85 db 007h,007h ;device 7 ;R85 db 030h,001h ;enable endif; POWER_LED_USE eq 103 "defualt" endif; POWER_LED_USE eq 58 endif; POWER_LED_USE ;R41 - end ;R103 - start CRE8_VAL = 010H ;for Keyboard Reset ifdef USE_GP20 CRE8_VAL = 001H ;GP20 as input endif; USE_GP20 ifdef USE_GP20_OUTPUT CRE8_VAL = CRE8_VAL AND 0FEH ;GP20 as output endif; USE_GP20_OUTPUT ;R103 - end ;R104 - start CRED_VAL = 008H ;use GA20#(P21) ifdef USE_GP25 CRED_VAL = 000H ;GP25 output endif; USE_GP25 ifdef GP25_INVERTED CRED_VAL = CRED_VAL OR 02H ;GP25 output inverted endif; GP25_INVERTED ;R104 - end db 007h,008h ;device 8 db 030h,001h ;enable ;R103 db 0e8h,010h ;enable KBRST(P20) db 0e8h,CRE8_VAL ;GP20 or KBRST(P20);R103 db 0edh,CRED_VAL ;GP25 or GA20# ;R104 ;R104 db 0edh,008h ;enable Ga20#(P21) ifdef SPECIAL_GPIO db 0e9h,00h ;enable GPIO21 db 0eah,00h ;enable GPIO22 db 0ebh,00h ;enable GPIO23 db 0ech,00h ;enable GPIO24 db 007h,007h ;device 7 db 030h,001h ;enable db 0e0h,00h ;enable GPIO10 db 0e1h,00h ;enable GPIO11 db 0e4h,00h ;enable GPIO14 db 0e5h,00h ;enable GPIO15 db 0e6h,00h ;enable GPIO16 db 0e7h,00h ;enable GPIO17 endif; SPECIAL_GPIO ;R65 - staart ifdef SPECIAL_GPIO1 db 02ah, 0d1h ;Set GPIO Pin 12/11/24/10 db 02bh, 06bh ;Set GPIO Pin 23/22/21/20/13 db 02ch, 05ah ;Set GPIO Pin 17/16 WDTO/PLEDO db 060h, 001h ;Set GPIO 2x iobase address db 061h, 03Ah ;13Ah db 0e8h, 000h db 0e9h, 000h db 0eah, 000h db 0ebh, 000h db 0ech, 000h db 007h, 007h ;device 7 db 030h, 001h ;enable db 060h, 001h ;Set GPIO 1x iobase address db 061h, 038h ;138h db 0e0h, 000h db 0e1h, 000h db 0e2h, 000h db 0e3h, 000h db 0e6h, 001h db 0e7h, 001h endif; SPECIAL_GPIO1 ;R65 - end ;R23 - start ifdef APC_POWER_SWITCH_SUPPORT db 007h,004h ;device 4 db 0f0h,080h ;select blank 2 W83977_change_Blank: db 0f0h,000h ;select blank 0 endif; APC_POWER_SWITCH_SUPPORT ;R23 - end ;R92A - start db 007h,000h ;device 0 db 030h,001h ;enable db 060h,003h ;set address 3f0h db 061h,0f0h db 070h,006h ;set IRQ6 ifndef Use_DMA_012_Routing db 074h,002h ;set DMA2 else; Use_DMA_012_Routing db 074h,003h ;set DMA2 is Routing to DMA3 endif; Use_DMA_012_Routing ;R92A - end db 0F0h,0Ch ;R105 DMA Mode is busrt ;R108 - start ifdef USE_LPT_OUTPUT_PORT LPT_HIGH = USE_LPT_OUTPUT_PORT SHR 8 LPT_LOW = USE_LPT_OUTPUT_PORT AND 0FFH db 007H,001H ;device 1 db 030H,001H ;enable parallel port db 060H,LPT_HIGH ;base I/O high byte db 061H,LPT_LOW ;base I/O low byte endif; USE_LPT_OUTPUT_PORT ;R108 - end ;R101a;R101 - Starts ;R101aifdef W977_GP25_Control_Fan ;R101a db 007h,008h ;device 8 ;R101a db 030h,001h ;enable Active ;R101a db 0edh,002h ;enable GPIO25 as Hi ;R101aendif;W977_GP25_Control_Fan ;R101a;R101 - Ends TOTAL_INIT_POSSIBLE EQU ($ - offset dgroup:W83977_Init_TBL)/2 ;R62 - start ifdef AUTO_CHECK_EXTERN_KBC Enable_977KBC: ;enable KBC function db 007h,005h ;device 5 db 030h,001h ;enable KBC db 060h,000h ;base I/O high byte db 061h,060h ;base I/O low byte db 062h,000h ;base I/O high byte db 063h,064h ;base I/O low byte db 070h,001h ;set KBC IQR db 072h,00ch ;set PS2 Mouse IQR db 0f0h,01000000b ;set 8MHz KBC clock input db 0 ;end of table endif; AUTO_CHECK_EXTERN_KBC ;R62 - end endif ;W83977AF ;R16 - end ;R113;R57 - start ;R113ifdef NS351 ;R98 ;R113NS309 EQU 1 ;R98 ;R113endif; NS351 ;R98 ;R113ifdef NS309 ;R113ifndef IO_PORT_USE_15Ch ;R113 ;--- I/O port = 2Eh --- ;R113 NS309_PORT = 2EH ;R113else ;R113 ;--- I/O port = 15Ch --- ;R113 NS309_PORT = 15CH ;R113endif ;IO_PORT_USE_2EH ;R113 ;R113ifndef ON_NOW_FUNCTION_ADDRESS ;;;;; ;R113 ON_NOW_FUNCTION_ADDRESS EQU 500h ;;;;; ;R113endif; ON_NOW_FUNCTION_ADDRESS ;;;;; ;R113 ;R113NS309_Init_Tbl: ;R113;--- Initial key string about I/O port --- ;R113;R110ifndef ENABLE_NS351_SERIRQ ;R98 ;R113;R110 ;swicch to PIRQ ;R98 ;R113;R110 db 22H,0a0H ;R98;disable SIRQ ;R113;R110endif; ENABLE_NS351_SERIRQ ;R98 ;R113;R110 - start ;R113 SIOCF2 = 0A1h ;R113ifndef ENABLE_NS351_SERIRQ ;R113 SIOCF2 = SIOCF2 and 0FEh ;R113endif; ENABLE_NS351_SERIRQ ;R113 db 22H, SIOCF2 ;R113 ;R113 SIOCF3 = 0 ;R113;R111 - start ;R113ifdef Fan_Power_By_GPIO ;R113ifdef Use_Fan_Out ;R113IF Fan_Power_By_GPIO eq 21h ;R113 SIOCF3 = SIOCF3 or 00000010b ;R113ENDIF ;Fan_Power_By_GPIO eq 21h ;R113IF Fan_Power_By_GPIO eq 22h ;R113 SIOCF3 = SIOCF3 or 00001000h ;R113ENDIF ;Fan_Power_By_GPIO eq 22h ;R113endif ;Use_Fan_Out ;R113endif ;Fan_Power_By_GPIO ;R113ifndef GPIO10_16_SUPPORT ;R113 SIOCF3 = SIOCF3 or 00000001h ;R113endif; GPIO10_16_SUPPORT ;R113;R111 - end ;R113 db 23H, SIOCF3 ;R113 ;R113;R110 - end ;R113 ;enable Keyboard controller in device 6 ;R113 db 07H,06H ;device 6 ;R113 db 30h,01H ;enable KBC ;R113 ;enable PS2 mouse controller in device 5 ;R113 db 07H,05H ;device 5 ;R113 db 30H,01H ;enable PS2 mouse ;R113 ;enable Fdd controller in device 0 ;R113 db 007H,000H ;device 0 ;R113 db 030H,001H ;enable Fdd ;R113ifdef NS351 ;R98A ;R113 ;enable Wake-Up Configuration Register ;R113 db 007H,004H ;device 4 ;R113 db 030H,001H ;enable Wake-Up device ;R113 db 060h,((ON_NOW_FUNCTION_ADDRESS and 0ff00h) shr 8) ;R113 db 061h,(ON_NOW_FUNCTION_ADDRESS and 0ffh) ;R113endif; NS351 ;R98A ;R113;R110 - start ;R113ifdef Use_Superio_GPIO ;R113ifndef GPIO_PORT ;R113GPIO_PORT EQU 800h ;R113endif; GPIO_PORT ;R113 ;enable GPIO controller in device 7 ;R113 db 007H,007H ;device 7 ;R113 db 030H,001H ;enable GPIO ;R113 db 060H,byte ptr (GPIO_PORT shr 8) ;base I/O high byte ;R113 db 061H,byte ptr (GPIO_PORT and 0ffh);base I/O low byte ;R113ifdef GPO10 ;R113 db 0F0H, 10H ;R113 db 0F1H, 45H ;R113endif ;GPO10 ;R113ifdef GPO11 ;R113 db 0F0H, 11H ;R113 db 0F1H, 45H ;R113endif ;GPO11 ;R113ifdef GPO12 ;R113 db 0F0H, 12H ;R113 db 0F1H, 45H ;R113endif ;GPO12 ;R113ifdef GPO13 ;R113 db 0F0H, 13H ;R113 db 0F1H, 45H ;R113endif ;GPO13 ;R113ifdef GPO14 ;R113 db 0F0H, 14H ;R113 db 0F1H, 45H ;R113endif ;GPO14 ;R113ifdef GPO15 ;R113 db 0F0H, 15H ;R113 db 0F1H, 45H ;R113endif ;GPO15 ;R113ifdef GPO16 ;R113 db 0F0H, 16H ;R113 db 0F1H, 45H ;R113endif ;GPO16 ;R113ifdef GPO17 ;R113 db 0F0H, 17H ;R113 db 0F1H, 45H ;R113endif ;GPO17 ;R113ifdef GPO20 ;R113 db 0F0H, 20H ;R113 db 0F1H, 45H ;R113endif ;GPO20 ;R113ifdef GPO21 ;R113 db 0F0H, 21H ;R113 db 0F1H, 45H ;R113endif ;GPO21 ;R113ifdef GPO22 ;R113 db 0F0H, 22H ;R113 db 0F1H, 45H ;R113endif ;GPO22 ;R113endif; Use_Superio_GPIO ;R113;R110 - end ;R113;R111 - start ;R113ifdef Fan_Power_By_GPIO ;R113ifdef Use_Fan_Out ;R113ifndef Fan_PORT ;R113Fan_PORT EQU 900h ;R113endif; Fan_PORT ;R113 ;enable GPIO controller in device 7 ;R113 db 007H,008H ;device 7 ;R113 db 030H,001H ;enable GPIO ;R113 db 060H,byte ptr (Fan_PORT shr 8) ;base I/O high byte ;R113 db 061H,byte ptr (Fan_PORT and 0ffh);base I/O low byte ;R113 CR08F0 = 0 ;R113IF Fan_Power_By_GPIO eq 21h ;R113ifdef FAN_ACTIVE_LOW ;R113 CR08F0 = CR08F0 or 01010000b ;R113else; FAN_ACTIVE_LOW ;R113 CR08F0 = CR08F0 or 00010000b ;R113endif; FAN_ACTIVE_LOW ;R113ENDIF ;Fan_Power_By_GPIO eq 21h ;R113IF Fan_Power_By_GPIO eq 22h ;R113ifdef FAN_ACTIVE_LOW ;R113 CR08F0 = CR08F0 or 10100000b ;R113else; FAN_ACTIVE_LOW ;R113 CR08F0 = CR08F0 or 00100000b ;R113endif; FAN_ACTIVE_LOW ;R113ENDIF ;Fan_Power_By_GPIO eq 22h ;R113 db 0F0H,CR08F0 ;R113endif ;Use_Fan_Out ;R113endif ;Fan_Power_By_GPIO ;R113;R111 - end ;R113TOTAL_INIT_POSSIBLE EQU ($ - offset dgroup:NS309_Init_Tbl)/2 ;R113endif ;NS309 ;R113;R57 - end ;R97 - start ifdef Secondary_IO_Use ifdef SECONDARY_IO_USE_NS309 ifdef SECONDIO_Use_15Ch SECONDIO_NS309_PORT = 15CH else; SECONDIO_Use_15Ch SECONDIO_NS309_PORT = 2eH endif; SECONDIO_Use_15Ch NS309_2_Init_Tbl: ;--- Initial key string about I/O port --- ;enable Keyboard controller in device 6 db 07H,006H ;device 6 db 30h,000H ;disable KBC ;enable PS2 mouse controller in device 5 db 07H,005H ;device 5 db 30H,000H ;disable PS2 mouse ;enable Fdd controller in device 0 db 007H,000H ;device 0 db 030H,000H ;enable Fdd TOTAL_INIT_2_POSSIBLE EQU ($ - offset dgroup:NS309_2_Init_Tbl)/2 endif; SECONDARY_IO_USE_NS309 endif; Secondary_IO_Use ;R97 - end PWRON_Rtc_Kbc_Init proc near ;R75 - start ;---------------------SC400 SPECIFIC------------------------------------------- ;The ELAN SC400 will float the AEN signal when its first powered up. ;The Pin Mux Reg 38 must be set to 7Fh so that ISA bus cycles to the ;SUPERIO part will work correctly. ;R75Aifdef ELAN400 ;R75A mov al,ELAN400_PIN_MUXA_38 ;R75A out 22h,al ;R75A mov al,07Fh ;R75A out 23h,al ;R75A ;R75A mov al,ELAN400_PIN_MUXA_39 ;R75A out 22h,al ;R75A mov al,76h ;R75A out 23h,al ;R75A ;R75A mov al,ELAN400_PIN_MUXA_3A ;R75A out 22h,al ;R75A mov al,02h ;R75A out 23h,al ;R75Aendif;ELAN400 ;------------------------------------------------------------------------------ ;R75 - end ifdef SMC37C93X ;Program register of 93X to enable RTC & KBC Prog_93x: UNLOCK_93X mov si,offset DGROUP:SMC93X_Tbl Next_93x: cmp si,offset DGROUP:SMC93X_Tbl_End je short Over_93x lods word ptr cs:[si] mov dx,_smc93x_port out dx,al NEWIODELAY xchg ah,al inc dx out dx,al NEWIODELAY jmp short Next_93x Over_93x: ;R114A - start ifdef Use_2eh mov dx, 63AH ;General purpose I/O bit 3.7 mov al, 04H ;set A20M instead of GP37 out dx, al endif; Use_2eh ;R114A - end LOCK_93X ;R35 - start ifdef SMC37C93XAPM ifdef APC_POWER_SWITCH_SUPPORT mov ax, PM1_BLK_PORT mov dx, ax inc dx mov al, 1 out dx,al add dx, 4 mov al, 2 out dx,al endif; APC_POWER_SWITCH_SUPPORT endif; SMC37C93XAPM ;R35 - end endif; SMC37C93X ;R31 - start ifdef SMC37C67X ;Program register of 67X to enable KBC & FDD & some function UNLOCK_67X mov si,offset DGROUP:SMC67X_Tbl Next_67x: cmp si,offset DGROUP:SMC67X_Tbl_End je short Over_67x lods word ptr cs:[si] mov dx,_smc67x_port out dx,al NEWIODELAY xchg ah,al inc dx out dx,al NEWIODELAY jmp short Next_67x Over_67x: LOCK_67X endif; SMC37C67X ;R31 - end ;R43 - start ifdef SMC37C68X ;Program register of 68X to enable KBC & FDD & some function UNLOCK_68X mov si,offset DGROUP:SMC68X_Tbl Next_68X: cmp si,offset DGROUP:SMC68X_Tbl_End je short Over_68X lods word ptr cs:[si] mov dx,_smc68X_port out dx,al NEWIODELAY xchg ah,al inc dx out dx,al NEWIODELAY jmp short Next_68X Over_68X: LOCK_68X endif; SMC37C68X ;R43 - end ;R07 - Start ifdef S93X_A5123 ifdef Use_370h Chip_PORT EQU 370h else ;Use_370h Chip_PORT EQU 3f0h endif ;Use_370h UNLOCK_5123 mov si,offset DGROUP:Ali5123_Tbl Next_5123: cmp si,offset DGROUP:Ali5123_Tbl_End je short Over_5123 lods word ptr cs:[si] mov dx,Chip_PORT out dx,al NEWIODELAY xchg ah,al inc dx out dx,al NEWIODELAY jmp short Next_5123 Over_5123: LOCK_5123 ;[]===========================================================[] ;Program register of 93X to enable RTC & KBC Prog_93x: UNLOCK_93X mov si,offset DGROUP:SMC93X_Tbl Next_93x: cmp si,offset DGROUP:SMC93X_Tbl_End je short Over_93x lods word ptr cs:[si] mov dx,Chip_port out dx,al NEWIODELAY xchg ah,al inc dx out dx,al NEWIODELAY jmp short Next_93x Over_93x: LOCK_93X endif ;S93X_A5123 ;R07 - End ;R11A;R11 - start ;R11A;Program register of ITE8680 to enable RTC & KBC ;R11Aifdef ITE8680 ;R11A mov si,offset DGROUP:ITE8680_Init_Tbl ;R11A mov dx,279h ;R11A mov cx,4 ;R11AInit_8680: ;R11A mov al,byte ptr cs:[si] ;R11A out dx,al ;R11A inc si ;R11A loop short Init_8680 ;R11A ;R11A mov si,offset DGROUP:Seq_Data ;R11A mov dx,ID8680_PORT ;R11A mov cx,20h ;R11AInit_8680_1: ;R11A mov al,byte ptr cs:[si] ;R11A out dx,al ;R11A inc si ;R11A loop short Init_8680_1 ;R11A ;R11A mov si,offset DGROUP:Enable_8680_RTC_KBC_Tbl ;R11A mov cx,08h ;R11Ainit_8680_RTC_KB: ;R11A mov ax,word ptr cs:[si] ;R11A mov dx,ID8680_PORT ;R11A out dx,al ;R11A NEWIODELAY ;R11A xchg ah,al ;R11A inc dx ;R11Aifdef IO_PORT_USE_3BDH ;R11A inc dx ;R11Aendif ;IO_PORT_USE_3BDH ;R11A out dx,al ;R11A add si,2 ;R11A NEWIODELAY ;R11A loop short Init_8680_RTC_KB ;R11A ;R11Aendif; IT8680 ;R11A;R11 - end ;R11B - start ;Program register of ITE8680 to enable Fdd & Keylock function ifdef ITE8680 ;R27A;R27 - start ;R27A mov al, 4ah + 80H ;R27A out 70h, al ;R27A nop ;R27A nop ;R27A in al, 71h ;R27A nop ;R27A nop ;R27A test al, 00100000b ;R27A jnz short @F ;R27A or al,00100000b ;R27A mov bl, al ;R27A mov al, 4ah + 80H ;R27A out 70h, al ;R27A nop ;R27A nop ;R27A mov al, bl ;R27A out 71h, al ;R27A nop ;R27A nop ;R27A mov dx, 0cf9h ;R27A mov al,06h ;R27A out dx, al ;R27A @@: ;R27A;R27 - end mov si,offset DGROUP:ITE8680_Init_Tbl mov dx,279h mov cx,4 Init_8680: mov al,byte ptr cs:[si] out dx,al inc si loop short Init_8680 mov si,offset DGROUP:Seq_Data mov dx,ID8680_PORT mov cx,20h Init_8680_1: mov al,byte ptr cs:[si] out dx,al inc si loop short Init_8680_1 mov si,offset DGROUP:Enable_8680_Fdd_Tbl ;R15ifndef no_support_keylock ;R11D ;R15 mov cx,09h ;R15else ;no_support_keylock ;R11D ;R15 mov cx,06h ;R11D ;R15endif ;no_support_keylock ;R11D mov cx,TOTAL_INIT_POSSIBLE ;R15 init_8680_Fdd: mov ax,word ptr cs:[si] mov dx,ID8680_PORT out dx,al NEWIODELAY xchg ah,al inc dx ifdef IO_PORT_USE_3BDH inc dx endif ;IO_PORT_USE_3BDH out dx,al add si,2 NEWIODELAY loop short Init_8680_Fdd ;R27;R11D - start ;R27 mov al,20h ;R27 out 64h,al ;R27 newiodelay ;R27 in al,60h ;R27 - start ;R27A - start ;R27Cifdef PCI_RESET_SUPPORT ;R27CP_RESET_CMOS = 48h ;R27Cifdef PCI_RESET_CMOS ;R27CP_RESET_CMOS = PCI_RESET_CMOS ;R27Cendif; PCI_RESET_CMOS ;R27C mov al, P_RESET_CMOS + 3 ;R27C out 70h, al ;R27C IODELAY ;R27B ;R27C IODELAY ;R27B ;R27C nop ;R27C nop ;R27C in al, 71h ;R27C nop ;R27C nop ;R27C test al, 01000000b ;R27C jnz short @F ;R27C or al, 01000000b ;R27C mov bl, al ;R27C mov al, P_RESET_CMOS + 3 ;R27C out 70h, al ;R27C nop ;R27C nop ;R27C IODELAY ;R27B ;R27C IODELAY ;R27B ;R27C mov al, bl ;R27C out 71h, al ;R27C nop ;R27C nop ;R27C mov dx, 0cf9h ;R27C mov al,06h ;R27C out dx, al ;R27C @@: ;R27C;R27A - end ;R27C;R27A mov al, 4ah ;R27C mov al, P_RESET_CMOS + 3 ;R27A ;R27C out 70h, al ;R27C nop ;R27C nop ;R27C IODELAY ;R27B ;R27C IODELAY ;R27B ;R27C in al, 71h ;R27C nop ;R27C nop ;R27C;R27A and al, not 00100000b ;R27C and al, not 01000000b ;R27A ;R27C mov bl,al ;R27C;R27A mov al, 4ah ;R27C mov al, P_RESET_CMOS + 3 ;R27A ;R27C out 70h, al ;R27C IODELAY ;R27B ;R27C IODELAY ;R27B ;R27C nop ;R27C nop ;R27C mov al, bl ;R27C out 71h, al ;R27C nop ;R27C nop ;R27Cendif; PCI_RESET_SUPPORT ;R27A ;R27C;R27 - end ;R27C;R27;R11D - end endif; IT8680 ;R11B - end ;R72 - start ;R81if Use_lpt_debug_port ;R115ifdef ITE8661 ;R115 mov si,offset DGROUP:ITE8661_Init_Tbl ;R115 mov dx,279h ;R115 mov cx,4 ;R115Init_8661: ;R115 mov al,byte ptr cs:[si] ;R115 out dx,al ;R115 inc si ;R115 loop short Init_8661 ;R115 ;R115 mov si,offset DGROUP:Seq_Data ;R115 mov dx,ID8661_PORT ;R115 mov cx,20h ;R115Init_8661_1: ;R115 mov al,byte ptr cs:[si] ;R115 out dx,al ;R115 inc si ;R115 loop short Init_8661_1 ;R115 ;R115 mov si,offset DGROUP:Enable_8661_Lpt_Tbl ;R115 mov cx,TOTAL_INIT_POSSIBLE ;R115init_8661_Lpt: ;R115 mov ax,word ptr cs:[si] ;R115 mov dx,ID8661_PORT ;R115 out dx,al ;R115 NEWIODELAY ;R115 xchg ah,al ;R115 inc dx ;R115ifdef IO_PORT_USE_3BDH ;R115 inc dx ;R115endif ;IO_PORT_USE_3BDH ;R115 out dx,al ;R115 add si,2 ;R115 NEWIODELAY ;R115 loop short Init_8661_Lpt ;R115endif; ITE8661 ;R81endif; Use_lpt_debug_port ;R72 - end ;R112;R13 - start ;R112ifdef NS307 ;R112;R83 - start ;R112 ;change IO port 15Ch to 2Eh ;R112 mov dx, 15Ch ;R112 mov al, 22h ;R112 out dx, al ;R112 NEWIODELAY ;R112 inc dx ;R112 in al, dx ;R112 or al, 00000011b ;Set always use 2Eh IO port ;R112 NEWIODELAY ;R112 mov ah, al ;R112 mov dx, 15Ch ;R112 mov al, 22h ;R112 out dx, al ;R112 mov al, ah ;R112 NEWIODELAY ;R112 inc dx ;R112 out dx, al ;R112 NEWIODELAY ;R112;R83 - end ;R112;Program register of RTC,KBC,MOUSE,FDD to enable ;R112 ;R112 mov si,offset DGROUP:NS307_Init_Tbl ;R112 mov cx,08h ;R112 mov cx,TOTAL_INIT_POSSIBLE ;R15A ;R112init_NS307: ;R112 mov ax,word ptr cs:[si] ;R112 mov dx,NS307_PORT ;R112 out dx,al ;R112 NEWIODELAY ;R112 xchg ah,al ;R112 inc dx ;R112 out dx,al ;R112 add si,2 ;R112 NEWIODELAY ;R112;R82 - start ;R112ifdef Use_On_chip_clock_multipliper ;R112 mov ax, offset DGROUP:NS307_Init_clock ;R112 cmp ax, si ;R112 jne short @f ;R112 ;R112 mov dx, 400h ;R112 mov al, 03h ;R112 out dx, al ;R112 inc dx ;R112 mov al, 10000111b ;set use on-chip clock mulipliper ;R112 out dx, al ;R112 ;R112 read_clock_status_again: ;R112 mov dx, 400h ;R112 mov al, 03h ;R112 out dx, al ;R112 ;R112 NEWIODELAY ;R112 inc dx ;R112 in al, dx ;R112 test al, 10000000b ;R112 jz short read_clock_status_again ;R112 ;R112 mov dx, 400h ;R112 mov al, 01 ;R112 out dx, al ;R112 ;R112 NEWIODELAY ;R112 inc dx ;R112 in al, dx ;R112 or al, 00001000b ;R112ifdef Support_Net_On ;R91 ;R112 or al, 00100000b ;R91 ;R112endif; Support_Net_On ;R91 ;R112 out dx, al ;R112 ;R112;R89 - start ;R112ifdef NS_ACPI_SUPPORT ;R112ifndef NS_ACPI_PORT ;R112NS_ACPI_PORT EQU 500h ;R112endif; NS_ACPI_PORT ;R112if (NS_ACPI_PORT and 0ffh) ;R112 mov dx, 400h ;R112 mov al, 08 ;R112 out dx, al ;R112 ;R112 NEWIODELAY ;R112 inc dx ;R112 mov al, byte ptr (NS_ACPI_PORT and 0ffh);base I/O low byte ;R112 out dx, al ;R112endif; (NS_ACPI_PORT and 0ffh) ;R112 ;R112 mov dx, 400h ;R112 mov al, 09 ;R112 out dx, al ;R112 ;R112 NEWIODELAY ;R112 inc dx ;R112 mov al, byte ptr (NS_ACPI_PORT shr 8);base I/O high byte ;R112 out dx, al ;R112 ;R112 mov dx, word ptr NS_ACPI_PORT ;R112 mov al, 0ffh ;R112 out dx, al ;R112 ;R112 mov dx, word ptr NS_ACPI_PORT + 1 ;R112 mov al, 0ffh ;R112 out dx, al ;R112 ;R112;R91 - start ;R112;R93ifdef SUPPORT_NET_ON ;R112 mov dx, 400h ;R112 mov al, 0eh ;R112 out dx, al ;R112 ;R112 NEWIODELAY ;R112 inc dx ;R112 mov al, byte ptr ((NS_ACPI_PORT+10h) and 0ffh);base I/O low byte ;R112 out dx, al ;R112 ;R112 mov dx, 400h ;R112 mov al, 0fh ;R112 out dx, al ;R112 ;R112 NEWIODELAY ;R112 inc dx ;R112 mov al, byte ptr ((NS_ACPI_PORT+10h) shr 8);base I/O high byte ;R112 out dx, al ;R112 ;R112 mov dx, word ptr NS_ACPI_PORT + 10h ;R112 mov al, 0ffh ;R112 out dx, al ;R112;R93endif; SUPPORT_NET_ON ;R112;R91 - end ;R112endif; NS_ACPI_SUPPORT ;R112;R89 - end ;R112 ;R112 @@: ;R112endif; Use_On_chip_clock_multipliper ;R112;R82 - end ;R112 loop short Init_NS307 ;R112endif ;NS307 ;R112;R13 - end ;R16 - start ifdef W83977AF ;R96 - start ifdef Always_Use_370h mov dx, 3f0h mov al, 087h ;unlock pattern out dx, al ;need 2 continuous write nop nop out dx, al mov al, 26h out dx, al NEWIODELAY inc dx in al, dx mov bl, al dec dx mov al, 26h out dx, al NEWIODELAY inc dx or bl, 01000000b mov al, bl out dx, al NEWIODELAY dec dx mov al, 0aah ;unlock pattern out dx, al ;need 2 continuous write NEWIODELAY endif; Always_Use_370h ;R96 ;R96 - end ;Program register of Winbond W83977AF to enable RTC & KBC UNLOCK_977 mov si,offset DGROUP:W83977_Init_TBL mov cx,TOTAL_INIT_POSSIBLE init_W83977AF: mov ax,word ptr cs:[si] mov dx,W83977AF_port out dx,al NEWIODELAY xchg ah,al inc dx out dx,al add si,2 NEWIODELAY ;R23 - start ifdef APC_POWER_SWITCH_SUPPORT mov ax, offset DGROUP:W83977_change_Blank cmp ax, si jne short @f ;R40 - start mov al, 49h out 70h, al NOP NOP NOP mov al, 80h out 71h, al ;R40 - end mov al, 4ch out 70h, al NOP NOP NOP xor al, al out 71h, al @@: endif; APC_POWER_SWITCH_SUPPORT ;R23 - end loop short Init_W83977AF ;R62 - start ifdef AUTO_CHECK_EXTERN_KBC ;Don't enable 977 internal KBC if external KBC existed in al,64h ;read KBC status port cmp al,0ffH ;external KBC existed ? jne short Init_977KBC_Exit ;no KBC ;Enable 977 internal KBC mov si,offset DGROUP:Enable_977KBC Init_977KBC: mov ax,word ptr cs:[si] or al,al ;end of table jz short Init_977KBC_Exit mov dx,W83977AF_port out dx,al ;index port NEWIODELAY xchg ah,al inc dx out dx,al ;data port inc si ;next pair inc si NEWIODELAY jmp short init_977KBC Init_977KBC_Exit: endif; AUTO_CHECK_EXTERN_KBC ;R62 - end LOCK_977 ;R27C;R30 - start ;R27Cifdef PCI_RESET_SUPPORT ;R27CP_RESET_CMOS = 48h ;R27Cifdef PCI_RESET_CMOS ;R27CP_RESET_CMOS = PCI_RESET_CMOS ;R27Cendif; PCI_RESET_CMOS ;R27C mov al, P_RESET_CMOS + 3 ;R27C out 70h, al ;R27C IODELAY ;R27B ;R27C IODELAY ;R27B ;R27C nop ;R27C nop ;R27C in al, 71h ;R27C nop ;R27C nop ;R27C test al, 10000000b ;R27C jnz short @F ;R27C or al,10000000b ;R27C mov bl, al ;R27C mov al, P_RESET_CMOS + 3 ;R27C out 70h, al ;R27C IODELAY ;R27B ;R27C IODELAY ;R27B ;R27C nop ;R27C nop ;R27C mov al, bl ;R27C out 71h, al ;R27C out 80h,al ;R27C nop ;R27C nop ;R27C mov dx, 0cf9h ;R27C mov al,06h ;R27C out dx, al ;R27C @@: ;R27C mov al, P_RESET_CMOS + 3 ;R27C out 70h, al ;R27C IODELAY ;R27B ;R27C IODELAY ;R27B ;R27C nop ;R27C nop ;R27C in al, 71h ;R27C nop ;R27C nop ;R27C and al, not 10000000b ;R27C mov bl,al ;R27C mov al, P_RESET_CMOS + 3 ;R27C out 70h, al ;R27C IODELAY ;R27B ;R27C IODELAY ;R27B ;R27C nop ;R27C nop ;R27C mov al, bl ;R27C out 71h, al ;R27C nop ;R27C nop ;R27Cendif; PCI_RESET_SUPPORT ;R27C;R30 - end endif ;W83977AF ;R16 - end ;R05 - Start ifdef Ali5123 ;Program register to enable RTC & KBC UNLOCK_5123 mov si,offset DGROUP:Ali5123_Tbl Next_5123: cmp si,offset DGROUP:Ali5123_Tbl_End je short Over_5123 lods word ptr cs:[si] mov dx,Ali5123_PORT out dx,al NEWIODELAY xchg ah,al inc dx out dx,al NEWIODELAY ;R22 - start ifdef Ali514x ifdef APC_POWER_SWITCH_SUPPORT mov ax, offset DGROUP:PM1_BLK_POST ;R22A cmp ax, si ;R22A jne short @f ;R22A mov ax, PM1_BLK_PORT mov dx, ax inc dx mov al, 1 out dx,al add dx, 4 mov al, 2 out dx,al nop nop @@: endif; APC_POWER_SWITCH_SUPPORT endif; Ali514x ;R22 - end jmp short Next_5123 Over_5123: LOCK_5123 endif; Ali5123 ;R05 - End ;R76 - Start ifdef Ali513xF ;Program register to enable RTC & KBC UNLOCK_513xF mov si,offset DGROUP:Ali513xF_Tbl Next_513xF: cmp si,offset DGROUP:Ali513xF_Tbl_End je short Over_513xF lods word ptr cs:[si] mov dx,Ali513xF_PORT out dx,al NEWIODELAY xchg ah,al inc dx out dx,al NEWIODELAY jmp short Next_513xF Over_513xF: LOCK_513xF endif; Ali513xF ;R76 - End ;R113;R57 - start ;R113ifdef NS309 ;R113;Program register of RTC,KBC,MOUSE,FDD to enable ;R113 ;R113 mov si,offset DGROUP:NS309_Init_Tbl ;R113 mov cx,TOTAL_INIT_POSSIBLE ;R113init_NS309: ;R113 mov ax,word ptr cs:[si] ;R113 mov dx,NS309_PORT ;R113 out dx,al ;R113 NEWIODELAY ;R113 xchg ah,al ;R113 inc dx ;R113 out dx,al ;R113 add si,2 ;R113 NEWIODELAY ;R113 loop short Init_NS309 ;R113;R98A - start ;R113ifdef NS351 ;R113 mov dx, word ptr ON_NOW_FUNCTION_ADDRESS ;R113 mov al, 0h ;R113 out dx, al ;R113 NEWIODELAY ;R113 NEWIODELAY ;R113 ;R113 mov dx, word ptr ON_NOW_FUNCTION_ADDRESS + 1 ;R113 mov al, 0ffh ;R113 out dx, al ;R113endif; NS351 ;R113;R98A - end ;R113endif ;NS309 ;R113;R57 - end ;R97 - start ifdef Secondary_IO_Use ifdef SECONDARY_IO_USE_NS309 ;Program register of RTC,KBC,MOUSE,FDD to disable mov si, offset DGROUP:NS309_2_Init_Tbl mov cx, TOTAL_INIT_2_POSSIBLE init_NS309_2: mov ax, word ptr cs:[si] mov dx, SECONDIO_NS309_PORT out dx, al NEWIODELAY xchg ah, al inc dx out dx, al add si, 2 NEWIODELAY loop short Init_NS309_2 endif; SECONDARY_IO_USE_NS309 endif; Secondary_IO_Use ;R97 - end ;R03 - starts ifdef SMC_92X Read_92x 0Ch mov ah, al or ah, 00100000b Write_92x 0Ch, AH Read_92x 0Dh mov ah, al or ah, 00001110b Write_92x 0Dh, AH endif ;SMC_92X ;R03 - ends ;R87 - start ifdef W83877AF W83877F EQU 1 endif; W83877AF ifdef W83877TF W83877F EQU 1 endif; W83877TF ifdef W83877ATF W83877F EQU 1 endif; W83877ATF ifdef W83877F ifdef W83877F_USE_3f0H ENABLE_W83877F_port EQU 3f0h ENABLE_W83877F_VAL EQU 87h else; W83877F_USE_3f0H ENABLE_W83877F_port EQU 250h ENABLE_W83877F_VAL EQU 89h endif; W83877F_USE_88H endif; W83877F ;R87 - end ;R72 - start if Use_lpt_debug_port ;R87 - start ifdef W83877F cli mov dx, ENABLE_W83877F_port mov al, ENABLE_W83877F_VAL out dx, al ifdef W83877F_USE_3f0H out dx, al endif ;W83877F_USE_3f0H mov al, 23h ;get port to write ifndef W83877F_USE_3f0H inc dx ;index port XX1H endif ;W83877F_USE_3f0H out dx, al inc dx ;data port XX2H mov al, ((Use_lpt_debug_port shr 2) and 0ffh) out dx, al push ax ifndef W83877F_USE_3f0H dec dx endif ;W83877F_USE_3f0H dec dx mov al, 0aah ;disable configuration out dx, al endif; W83877F ;R87 - end ifdef SMC37C669 ifdef Use_370h SMC669_PORT EQU 370H else ;Use_370h SMC669_PORT EQU 3f0H endif ;Use_370h mov dx, SMC669_PORT mov al, 055H ;unlock pattern out dx, al ;need 2 continuous write out dx, al mov al, 23h ;index number out dx,al IODELAY inc dx mov al, ((Use_lpt_debug_port shr 2) and 0ffh) out dx, al dec dx mov al,0AAH ;lock pattern out dx,al endif; SMC37C669 ifdef NS_338 PC87338_PORT = 398h ifdef Use_15C PC87338_PORT = 15Ch endif ;Use_15C ifdef Use_2E PC87338_PORT = 2Eh endif ;Use_2E mov dx, PC87338_PORT ;index port xor al, al out dx, al IODELAY inc dx ;data port mov al, 09h out dx,al out dx,al mov dx, PC87338_PORT ;index port mov al, 1bh out dx, al IODELAY inc dx ;data port mov al, 79h out dx,al out dx,al mov dx, PC87338_PORT ;index port mov al, 42h out dx, al IODELAY inc dx ;data port mov al, ((Use_lpt_debug_port shr 2) and 0ffh) out dx,al out dx,al endif; NS_338 endif; Use_lpt_debug_port ;R72 - end ;R01 - start ifdef SUPERIO_AT_SD_BUS ifdef PIIX_ID ;Note : this code is used for TRITON only mov eax,(80000000H + (PIIX_ID SHL 8)+4CH) mov dx,0CF8H out dx,eax mov dl,0FEH ;register 4EH xor al, al ifdef No_Use_RTC or al, 00000001b endif; No_Use_RTC ifdef NO_USE_KB ;R62 mov al, 00000010b or al, 00000010b ;R62 endif; NO_USE_KB out dx,al endif; PIIX_ID ;R58 - start ifdef VT586 ; for VIA chipset mov eax,(80000000H + VT586 + 048h) mov dx,0CF8H out dx,eax mov dl,0FEH ;register 4AH mov al, 0c4h ; Enable SD Bus ! out dx,al IFNDEF VT596 ;R58A mov eax,(80000000H + VT586 + 058h) mov dx,0CF8H out dx,eax mov dl,0FEH ;register 5AH mov al, 0f0h ; Enable SD Bus ! out dx,al ENDIF; VT596 ;R58A endif; VT586 ;R58 - end endif; SUPERIO_AT_SD_BUS ;R01 - end ifdef PC87306 ;Program register of 93X to enable RTC & KBC mov dx,PC87306_PORT mov al,5 ;index 5 out dx,al jmp short $ + 2 jmp short $ + 2 inc dx ifndef No_Use_RTC ;R15A mov al,4fH ;enable RTC & KBC else; No_Use_RTC ;R15A mov al,47H ;R15A ;enable KBC ,Disabled RTC endif; No_Use_RTC ;R15A out dx,al out dx,al ;R75 - start ifdef PC87306_SC400_COMBINE mov si,offset DGROUP:PC87306_TBL_START @@: cmp si,offset DGROUP:PC87306_TBL_END je short PC87306_config_end mov dx,PC87306_PORT lods word ptr cs:[si] out dx,al xchg ah,al inc dx out dx,al out dx,al jmp short @B PC87306_TBL_START: ; db 00h,00h ;disable SUPERIO Floppy,IDE,Parallel,and Serial Ports db 0Ah,80h ;Index 0Ah,0Bh,and 10h setup the SUPERIO Chip Select 0 db 10h,06h ;to respond to I/O cycles to 680h db 0Bh,0D7h ; db 0Ch,80h ;Index 0Ch,0Dh,11h setup the SUPERIO Chip Select 1 to db 11h,00h ;respond to I/O cycles to 80h db 0Dh,0D7h ; db 12h,70h ;Enable the Two GPIO ports on the SUPERIO Chip. PC87306_TBL_END: PC87306_config_end: endif; PC87306_SC400_COMBINE ;R75 - end endif; PC87306 ;R02 - start ifdef NEED_PRG_FOR_CPU_RESET ;Program chipset just after CPU reset ;R04 extrn Ct_Init_For_Cpu_Reset:near jmp Ct_Init_For_Cpu_Reset ;R04 public Ct_Init_For_Cpu_Reset_Exit Ct_Init_For_Cpu_Reset_Exit: endif; NEED_PRG_FOR_CPU_RESET ;R02 - end ifdef LIC_ID ;R06-start ;Detect 82C543 Revision is 00 or 01 ? mov eax,80000000 + (LIC_ID SHL 8) + 08h mov dx,0CF8H out dx,eax mov dx,0CFCH ;Index=Index+2. in al,dx or al,al ;revision 0 jz short @F mov eax,80000000h + (LIC_ID SHL 8) + 058H mov dx,0CF8H out dx,eax mov dx,0CFCH in al,dx mov bl,al ;Index = 58; bit 4 set 1. or bl,010H ;Disable Keyboard mov al,58H mov dx,0CF8H out dx,eax mov dx,0CFCH mov al,bl out dx,al @@: endif ;LIC_ID ;R06-end ifdef Report_398_39f_for_win95 ;for 2a59gg5c mov dx, 398h xor al, al out dx, al endif; Report_398_39f_for_win95 jmp PWRON_Rtc_Kbc_Exit PWRON_Rtc_Kbc_Init endp ;R08 - start ;Input : none ;Output : none ;Function : Enable FDD of super I/O , in order to boot from bootblock BIOS ; Enable_SuperIO_Fdd proc near IFDEF SMC37C669_ITE8661 ;R68 SMC669_ENABLE_FDD EQU 1 ;R68 call Enable_669_Fdd ;R68 endif; SMC37C669_ITE8661 ;R68 IFDEF SMC37C669 SMC669_ENABLE_FDD EQU 1 ;R10 call Enable_669_Fdd endif; SMC37C669 ;R09 - start ifdef UMC_8669 UMC8669_ENABLE_FDD EQU 1 ;R10 call Enable_8669_Fdd endif; UMC_8669 ;R09 - end ;R10 - start ifdef SMC669_N_UMC8669 SMC669_ENABLE_FDD EQU 1 UMC8669_ENABLE_FDD EQU 1 call Enable_DUAL669_Fdd endif; SMC669_N_UMC8669 ;R10 - end ;R11B;R11 - start ;R11Bifdef ITE8680 ;R11B call Enable_ITE8680_Fdd ;R11Bendif ;ITE8680 ifdef ITE8679 ;R63 call Enable_ITE8679_Fdd ;R63 endif ;ITE8679 ;R63 ;R34 - start ifdef ENABLE_W83877F_SERIRQ W83877xF_Use_SERIRQ = 0 ifdef W83877TF W83877xF_Use_SERIRQ = 1 endif; W83877TF ifdef W83877ATF W83877xF_Use_SERIRQ = 1 endif; W83877ATF IF W83877xF_Use_SERIRQ call Enable_W83877xF_SERIRQ ENDIF; W83877xF_Use_SERIRQ endif; ENABLE_W83877F_SERIRQ ;R34 - end ifdef NS_338 ;R77 call Enable_NS338_Fdd ;R77 endif; NS_338 ;R77 ret Enable_SuperIO_Fdd endp ;R10IFDEF SMC37C669 IFDEF SMC669_ENABLE_FDD ;R10 IRQ_A EQU 1 IRQ_B EQU 2 IRQ_C EQU 3 IRQ_D EQU 4 IRQ_E EQU 5 IRQ_F EQU 6 IRQ_H EQU 8 DMA_A EQU 1 DMA_B EQU 2 DMA_C EQU 3 _IRQ_6 = IRQ_F ;Hardware IRQ_F _DMA_1 = DMA_A ;Hardware DRQ_A _DMA_2 = DMA_B ;Hardware DRQ_B _DMA_3 = DMA_C ;Hardware DRQ_C ifdef IRQ_6 _IRQ_6 = IRQ_6 endif ;IRQ_6 ifdef DMA_1 _DMA_1 = DMA_1 endif ;DMA_1 ifdef DMA_2 _DMA_2 = DMA_2 endif ;DMA_2 ifdef DMA_3 _DMA_3 = DMA_3 endif ;DMA_3 ifdef USE_24MHz CVersion EQU 1 endif; USE_24MHz Enable_669_Fdd proc near xor cl,cl ;CR0 mov al,10001011b ;Enable FDD setting call Set_Smc669 mov cl,20H mov al,0fch ;FDD at 3FX call Set_Smc669 mov cl,27H mov al,(_IRQ_6 SHL 4) ;FDD use IRQ 6 call Set_Smc669 mov cl,26H mov al,(_DMA_2 SHL 4) ;FDD use DMA 2 call Set_Smc669 ifdef CVersion ;enable 24Mhz mode for FDD operation mov cl,10h mov al,40h call Set_Smc669 mov cx,167*10 ;delay 5 ms xor bx,bx call Wait_Refresh ;turn off PLL mov cl,10h mov al,50h call Set_Smc669 mov cx,167*10 ;delay 5 ms xor bx,bx call Wait_Refresh ;turn PLL back on and set 24Mhz mov cl,10h mov al,40h call Set_Smc669 ifdef USI_SPECIAL mov cx,167*10 ;delay 5 ms xor bx,bx call Wait_Refresh ;turn PLL back on and set 24Mhz mov cl,10h mov al,00h call Set_Smc669 endif ;USI_SPECIAL endif ;CVersion ret Enable_669_Fdd endp ;[]==============================================================[] ;Input : CL - register index ; AL - Value to write ;Output: none ;[]==============================================================[] Set_Smc669 Proc Near pushf cli call En_Smc669_Cfg out dx,al call Dis_Smc669_Cfg popf ret Set_Smc669 endp ifdef Use_370h SMC669_PORT EQU 370H else ;Use_370h SMC669_PORT EQU 3f0H endif ;Use_370h En_Smc669_Cfg: ifdef AUTO_3F0H_370H ;R29 call Check_3F0H_370H ;R29 mov al,cl ;index ;R29 out dx,al ;R29 IODELAY ;R29 else; AUTO_3F0H_370H ;R29 push ax mov dx,SMC669_PORT mov al,055H ;unlock pattern out dx,al ;need 2 continuous write out dx,al mov al,cl ;index number out dx,al IODELAY inc dx pop ax ret endif; AUTO_3F0H_370H ;R29 Dis_Smc669_Cfg: push ax ifdef AUTO_3F0H_370H ;R29 call Check_3F0H_370H ;R29 else; AUTO_3F0H_370H ;R29 mov dx,SMC669_PORT endif; AUTO_3F0H_370H ;R29 mov al,0AAH ;lock pattern out dx,al pop ax ret ;R29 - start ifdef AUTO_3F0H_370H ;Input : none ;Output : DX - access port Check_3F0H_370H proc near pushf push ax cli mov dx,3f0h UnlockReg: mov al,55h ;unlock registers out dx,al out dx,al mov al,0dh ;device ID register out dx,al inc dx in al,dx ;read device ID dec dx ;restore index register cmp al,03H ;669 ? je short Yes669 cmp al,04H ;669FR ? je short Yes669 cmp dl,70h je short Yes669 mov dl,70H ;set 370H jmp short UnlockReg Yes669: pop ax popf ret Check_3F0H_370H endp endif; AUTO_3F0H_370H ;R29 - end endif; SMC669_ENABLE_FDD ;R10 ;R10endif; SMC37C669 ;R08 - end ;R09 - start ;R10ifdef UMC_8669 IFDEF UMC8669_ENABLE_FDD ;R10 Enable_8669_Fdd proc near mov cl, 0C1h mov al, 41h ;disable pnp access & set FDC at 3F0H call Superio_Set_8669 mov cl, 0C0h mov al, 00000001b ;enable FDC call Superio_Set_8669 ret Enable_8669_Fdd endp ;[]======================================================================[] ;[]======================================================================[] Superio_Set_8669 Proc Near UMC8669_INDEX EQU 108h ;R10 ;unlock configuration ;R10 push ax ;R10 mov dx,UMC8669_INDEX ;R10 mov al,0aah ;R10 out dx,al ;R10 iodelay ;R10 iodelay ;R10 mov al,cl ;R10 out dx,al ;R10 iodelay ;R10 iodelay ;R10 inc dx ;I/O port 109h ;R10 pop ax call En_8669_Cfg ;R10 out dx,al ;write data ;R10 ;lock configuration ;R10 mov al, 055h ;R10 mov dx, 108h ;R10 out dx, al dec dx ;R10 ret Superio_Set_8669 ENDP En_8669_Cfg proc near push ax mov dx,UMC8669_INDEX mov al,0aah out dx,al iodelay iodelay mov al,cl out dx,al iodelay iodelay inc dx ;I/O port 109h pop ax ret En_8669_Cfg endp endif; UMC8669_ENABLE_FDD ;R10endif; UMC_8669 ;R09 - end ;R10 - START IFDEF SMC669_N_UMC8669 ENABLE_DUAL669_FDD proc Near mov cl,0c2h call En_8669_Cfg in al, dx dec dx xor al,11111111b jz SHORT @F CALL ENABLE_8669_FDD RET @@: CALL ENABLE_669_FDD ret ENABLE_DUAL669_FDD endp endif; SMC669_N_UMC8669 ;R10 - ENDS ;R11B;R11 - start ;R11Bifdef ITE8680 ;R11BEnable_8680_Fdd_Tbl: ;R11B db 07H,00H ;enable Fdd ;R11B db 30H,01H ; ;R11B ;lock ITE8680 ;R11B db 02h,02h ;R11BEnable_ITE8680_Fdd proc Near ;R11B;Program register of ITE8680 to enable Fdd ;R11B mov si,offset DGROUP:ITE8680_Init_Tbl ;R11B mov dx,279h ;R11B mov cx,4 ;R11B@@: ;R11B mov al,byte ptr cs:[si] ;R11B out dx,al ;R11B inc si ;R11B loop short @B ;R11B ;R11B mov si,offset DGROUP:Seq_Data ;R11B mov dx,ID8680_PORT ;R11B mov cx,20h ;R11B@@: ;R11B mov al,byte ptr cs:[si] ;R11B out dx,al ;R11B inc si ;R11B loop short @B ;R11B ;R11B mov si,offset DGROUP:Enable_8680_Fdd_Tbl ;R11B mov cx,03h ;R11B@@: ;R11B mov ax,word ptr cs:[si] ;R11B add si,2 ;R11B mov dx,ID8680_PORT ;R11B out dx,al ;R11B NEWIODELAY ;R11B xchg ah,al ;R11B inc dx ;R11Bifdef IO_PORT_USE_3BDH ;R11B inc dx ;R11Bendif ;IO_PORT_USE_3BDH ;R11B out dx,al ;R11B NEWIODELAY ;R11B loop short @B ;R11B ret ;R11BEnable_ITE8680_Fdd endp ;R11Bendif; IT8680 ;R11B;R11 - end ;R34 - start ifdef ENABLE_W83877F_SERIRQ if W83877xF_Use_SERIRQ Enable_W83877xF_SERIRQ proc near mov al, 04h ;Enable Serial IRQ mov cl, 04h pushf cli push ax mov dx,ENABLE_W83877F_port mov al,ENABLE_W83877F_VAL out dx,al ifdef W83877F_USE_3f0H out dx,al endif ;W83877F_USE_3f0H mov al,cl ;get port to write ifndef W83877F_USE_3f0H inc dx ;index port XX1H endif ;W83877F_USE_3f0H out dx,al inc dx ;data port XX2H pop ax out dx,al push ax ifndef W83877F_USE_3f0H dec dx endif ;W83877F_USE_3f0H dec dx mov al,0aah ;disable configuration out dx,al pop ax popf ret Enable_W83877xF_SERIRQ endp endif; W83877xF_Use_SERIRQ endif; ENABLE_W83877F_SERIRQ ;R34 - end ;R63 - start ifdef ITE8679 ITE8679_Init_Tbl: ;--- Initial key string about I/O port --- ifdef IO_PORT_USE_370H ;--- I/O port = 370h --- ID8679_PORT = 370H db 086H,080H,0AAH,055H elseifdef IO_PORT_USE_3BDH ;--- I/O port = 3BDh --- ID8679_PORT = 3BDH db 086H,080H,055H,0AAH else ;--- I/O port = 3f0h --- ID8679_PORT = 3F0H db 086H,080H,055H,055H endif ;IO_PORT_USE_370H Seq_Data: ;--- Initial key string --- db 06aH,0b5H,0daH,0edH,0f6H,0fbH,07dH,0beH db 0dfH,06fH,037H,01bH,00dH,086H,0c3H,061H db 0b0H,058H,02cH,016H,08bH,045H,0a2H,0d1H db 0e8H,074H,03aH,09dH,0ceH,0e7H,073H,039H Enable_8679_Fdd_Tbl: db 07H,00H ;enable Fdd db 30H,01H ; ;lock ITE8679 db 02h,02h Enable_ITE8679_Fdd proc Near ;Program register of ITE8679 to enable Fdd mov si,offset DGROUP:ITE8679_Init_Tbl mov dx,279h mov cx,4 @@: mov al,byte ptr cs:[si] out dx,al inc si loop short @B mov si,offset DGROUP:Seq_Data mov dx,ID8679_PORT mov cx,20h @@: mov al,byte ptr cs:[si] out dx,al inc si loop short @B mov si,offset DGROUP:Enable_8679_Fdd_Tbl mov cx,03h @@: mov ax,word ptr cs:[si] add si,2 mov dx,ID8679_PORT out dx,al NEWIODELAY xchg ah,al inc dx ifdef IO_PORT_USE_3BDH inc dx endif ;IO_PORT_USE_3BDH out dx,al NEWIODELAY loop short @B ret Enable_ITE8679_Fdd endp endif; IT8679 ;R63 - end ;R77 - start ifdef NS_338 PC87338_PORT = 398h ifdef Use_15C PC87338_PORT = 15Ch endif ;Use_15C ifdef Use_2E PC87338_PORT = 2Eh endif ;Use_2E Enable_NS338_Fdd proc near mov dx, PC87338_PORT ;index port xor al, al out dx, al IODELAY inc dx ;data port mov al, 09h out dx,al out dx,al ret Enable_NS338_Fdd endp endif; NS_338 ;R77 - end