; []===========================================================[] ; ; NOTICE: THIS PROGRAM BELONGS TO AWARD SOFTWARE INTERNATIONAL(R) ; INC. IT IS CONSIDERED A TRADE SECRET AND IS NOT TO BE ; DIVULGED OR USED BY PARTIES WHO HAVE NOT RECEIVED ; WRITTEN AUTHORIZATION FROM THE OWNER. ; ; []===========================================================[] ; ; ; PAGE 60,132 ; TITLE POST -- 386 ROM/BIOS POST ;--------------------------------------------------------------------------- ;Rev Date Name Description ;--------------------------------------------------------------------------- ;R280 04/30/99 MCH Make "Clear_EPA_Area" routine public for E8POST.ASM. ;R253B 04/27/99 KVN Fixed system shadow write data abnormally by R253. ; This reason is CPU cache be enabled while memory test ; and not be disabled until POST_97S.That will cause ; write IDE HDD parameter wrong data.Now we diabled CPU ; cache after memory test.This case occur at 2A41800E ;R279 04/20/99 RAY Prepare CMOS info in stack in POST 11 instead of ; POST 10 so that CT_EARLY_PM_INIT can use [BP] ;R277 03/22/99 GAR Enable PS2 mouse in post_62s if support on_now_function ;R276 03/16/99 RAY NO "Check_K6_CPU" if it is not 586 BIOS ;R271B 03/15/99 KVN Set DMI/BIOS selector correctly for DMI function 54h ;R275 03/12/99 TNY Move initial clock generator hook after PCI initaial ; for patching ICH (Intel). ;R273 02/26/99 RIC Fixed that "NO_CPU_CLOCK_DISPLAY" definition is not ; available. ;R249A 02/24/99 DRS Fixed algorithm bug ;R98C 02/12/99 DRS This function depends on No_Show_Share_Memory_Size definition ;R271A 02/12/99 STV Fixed "Clear DMI EVENT LOG POOL" func. ;R164B 02/10/99 GAR Enable PS2 mouse in post if mouse power on function ; was selected. ;R272 02/04/99 DRS This function depends on Hidden_FULL_HALT_MSG definition. ; The string "Press F1 to continue" will be hidden ;R271 02/04/99 KVN Fixed DMI function 54h error in POST ;R270 02/03/99 RCH Move password clearring message display from POST 14 ; to POST 50 to prevent POST screen corrupt for UMA ; platform. ;R269 02/03/99 KVN Fixed screen display wrong when none EPA be combined ;R268 01/29/99 PAL Move Ct_early_shadow hook after Init_Onboard_Generator ;R267 01/29/99 TNY Fix display screen error if 2GB memory installed. ;R266 01/28/99 BAR Support update ESCD DMI in SMM mode. ;R265 01/27/99 GAR Add hook Superio_Need_before_Memory_Sizing ;R264 01/26/99 DRS This function depends on Ct_Special_Do_InPost_60 definition ; Add a hook procedure in post_60s ;R263 01/26/99 GAR Support W83627F/HF ;R243C 01/25/99 RCH Added different custom specific message display ; capability and restore POST screen to show error ; message if any errors occured. ;R262 01/25/99 RCH Added switch "NO_BIOS_DATE_CODE_DISPLAY" to not ; display BIOS date code onto POST screen. ;R261 01/14/99 PAL Added RTM_Turbo_Freq hook for e0post.asm in order to ; avoid show freq. error in POST ;R260 01/11/98 RIC Add "NO_SHOW_CPU_TYPE_IF_NO_EPA_LOGO" definition. ;R127B 12/31/98 KVN Change the default year from 98 to 99 if CMOS invalid ;R259 12/31/98 JMS fixed can't backup CMOS to EEPROM when define ; "CMOS_BACKUP_SUPPORT" (for Media GX) ;R258 12/30/98 BAR Fixed error. Can't not Show Enter Password message , ; when define "Graphics_Post" and "NO_EPA_LOGO" . ;R257 12/24/98 PHI Add new function ,that when CMOS checksum error ; the date default is the date that when BIOS made. ; Please define Date_DEFAULT_IS_BIOS_MAKE_DAY ;R153B 12/23/98 JMS R153A Only support GPIO 10~17 to Control KEYLOCK status. ; now added GPIO 20~27 support ;R222A 12/17/98 GAR Make keylock funcion effect before memory sizing ;R256 12/12/98 RCH Discard "Video BIOS Shadow" setup item for platform ; without ISA Bus support like Intel/i820 & i810 chipset ;R255 12/11/98 KEN Fixed bug that the mouse cursor is displayed abnormal ; while using Microsoft IntelliMouse (socalled scroll ; function or wheel control mouse) in Win98 safe mode, ; when usb mouse support is enabled and no usb mouse ; is installed. ;R243B 12/03/98 RCH Added custom message display location control ; ;R254 11/30/98 RCH Patch NSTL Generic Interrupt Handler(GIH) testing ; failure for IRQ 0 ( INT 8H ). ; ;R167E 11/19/98 RIC If not define "No_Cut_IRQ12_When_No_PS2_Pluged" ; ,force define "Disable_VIA_PS2_In_PCI_RESET" to make ; system be stable in PCI Reset. ;R167D 11/17/98 RIC Add "Disable_VIA_PS2_In_PCI_RESET" for VIA_PCI_Reset ; to fix system hang at PCI Reset in SMC I/O chip. ;R253A 10/20/98 BAR Fixed Complie error. ; if define "TEST_ONLY_ONE_MEM_PTN" switch . ;R253 10/20/98 BAR Modify QuickPost memory test only show counter ; No used pattren tabel. ; Clear memory turn on cpu cache to speed up . ; If Quick Post must test memory please define ; " QuickPost_ExtMem_Test_Used_Pattern_Tbl " . ;R164A 10/13/98 GAR move R164 to the time of power down ;R46B 10/02/98 RCH Modify memory high limit to support DRAM up to 2GB ; The Intel 440GX chipset support memory up to 2GB. ;R252 09/29/98 RAY Mask out some unused externals. ;R251 09/28/98 KEN Added the setup item checking of USB mouse if ; PS2_SETUPABLE and USB_MOUSE_SUPPORT are defined. ;R250 09/24/98 KGN Add show Elan400 CPU ;R221G 09/17/98 KVN Change LS120 drive error for master channel ;R249 09/16/98 KNH This function depends on Three_FullLogo_CMOS definition ;R248 09/15/98 RAX Added "Check_KBD_MOUSE_WRONG_PLUG" switch for OEM ; customer that KBD and mouse of M/B connector can't ; swap and they wish to check KBD plug in wrong connector. ;R247 09/11/98 LAW add "POWER_ON_PRESS_SPECIAL_KEY_INTO_SETUP_SUPPORT" ; for JUMPLESS_SUPPORT press key skip Set jumpless value ; and auto run setup ;R223C 09/10/98 STV Fixed save DMI Eveny Log error code ;R243A 09/10/98 RCH Added POST message control for customerziation ;R246 09/09/98 DNL Initial ACPI table and AML code late to fix VIA IRQ ; assign incorrectly problem ;R167C 09/04/98 RIC Add VIA 596 South Bridge chip Support. ; (Fixed that System can't reboot/PCI Reset) ;R238A 09/04/98 KVN Don't fix 16th color for POST message in graphics POST ; when BIOS.CFG define "No_Show_Graphic_POST_MSG" ;R245 09/03/98 DNL Fixed some motherboard device no initial while BIOS ; support simple boot and system restart from WIN 98 ; ACPI mode ;R244 09/03/98 DNL Fixed Intel TESTVIEW utility report memory size error ;M02 09/02/98 RAY Adapt Preboot-Agent from code modified by US ; (05/08/98 TJM) Block clearing of EPA logo to host term ; ;M01 09/02/98 RAY Adapt Preboot-Agent from code modified by US ; (01/29/98 TJM) Added MPC 2.0 (Formerly RPB) modifications ; ;R243 08/31/98 RCH Added specific POST message customerization ;R242A 08/27/98 BAR Do'nt show IDE change message ,when CMOS Checksum error . ;R221F 08/25/98 KNH Added some feature for Acer request ;R242 08/24/98 BAR Added report IDE has changed. ; Added define "Show_IDE_Changed_Message" ;R223B 08/14/98 KVN Fixed coding mistack by R223A that will cause POST hang ; at update GPNV data when "DMI event log" item disable ;R221E 08/12/98 KVN Added some feature for Acer request ;R241 08/11/98 RCH Added specfic LCD display for POST code output ;R240 08/05/98 TNY Fix some chipset WOL fail. ;R239 07/28/98 RCH Fixed system reset after shutdown from Netware SMP ; OS if the CPU ID is 0651H for MP platform, due to ; data stored in segment 4100H was destoried by P6 ; micro codes that are decompressed to 4000:0 ;R221D 07/28/98 KVN Fixed coding mistake that will cause no report battery ; fail error message ;R238 07/28/98 KVN Let full screen logo show speed up ;R237 07/24/98 KVN Added a new switch to always run quick post ;R236 07/23/98 KVN Change method of decompressing in protect mode ;R235 07/16/98 TNY Add "WAIT_10_SEC_IF_KB_ERR" option ;R221C 07/16/98 KVN Request for Acer OEM ;R234 07/14/98 GAR Add for W83977EF ;R233 07/14/98 RCH Added MediaGX DSTN LCD controller 9210 display support. ;R232 07/11/98 RAY Add BIOS.CFG switch: CLEAR_SCREEN_BEFORE_SHOWING_ERRORS ;R230 07/06/98 KVN Added "NO_EPA_LOGO" switch for graphics post to reduce ; POST and EPA pattern code size ;R229 07/06/98 RCH Added a switch to send Keyboard selftest during ; warm booting for special hardware usage. ;R221B 07/03/98 KVN 1. Added one more error condition for LS120 that not ; only Check LS120 drive but also verify bootable ; diskette have in LS120 drive. ; 2. Added enter setup message for CMOS checksum or ; battery fail error occur ;R228 07/01/98 GAR Add "Disable_SecondIO_ComLptPort" for ; Secondary super I/O ;R223A 06/30/98 STV Fixed R223 save DMI Eveny Log error code not error ; code string address. ;R227 06/29/98 KVN Show TCAV version in POST screen ;R226 06/29/98 KEN Correct the codes to clear base memory at POST_49s ; for that the USBRAM used by USB BIOS in base memory is ; destroyed. But, if 2M flash ROM is used, the USB BIOS ; can't use base memory anyway. ;R225 06/26/98 DRS Add No_Automatic_Load_Awdflash_InPOST definition ; Some customers want to automatically load awdflash.exe, ; but they don't want this function during POST. ; They just want to autmaticlly load awdflash.exe in BootBlock. ;R224 06/24/98 TNY Add "WAIT_KEY_10_SEC" option. ;R221A 06/23/98 KVN Modified post error screen for acer OEM request ;R223 06/22/98 STV 1.Added POST Errors save in to DMI_EVENT_LOG on ; POST_ERROR_TO_DMI_EVENT_LOG definition.The definition ; first must DMI_GPNV_SUPPORT definition. ; 2.This function depends on DMI_EVENT_LOG_IN_SETUP definition ; & must define EDMI_EVENT_LOG_CMOS, EDMI_EVENT_LOG_CMOS_BIT, ; CDMI_EVENT_LOG_CMOS, CDMI_EVENT_LOG_CMOS_BIT ; DMI Event Log : Disabled/Enabled ; Clear All DMI Event Log : No/Yes ; View DMI Event Log : [Enter] ; Mark DMI Events as Read : [Enter] ; Event Log Capacity : Space Available/Space FULL ; Event Log Validity : Valid ; NOTE:This function must first DMI_GPNV_SUPPORT & ; POST_ERROR_TO_DMI_EVENT_LOG definition. ;R185E 06/18/98 KVN Change show award logo method in graphics post to ; save POST spent time ;R203F 06/11/98 KVN Fixed show secondary EPA error in graphics mode by R203B ;R216d 06/09/98 MAX Fixed FlashROM CMOS backupData Save to CMOS subroutine ; function. ;R216c 06/05/98 MAX Support CMOS default value save to 2M ROM Flash function ;R222 06/05/98 RCH Added keylock emulation by trapping LID# for super ; I/O chip - SMC602 ;R216b 06/01/98 MAX Fixed by 1M ROM 4k Unit Only ;R216a 05/26/98 MAX Change FLASH_CMOS_Sign '*CMOS*' lable ;R221 05/25/98 KVN Added POST error display another logo depand on customer ; For example:Acer want show japaness error message in ; POST when any error occur.We need to added some switch ; in BIOS.CFG as follow: ; 1. "Full_Screen_Logo" or "Graphics_post" ; 2. "Customer_Error_Code_Support" ; Combine error message logo to BIOS.You just use CBROM.EXE ; added to be LOGO1 (CBROM/logo1 [filename]) ;R220 05/22/98 TNY Add "Init_Clkgen_At_POST13" option. ;R203E 05/21/98 KVN Canceled source code and pattern of EPA logo if define ; 'No_EPA_logo' to save BIOS code space ;R219 05/21/98 DRS This function depends on Show_PS2_UnConnect_Message ; Report PS/2 mouse don't connect message error message ; is "PS/2 Mouse error or no PS/2 mouse present" ;R153A 05/14/98 MIL Added NS307 Superio's GPIO to Control KEYLOCK status. ;R218 05/12/98 RAX Added Cyrix VSA save to disk support. ;R217 05/07/98 DRS This function depends on New_Swap_Fdd_Method ; The new method is Drive A exists or Drive B exists , ; the Floppy Swap function is available. ;R216 05/06/98 MAX Support FlashROM CMOS backupData Save to CMOS function. ; If you want to use it then should define ; "CMOS_Default_in_Flash EQU 1" in BIOS.CFG ;R215 04/28/98 KVN Seprate 2 spurious handle to avoid mask wrong IRQ if ; soft INT issue and set Int 0-77 vector default to ; "SPURIOUS_soft_HDLR" subroutine. ;R214 04/24/98 LAW fixed W839xx serial post_49s press DEL key no respend ; when power on reset ;R213 04/22/98 KVN Remove AWARD logo font location to ASCII 251-255 from ; 27-31 and reload ASCII standard font 0-250 after show ; EPA that to avoid some addon card use ASCII 0-31 font ; but show wrong character ;R212 04/22/98 DRS This function depends on LOGO_SHOW_Selectable definition ; Add item to decide that Full Screen LOGO will be hidden ;R176A 04/22/98 KGN Add code For HPM resume from disk post information ;R203D 04/17/98 KVN Fixed compiler error if define "NO_EPA_LOGO" ;R203C 04/15/98 KVN Display EPA1 in Graphics Post screen for support 2 EPA ; BIOS (for trend anti virus) ;R203B 04/14/98 LAW Support secondary Graphics Post screen ;R201B 04/09/98 RCH Fixed system hang up for Pentium Pro platform due ; to reading CPU control register CTL3 ;R211 04/08/98 RCH Change CELERON CPU name to "INTEL(R) CELERON(TM)" ; requested by Intel Taiwan. ;R185D 04/08/98 LAW modify Show_Graphics_Font proc use memory access to VGA ; address, becuase is too slow with INT 10h function ;R210 03/31/98 LAW add "CUT_IRQ12_BY_CT" for KB decode include chipset ; cut irq12 at post_66s ;R93B 03/31/98 RCH Fixed second CPU not showed for MP platform if switch ; "ALWAYS_SHOW_CPU_TYPE" is used ;R203A 03/31/98 KVN Fixed POST screen will be destroy if not combine secondary ; EPA logo and BIOS is support 2 EPA ;R93A 03/27/98 RAY Fix R93 typmatic mistake: ; It should be ALWAYS_SHOW_CPU_TYPE not ; ALWAUS_SHOW_CPU_TYPE ;R209 03/27/98 RAY Add BIOS.CFG option: ALWAYS_MEMORY_TEST to show ; memory testing no matter it is a warm boot or not ;R208 03/27/98 BAR Move detect EEPROM code to Xsegment to save E0 code space. ;R207 03/26/98 BAR Support PMC PM29F002C 2M EEPROM ;R206 03/26/98 KVN Fixed Chromatic Research,Inc AGP VGA card display POST ; text be black if system BIOS support graphics POST but ; not combine LOGO. ;R205 03/26/98 BAR Support MOSEL V29C51002T EEPROM ;R204 03/20/98 KVN Fixed initial combine ROM error in 2M BIOS and option ; ROM are locate 0fff8h-0ffffh(last offset of first 64KB ; CBROM area).Because it will be destroy by POST_48S ;R203 03/20/98 KVN Support secondary EPA logo for text mode ;R201A 03/18/98 RIC Fixed that POST of 586 CPU hang in cache sizing or ; lose programing MTRR of Cyrix CPU. ;R202 03/18/98 RCH Added "wait for 3 seconds" instead of "pause" if any ; POST error occured for specific customer. ;R201 03/16/98 RCH Re-write P2 MTRR programming method to support memory ; cacheable range over 512Mb for new PENTIUM II CPUs ; on both Single and Dual-processor platforms. ;R200 03/13/98 RAY Add Quiet_POST_SUPPORT ;R199A 03/12/98 KVN Fixed virus warning be disable by R199 ;R199 03/10/98 KVN Added ChipAwayVirus driver message in POST screen ;R198 03/10/98 DNL Reduce ACPI S4/BIOS code size to save more space ;R197 03/07/98 RCH Added a switch "TEST_ONLY_ONE_MEM_PTN" to test memory ; with a single pattern to speed up POST. ;R196 03/05/98 BAR Support SGS-THOMSON M29F002T EEPROM ;R187A 02/24/98 RCH Fixed error coding that cause IRQ 12 can't be used by ; ISA devices when PS2 mouse is not plugged ;R144A 02/20/98 TNY Move "Init_Onboard_Sensor" hook to POST_11 from POST_50 ;R119B 02/17/98 MIL Added "EARLY_TV_INIT" hook for MediaGX project to ; Control CH7003 TV chip (CHIPPOST.ASM). ;R195 02/17/98 TNY Add "Early_Init_Onboard_Generator" hook on post_8s ; to support snd-chip enabled/disabled by clk-gen. ;R194 02/17/98 DNL Set ACPI reserved memory unit is 64K ;R191A 02/11/98 KVN Fixed full screen logo message on bottom be black ;R87A 02/06/98 BAR Delete 'Not report FDC error for notebook' ; NoteBook always no seek Floppy ;R188B 02/06/98 DRS Fixed bug ;R188A 02/05/98 DRS Don't trigger ALT-F2 Function Key (INT9) here ;R174C 02/02/98 RCH Kill unused codes for saving space ;R193 02/02/98 KGN Add defin No_C8_DF_Shadow_Item for save F000 Code ; remove C800-DFFF shadow menuitem from bfeature ;R192 02/02/98 KGN Added Defin KeyMatrix_in_XGROUP for matrix table move ; to XGROUP ;R191 01/23/98 KVN Support windows-95 16 colors plate by customer for ; full screen logo ;R190 01/23/98 BAR Support Bright Microelectronics Inc. BM29FS020 EEPROM ;R189 01/23/98 RCH Added switch "NO_HALT_ON_ANY_ERROR" to force booting ; if any error occured for close system. ;R155A 01/22/98 LAW added NO_Special_KB_Test for no pci reset chipset ;R188 01/19/98 DRS Support run awdflash.exe during POST ;R185C 01/16/98 LAW added show msg for "Graphics_post" ;R127A 01/13/98 RCH Change the default year from 97 to 98 if CMOS invalid ;R185B 01/06/98 LAW fixed define "Graphics_post" use MONO card some msg no show ;R187 12/31/97 RCH Change PS2 mouse install flag from Config_Table to ; System1_Byte. ;R185A 12/24/97 LAW Cann't show Halt_err_msg, If use full_screen_logo ;R184A 12/23/97 BAR Fixed GX86 update ESCD failed & warmboot hang up POST "C0" ; Flash type"MX28F2000TPC" ;R186 12/20/97 RCH Fixed system can not boot if AMD K6/3D CPU is plugged ; and UHCI/USB keyboard legacy is supported. ;R185 12/18/97 LAW change "EPA_LOGO_Use_Graphics" with "FULL_SCREEN_LOGO" ; switch to "Graphics_post" ,and show toget at same ; partnumber. This change cause POST display like ; followings: ; 1. Display power up screen with "full size LOGO" if ; graphic image is merged ; 2. Display EPA logo if no graphic image merged ; 3. The EPA logo can be created by 160x144x16 colors ; BitMap and don't need EPA2LOGO utility convertion ;R184 12/15/97 BAR Added check INTEL/TI 28F020 EEPROM ;R152E 12/11/97 KVN Fixed combined ROM to be destroy during warmboot if ; BIOS size is 2MB ;R98B 12/08/97 MIL Special testing memory for VGA share memory ;R167B 12/08/97 RIC Add a forever loop after PCI Reset routing to make system ; be stable. (VIA chip). ;R182A 12/08/97 DNL Clear ACPI memory size to fixed memory report error ;R183 11/28/97 JKY IF need SMI_HANDLER & USB routing move to XGROUP , ; USB init hook call need use Xcall (TX support only). ;R182 11/27/97 DNL Added ACPI on/off option support ;R181 11/25/97 LAW added "EPA_LOGO_Use_Graphics" support to fixed some ; LCD VGA chipset problem at text mode show EPA logo ;R180 11/24/97 JKY Some MB using keyboard controller for notebook , ; When External keyboard plug-in before power on , ; PS2 mouse seek fail . patch the mistake so define ; "PS2_Mouse_force_seek" call hook to pmupost.asm ;R174B 11/21/97 KGN Change EPA LOGO defin PM_Support to EPA_LOGO_Switch ;R152D 11/17/97 KVN Remove POST_decompress code allocate behind E800h to ; avoid be clear if BIOS use E000h-E800h after POST_82S ;R179 11/15/97 RAY The routine POST_decompress do not turn off L1 cache ; if the image to be decompressed is not found. It ; causes the BIOS to in L1-ON mode after POST 14 if the ; EPA logo is not added. ;R178 11/14/97 BAR Support IMT 29F002T EEPROM ;R177 11/07/97 RAY The routines in CT_TABLE.ASM has been moved to ; XGROUP ;R176 11/06/97 KGN Add code for HPM Support ;R175 11/05/97 RCH Fixed KBC hang up while hot plugging PS2 mouse, also ; mask IRQ 12 if mouse not plugged. ;R167A 11/05/97 AVN Fixed SiS5598 PCI reset code. ;R174A 11/04/97 KGN Fix R174 coding lost command to show logo ;R110B 10/29/97 BAR Fixed WINBOND & AMD 2M EEPROM can't use same program. ; SST 2M detect ID code is same as WINBOND detect code ; ,after SST detect ID code also check WINBOND Manufacturer Code. ;R174 10/29/97 KGN Change EPA LOGO defin PM_Support to EPA_LOGO_Switch ;R173 10/27/97 KGN move defin LCD_CRT_OPTION to common.equ ;R172 10/24/97 TNY Add "OEM_Error_Special_Show1" definition for OEM ; special message. ;R169A 10/23/97 LAW some MB cann't init mouse too early so move code to 65s ;R171A 10/22/97 KVN Fixed R171 coding mistake that will cause drive A/B ; CMOS be clear if drive A or drive B is ItemDisable ;R171 10/17/97 KVN Force set HDD type of CMOS to SetupDef if HDD item ; status is ItemDisable ;R170 10/13/97 RCH Set default host clock to 66Mhz for Pentium II ; platform to prevent system hang while loading setup ; default with CMOS checksum failure. ;R169 10/13/97 LAW fixed some NS309 install OS/2 Warp 4.0 cann't found ; PS2Mouse ;R156C 10/09/97 RIC Fixed that OS/2 hang when BIOS define "ACPI_Support". ;R168 10/07/97 RCH Added boot from LAN option support ;R167 10/05/97 LAW Added VIA_PCI_RESET and SIS_5598_PCI_RESET when halt ; on post 05h ;R162A 10/02/97 KVN Fixed R162 code for choise fpinstal and mouse locate ; at XGROUP or EGROUP ;R166 10/01/97 TNY Set clock generator to be kernel. ;R165 09/18/97 MIL Added "Special_Patch_for_CH7001" define for customer ; (DAEWOO) use Gx86 M/B build in CH7001 TV Chip. ;R160A 09/12/97 LAW ifdef "NO_USE_KB" don't use "SPICAL_KB_TEST" ;R164 09/10/97 LAW added call Init_Ps2Mouse_Proc on post 5s for Ps2Mouse ; power on ;R163 08/28/97 DNL Do not call LCD function wile onboard VGA no work ;R162 08/28/97 KVN Fp_install has been moved to XGROUP ;R161 08/28/97 LAW Erase postcode 48h - KeyBoard command C9H because this ; command at AMI MegaKey is SWAP KB port/PS2Mouse port ; so Use SMC37xxx2 Superio some time KB hand up ;R160 08/28/97 LAW Use Winbond W839x7 serial Always add "SPECIAL_KB_TEST" ; because Winbond KBC some time not OK by Reset ;R159 08/27/97 LAW added "Superio_Early_Init" for some superio can Init ; at earlyio.asm ;R152C 08/14/97 KVN Fixed combine ROM over 64k size will be destroyed on ; POST decompress if BIOS is 2M.Because we put compressed ; code on 5000:0 and decomress to 4000:0 so if original ; size over 64k it will covered compressed code during ; decompress.Now we remove compressed code to 8000:0 ;R158 08/11/97 JSN Added ALiM153x PCI_RESET when halt on post 05h ;R156B 08/08/97 DNL Fixed memphis ACPI driver no function problem ;R157 08/08/97 KEN Later PnP/ISA initialization to shorten the time in ; POST_11s. ;R156A 08/08/97 DNL Fixed ACPI Table setup failure problem ;R156 08/07/97 DNL Add ACPI Table size runtime assign function ;R155 08/07/97 LAW added "Special_KB_Test" for some KB decord test not OK ;R152B 08/05/97 KVN Fixed 2M BIOS combine ROM source data be destroied after ; POST_49S to solve ACPI table not establish to correct ;R152A 08/04/97 RCH Fixed system re-boot while press "del" key during ; decompress for ACPI code if 2Mbit BIOS is used. ;R154 08/04/97 RCH Fixed onboard SCSI/7880 can not work properly for ; 2Mbit BIOS. ;R153 07/28/97 MIL Added "Special_Patch_for_FUGU" define for customer ; use GPIO pin to control KEYLOCK status. ;R152 07/11/97 KVN POST runtime decompress code compact to subroutine ;R151 06/26/97 KEN No longer using the base memory for USB_SUPPORT. ;R150 06/25/97 RCH Replace "F000_CALL" with "call" for "F000_Shadow_W" ;R138A 06/24/97 TNY Add "PATCH_FOR_NEC_SDRAM_USE_CPU_RESET" for fix ; KB reset error some time. ;R149 06/23/97 RCH Added CMOS clear function by jumper setting ;R148 06/16/97 RCH Fixed system hang up if install DRAM over 512Mb and ; dual Penitum II CPUs are plugged. ;R147 06/13/97 KVN Support HDD_write_protect function by setup option ;R110A 06/10/97 AVN Some customer use WINBOND 2M eeprom will check sum fail ; because when do AMD detect code will destroy WINBOND ; struct, so put WINBOND detect code before AMD by define ; 'EARLY_WINBOND_DECODE' ; Suggest : The customer use WINBOND 2M EEPROM in primary ; choose. ;R98A 06/10/97 AVN Change Message Display. ;R146 06/10/97 RAY Some people do not want the beep sound if video is ; is not present. Define "NO_VIDEO_ABSENT_BEEP" ; in BIOS.CFG for this purpose ;R145 06/06/97 TNY Move some code to Xsegment to save E8 code space ;R144 06/05/97 TNY Added Init_Onboard_Sensor module. ;R142A 06/03/97 KVN Fixed full screen logo bmp data override external segment ; code so we move external code to 3A00h size 6000h bytes ; before decompress logo bmp data and move back later ;R143 05/30/97 pty Added code for RPB ;R142 05/29/97 KVN Added a new segment for store more BIOS code ;R111C 05/29/97 LAW Do PCI_RESET when halt on post 05h always ;R141 05/28/97 LAW Some VGA Card use 8000:0h - 8000:7fh memory. So if ; use 2M flash rom expand rom fist table harder data is ; empty ;R133A 05/27/97 TNY The bug is fixed by R93 of atorgs.asm. ;R140 05/26/97 DNL Add "Support_1_FDD" definition to save more space ;R139 04/23/97 LAW add AMITECH_OGO ;R137B 05/21/97 LAW added Earse EPALOGO_HIGH at bsetup.inc ;R123A 05/20/97 AVN Let MXIC 28F2000PPC reduce to alone in BIOS support. ;R138 05/16/97 RCH Force system to generate second CPU reset to fix NEC ; SDRAM sizing error ( always get one row only ) ;R137A 05/15/97 LAW fixed some VGA card show EPALOGO error ;R137 05/13/97 LAW Move EpaLogo data and Award_Mark_Font use cbrom include. ; Befor the special EpaLogo must define "NOT_USE_CBROM_EPALOGO" ;R132A 05/13/97 TNY Fix coding error about display error when ; "NO_MEM_TEST_IF_QUICKPOST" defined. ;R136 05/13/97 RIC Fixed E8POST.ASM R266A lost some define. ;R135 05/07/97 RAX Patch if LCD panel graphic mode non expand then full ; screen logo small ;R134 05/07/97 DRS GIANTEC don't want beep when vga select "Absent" item ; It's special for GIANTEC ;R115B 05/05/97 LAW fixed swap KBC error when no connect Keyboard and no ; connect ps2 mouse ;R133 05/03/97 TNY Fix beeping voice to short when K6 CPU plugged. ;R132 05/02/97 RCH Added a switch to skip memory testing if user enable ; QuickPost in CMOS setup to speed up POST. ;R131 05/02/97 KGN Add No_Test_8254_Channel_2 Defin for ACC 2051 will Hang ;R130 04/29/97 JSN Added M6117_CPU define. ;R129 04/28/97 KEN Support USB always enabled at POST stage, and ; initialize USB before memory testing. ;R128 04/23/97 LAW add TMC_AS_LOGO ;R127 04/22/97 RAY Change the default year to 97 if CMOS invalid ;R100A 04/21/97 LAW Added SMC93x use GPIO11 to detect keylock ;R126 04/18/97 KVN Added MP table for dynamic to built into shadow ;R125 04/18/97 RAY Problem: ; ; S3 Virge VGA card manufactured by HsienTech failed ; to initialize when shut down from WIN95. ; ; Investigation: ; ; The failure is due to VGA BIOS checksum error. A ; few bytes are cleared to "0" when the WIN95 device ; driver is installed for the first time & ask the ; user to reboot the system. We change the on-card ; VGA BIOS from a mask ROM to a EPROM & the problem ; is fixed. This problem only happens to Hsien's ; VGA card on M/B with chipset does not support the ; PCI reset. ; ; Patch: ; ; Add switch: NO_CHECKSUM_VGA_BIOS to skip the ; checksum checking before we initialize the ; VGA BIOS and this is done only for Hsien's BIOS. ; ;R124 04/15/97 RAY Add switch: Temp_No_Flash_Support for Cyrix GX86, ; because in this moment, there still have problems ; supporting flash on this chip ! ;R119A 04/15/97 RAY Do not turn off L1 cache for Cyrix GX chip ;R123 04/11/97 AVN Link MX28F2000PPC EEPROM into 2M EEPROM Group ;R122 04/10/97 KEN Just call Report_Usb_Keyboard if no AT keyboard ; attached, for USB kernal to record no AT keyboard. ;R121 04/08/97 KVN Fix "FULL_SCREEN_LOGO" function show single logo on ; screen center for any pattern and add set background ; color define on "CENTER_SHOW_LOGO" EQU XX (0 is black, ; 1 is blue, 2 is green ... etc.) ;R120A 04/08/97 RAX Remove -R120- fixed PS2 mouse can't work ;R115A 04/07/97 LAW fixed define "KBC_KBDMOUSE_SWAP" and only install mouse ; at secondary port haun in post 05h ;R120 04/02/97 DNL If system is notebook type ,do not check keyboard ;R119 04/01/97 KVN Added some code for Cyrix Gx86 & Cx5510 and VSA VGA ;R112A 03/27/97 AVN Fixed Onboard AHA7880 haun in init ROM, if 2M ROM ; support, because init AHA7880 need 64k space RAM at ; last, so must clear 4000h - 7fffh. ;R118 03/21/97 AVN Added MXIC 28F002TTC EEPROM support. ;R117 03/14/97 LAW Added "KCI_LOGO" ;R111B 03/14/97 LAW Added ALi51xx PCI_RESET when halt on post 05h ;R111A 03/12/97 LAW Added SMC37C93x PCI_RESET when halt on post 05h ;R116 03/12/97 KVN Add "No_Auto_Switch_to_Text" definition ;R115 03/10/97 RCH Added keyboard & mouse port swapping for super I/O ; SMC37C932. The switch is "KBC_KBDMOUSE_SWAP" ;R114 03/07/97 TNY Add "No_Show_Graphic_POST_MSG" definition. ;R113 03/07/97 AVN Added CSI CAT28F001P, MXIC 28F2000TPC EEPROM support. ;R112 03/03/97 KVN Added ACPI function support ;R111 03/03/97 LAW Fixed ITE8680/W83967AF/W83977AF/SMC37C67X with some ; power supply halt on post 05h ;R110 02/19/97 AVN Fixed AMD 29F002T EEPROM Auto Detect Fail. ;R103A 02/14/97 KVN Fixed no show full screen logo bug on 2M BIOS and you ; combine logo pattern at first area ;R109 02/04/97 LAW Add Tiger_Logo ;R104B 01/31/97 RCH Also fix AHA/2940 display "Memory Error" for P6 system ;R108 01/29/97 JKY Add code for save CMOS data to Flash ROM(SST only) ; by Advantech request (define CMOS_BACKUP_SUPPORT) ;R104A 01/27/96 RCH AHA/2940 display "Memory Error" while system warm ; booting ;R107 01/24/97 AVN Added CATALYST (CSI) CAT28F002T Support. ;R106 01/23/97 RAY Move PCI VGA related codes to PCIPOST.ASM ;R105 01/23/97 KVN Always hook INT10h ISR even none any display card on ; motherboard for display ASCII 7 to beep ;R104 01/22/97 KVN Don't clear 256K-640K RAM area for POST decompress ; after memory test(POST 31h) ;R84A 01/16/97 RCH Load 40Mhz as default for Pentium Pro and Klamath ; platforms cause system hang at POST 0BH for some ; specific DRAM type. Load 50Mhz to fix it. ;R103 01/15/97 KVN Remove P6 micro code to ROM driver pool from 0E000h ; POST location ;R102 01/10/97 LAW Added use ALi514x always define "DATE_ALARM_SUPPORT" ;R101 01/10/97 AVN Added 2M BIOS Support WINBOND W29C020 EEPROM. ; And Save Codes. ;R95B 01/07/97 AVN Fixed Mistake For INTEL 28F002 BX-T Updata ESCD Fail. ;R46A 12/31/96 RCH Modify memory high limit to support DRAM up to 1Gb ;R100 12/28/96 LAW Added SMC93x KEYLOCK USE GPIO pin control and display ; error message ;R99 12/21/96 TNY Add "No_Disable_PS2_Mouse_In_POST5" for QDI, ; QDI's M/B (with NS307) appears KB error sometimes. ;R98 12/20/96 LRY Special testing memory for VGA share memory ;R97 12/13/96 DNL Added notebook keyboard controller support ;R95A 12/12/96 AVN Fixed Full Screen Logo Failure for BIOS supporting ; flash type auto-detection ;R96 12/11/96 KEN Modification for non-Intel chipset's USB legacy support. ;R95 12/10/96 AVN Suppost Auto Detect EEPROM ID at POST 6 For 1M EEPROM ; By Define 'AUTO_CHK_1M_EEPROM' ;R94 12/10/96 RAY To detect CPU type for AMD & Intel in POST 9 instead ; of in POST 10. This is done to prevent some new CPU ; such as AMD K6 will hang up at POST_9' CYRIX_INIT. ;R93 12/10/96 LAW Some EPA_LOGO too long then warm boot auto detect HDD ; can be cover the logo ,so must define "ALWAYS_SHOW_CPU_TYPE" ;R89A 12/07/96 RAY Save codes for showing CPU P-Rating ; Also change the BIOS from showing 'PXXX CPU' to ; 'PXXX CPU Found' such that the screen doesn't looked ; so stupid ! ;R92 12/05/96 RAY Enable Write Allocation for AMD K5 CPUs ;R91 12/05/96 DNL Do not check keylock error if system is notebook. ;R90 12/04/96 RAY Do not show P-rating in the current stage and will ; wait for AMD's further information. ;R89 12/03/96 RAY By AMD's request: ; ; Do not show the actual internal CPU clock for AMD ; & Cyrix CPU on screen by default. ; ; Add switch: DISP_MHZ_FOR_AMD_CYRIX to bypass the ; above default, i.e. always show internal clock ; ;R88 12/03/96 KVN Add F000h shadow read/writeable check ;R87 12/02/96 RAX Not report FDC error for notebook ;R86 12/02/96 RIC Add 'Special_DRAM_Test_Pattern' define for special ; DRAM patten test. ;R85 11/30/96 RAY Move all the CPU related code to CPUPOST.ASM for ; easy debugging ;R84 11/28/96 RAY Problem: ; ; Some BIOS hangs up at POST 0Bh when CMOS is cleared ; ; Fixed: ; ; Load pre-defined clock as 40MHz for 586 system and ; above so that the auto-table offset will be ; reasonable. ; ;R52F 11/28/96 LAW show NEW Super_KOREA_logo 136 * 126 "SEJIN" ;R56C 11/20/96 RAY Fix coding mistake of R56B which will cause PS2 ; mouse not working ;R56B 11/19/96 LAW Call Cut_IRQ12 again beause of AUTO_IO.asm Call PRG ; _SUPER_IO_CHIP after Cut_IRQ12 ;R83 11/15/96 TNY Some chip (ie:piix4) support date alarm, if the date ; alarm value is not zero cause IRQ8 failed. We should ; clear date alarm value at post. ; (option:DATE_ALARM_SUPPORT) ;R82 11/13/96 RCH Added a switch to improve 6x86 CPU cache hit rate for ; CCT386 testing. This switch can improve hit rate ; from 26% to 62% for 256Kb cache. ;R81 10/29/96 RAY Create a RTC default table if RTC time is invalid. ; This is to Fix setup screen mess up after clearing ; CMOS. ;R80 10/24/96 RCH Added L2 cache sizing & initialization for Klamath ; CPU. ;R76A 10/23/96 RAY Fixed coding mistake of R76, it cause year can not ; be saved in CMOS setup if the year over 1999. ;R79A 10/23/96 RCH Fixed 6x86 CPU can not display correct clock ;R79 10/22/96 RCH Support CPU clock over 255MHz for Klamath CPU. ;R78 10/17/96 KEN Fixed bug that BIOS report no keyboard error when ; no AT keyboard pluged, but USB keyboard present. ;R77 10/16/96 AVN Added 2M BIOS Support MXIC 28F2000PPC EEPROM. ; Define 'MXIC_28F2000PPC' ;R76 10/15/96 RAY Move the code in POST_11s which set the century as ; 20 & 19 to E8POST.ASM as a subroutine. This routine ; will be called from POST_11S & also from POST_99S ; in case the the RTC year is updated to 00h within ; the time range of POST 11 & 99. ;R75 10/11/96 RCH Kill unused external procedure & added NO_FAST_A20 ; switch to save codes ;R70B 06/10/96 LAW Change PHILIPS_LOGO show time ;R74 10/07/96 RCH The APIC initial should be done before enabling USB ; legacy support ;R67A 10/07/96 RCH Fixed QAPLUS hang while warm booting with 512K L2 ; cache and ISA VGA plugged. ;R73 09/26/96 RCH Added quick memory testing for P6 BIOS ;R72 09/25/96 RCH Rewrite some routine to get more space ;R71 09/25/96 RCH Skip some unused codes for P6 BIOS to get more space ;R70A 09/25/96 LAW Change PHILIPS_LOGO color ;R70 09/24/96 LAW Added "PHILIPS_LOGO" support ;R69 09/23/96 DNL Added codes for Notebook Power Management ;R68 09/23/96 AVN Added 2M BIOS Support INTEL 28F002BXT EEPROM. ;R67 09/21/96 RCH Speed up memory testing for warm boot and 0V resuming ;R65A 09/17/96 RCH Fixed system hang if no VGA card installed ;R52E 09/17/96 LAW Fixed Adaptec Use chr(10) & chr(11) So define "Super ; Korea_Logo" don't show it's two char. ;R66 09/11/96 RCH Should set mask bit of A35-A32 for P6 MTRRs ;R52D 09/09/96 LAW show Super_KOREA_logo 136 * 126 ;R65 09/07/96 RCH Procedure REPORT_ERR_WSPKR is only used by POST, so ; put it in E-segment. ;R64 09/03/96 RCH Get boot sequence from BIOS data area instead of ; reading CMOS value ;R63 09/03/96 KEN Update USB structure to support USB device hot-plug. ;R56A 08/30/96 RCH This routine will be skipped if PS2_SELECTABLE defined ; and user choic "disable" for this item ;R62 08/30/96 DNL Fixed bug of keyboard have no function if PHOENIX KBC ; used ;R59B 08/30/96 AVN Fixed if PnP Use DALLAS NVM and Complier Fail, So ; Added 'FLASH_SUPPORT' Define For 2M Falsh Support. ;R52C 08/28/96 LAW Chang AWARD LOGO to ascii 1bh - 1fh ;R61 08/21/96 RCH Only keep one mirco-code in BIOS to pass INTEL's tests ;R60 08/21/96 LAW Add background color for mycomp ZET_EPA_LOGO ;R52B 08/21/96 LAW show 3 color & 128 * 112 big EPA_LOGO ;R59A 08/21/96 AVN Fix Include Mistake. ;R59 08/20/96 AVN Detect EEPROM Type at post 6, to support 2M EEPROM ; for save more code in F segment. ;R58 08/17/96 RCH POST code becomes abnormal if USB_SUPPORT is used. ;R57 08/16/96 KVN Fixed 2M bios with FULL_SCREEN_LOGO hang at 0c3h bug ;R56 08/16/96 RCH BIOS should enable Tri-state of IRQ 12 if no PS2 ; mouse plugged for super I/O with built-in KBC, ; in order to release IRQ 12 for ISA or PCI ;R55 08/15/96 JSN Add Not_Init_Cyrix define for ALi M6117 ;R52A 08/14/96 KVN Add bottom color 2 row support ;R30B 08/12/96 DNL Some chipset (Intel Mobil Triton) need to disable I/O ; decode rigister to disable COM & LPT port really ;R54 08/09/96 RAY Add auto COM & LPT support ;R53 08/09/96 TNY Add "Special_Patch_For_Abit_P6" for 2a69ha19.cfg ; Because their M/B hang at C1h when 16M unbalance ; DRAM plugeed. ;R52 08/08/96 KVN Added customer EPA LOGO support ;R17D 08/07/96 RCH Fixed error coding of R17C , this cause 6x86 hang up ; while L2 cache is turned on. ;R17C 08/05/96 KGN Bypass 0.5M cacheable for shall memory ;R51 08/05/96 RCH Some customers won't display real clock for 6x86 CPU ;R50 07/26/96 RCH Some customers want to support 6x86 CPU with 50x1,60x1 ; and 66x1 ;R49 07/24/96 RCH Let routine "F000_Set_Cyrix" be public ;R44C 07/23/96 KEN Modified for initializing USB keyboard earlier. ;R48 07/22/96 RCH Display ODP & MMX for P6 CPUs ;R47 06/18/96 RCH Skip memory clearing to enter setup as soon as ; possible for large memory installed ;R46 06/18/96 RCH Modify memory high limit to support DRAM up to 512Mb ;R44B 06/14/96 TNY Fix coding error, otherwise KBD_STATUS error is always ; not present when no PS2 mouse support. ;R45 06/10/96 KGN Add defin Beep_Before_Boot for USI ;R44A 06/07/96 KEN Remove codes of calling Usb_Kbd to E8POST.ASM that it ; should be done after SMI_Handler being setup. ;R42A 06/03/96 RCH Reduce clock checking value for 200Mhz to prevent ; 200Mhz detected as 180Mhz ;R44 05/28/96 KEN Add USB_SUPPORT ;R43 05/21/96 RCH Added PENTIUM 225Mhz(75x3) support ;R42 05/21/96 TNY Add NEW_P6_200_TBL definition for QDI. ;R39A 05/11/96 RCH Clear shutdown byte CMOS for PCI reset as soon as ; possible. ;R41 05/11/96 RCH Take all codes of R37 off due to resource assign ; conflict. Old code was saved as E0POST.511 ;R40 05/10/96 KVN Display exact HDD fail drive ;R39 05/09/96 RCH Restore warm flag from CMOS if PCI reset fucntion is ; supported ;R34A 05/08/96 RCH Also open 210,233 & 240Mhz for PENTIUM CPUs(CPU name ; is Tillamook of INTEL) ;R37C 05/07/96 RCH R37 cause all non-PnP BIOS can not program super I/O ; correctly. ;R37B 05/06/96 RCH Fixed WIN/95 can not find COM & LPT ports due to later ; super I/O initialization ;R30A 05/06/96 RAY Fix bug: Under some conditions, the BIOS will show ; "Conflict I/O: 000" ;R38 05/06/96 RAY Bug: - Setup set to "Halt on : All but Keyboard" ; - Keyboard is lock ; ====> no error message but still wait for "F1" ; ; Reason: this is due to Keylock error is recorded ; in FIXED_ERROR[BP], the old code checked ; for FIXED_ERROR[BP], FLOPPY_ERROR[BP] ; whether to stop for F1 if it is not set to ; "Halt on : No errors", "Halt on : All but ; diskette" or "Halt on : All but disk/key" ; ;R37A 05/06/96 RAY Fix R37 coding mistake ;R37 05/03/96 RAY 1. Initialize PnP device which request for COM/LPT ; addr before we init the onboard devices, i.e. card ; devices has higher priority that the onboard ; devices ! ; ; 2. Also, the BIOS will report conflict. ; ; Reason : Most PnP FAX/MODEM card request for COM addr ; ;R36 05/02/96 DNL Added codes for Notebook Power Management ;R35 05/02/96 KVN Fixed musted to clear [CDROM_Exist_Flag] value before ; Auto_IDE_Detect function otherwise HDD will detect none ;R34 05/01/96 RCH Added 210,233 & 240Mhz support for P6(Klamath) CPU ;R33A 04/30/96 RCH Fixed error coding of R33 , this cause all ISA/VGA ; cards hang at POST 0DH ;R33 04/30/96 RAY Enable C000 shadow R/W before initializing VGA BIOS. ; This is stated in PCI specification & is strongly ; request by PCI SIG. ;R32 04/27/96 RAY Check Update-In-Process bit when writing to RTC ; This will prevent system from accidentally set the ; system time to default year: 1996 ;R31 04/23/96 DNL Modify code to save space ;R30 04/19/96 RCH Added routine to display conflict I/O for COM & LPT ; ports and halt system for user to change CMOS setup ; for super I/O. Note: it need a routine named ; "Disable_SuperIO_ComLptPort" in .SIO file ;R29 04/17/96 RCH Added a hook to do special program before VGA ROM ; initial. ;R28 04/12/96 TNY Add Higher_120MHz_Tbl definition. ;R26B 04/11/96 RCH MP initial should be programmed earlier due to system ; hang of reading Time Stamp Counter for PENTIUM multi- ; processors support ;R26A 04/11/96 RCH Fixed Some TRITON M/Bs detect 90Mhz as 83Mhz ;R27 04/09/96 KVN Added P6 BIOS update feature ;R26 04/05/96 RCH Change CPU clock detection alorigthm to get more ; accurate CPU clock. Note: this new algorithm only ; available for INTEL PENTIUM & P6 CPUs ;R25 04/05/96 RCH Added a switch to skip 110Mhz clock support ;R24 04/02/96 DNL Added C&T,Cirrus LCD controller support ;R23 04/02/96 RCH Hide some standard items for special customer (ECS) ; "floppy seek","boot up speed" & "typematic rate" ;R22 03/27/96 KVN Fixed bug for execute awdflash.exe hang if support one ; full 640X464 logo ;R21 03/27/96 RCH The MP table should be modified to report PCI level ; trigger IRQs to OS for new INTEL I/O APIC, otherwise ; MP OS can not boot on PCI card. ;R17B 03/25/96 KGN Reset Cyrix 6x86 Cacheable Address setting ;R20 03/25/96 RAY Force display type to mono when no display card is plugged ;R15A 03/25/96 RAY Save codes for R15 ;R19 03/22/96 DNL Added table for P54CT-125 ;R18 03/21/96 DNL Added Pentiem-100 CPU for 50MHzx2 mode ;R17A 03/20/96 JSN Use old Cyrix 6x86 Cacheable function for ALI M152x, ; some chipsets(support share) will hang when M1 pluged. ;R17 03/19/96 KGN Change Cyrix 6x86 Cacheable Address setting ;R16 03/14/96 HTR Special_Cyrix_Tbl_For_VSI59X ;R15 03/14/96 RCH Some chipsets will wrap around memory address if ; access address beyond chipset top address. so add ; checking to avoid error memory sizing. ;R14 03/06/96 RCH Support P6 BIOS update code with multiple stepping ;R13 03/04/96 AVN Fixed Triton II Somtime CPU 180MHz Show 200MHz, ; Add "Higher_200MHz_Tbl" define in bios.cfg ;R12 02/28/96 RAY Add BIOS.CFG switch: No_Report_Cmos_Error ;R11 02/16/96 KVN Fixed AWARD logo display wrong ;R05B 02/16/96 KVN The ATi-MACH64 VGA card have updated ROM ;R04A 02/16/96 RCH There two combinations for 150Mhz of 6x86, BIOS have ; to check the clock mode and set right host clock ; 50Mhz for 3x mode and 66Mhz for 2x (75x2) mode, ; because chipset only support up to 66Mhz, no 75Mhz ;R08A 02/15/96 TNY Add RePrepare_LMEM_RESOURCE hook. ;R09A 02/15/96 KVN Fixed bug for execute awdflash.exe hang ;R10 02/14/96 TNY Public CompressVga_Seg for PCIPOST to used. ;R09 02/14/96 KVN Added 640x480 logo display ;R05A 02/14/96 KVN Fixed some SCSI card display string error ;R08 02/13/96 TNY Support new VGA BIOS which's size is tenderable. ;R07 02/09/96 RAY Support new VGA BIOS which's size is larger than 32k. ;R06 02/08/96 KVN Initial POST_temp_byte value ;R05 02/07/96 KVN Fixed ATi-MACH64 VGA card show POST screen error after ; screen change scanline ;R04 02/07/96 RIC Add Cyrix 6x86-P200+ (speed=75*2=150) CPU type. ;R03 02/06/96 RIC Fix Lucky-Start CPU Speed 166 sometimes show 180. ; Add "LUCKY_START_166_CPU_DETECT" define in bios.cfg ;R02 02/03/96 RIC Modify P24C-83 CPU Speed Detect Value 80 to 81, ; Because Pentiem-75 CPU Speed Show '83' in VLSI Lynx. ;R01 02/02/96 DRS Add hook Weitek_Share_Vga_GCLK for special WEITEK onboard VGA ;R00 01/26/96 RCH Clean all revisions and start from R00 , old file ; is saved as e0post.125 .386P ;[]-----------------------------------[] ; ; Award Software 386/486 BIOS ; Power-On Self-Test located in E0000-E7FFF area ; ; Copyright (C) 1996 ; Award Software, Inc. ; All Rights Reserved ;[]-----------------------------------[] .XLIST INCLUDE BIOS.CFG ifndef No_Support_4_IDE ;support 4 HDDs as default Support_4_IDE EQU 1 endif ;No_Support_4_IDE INCLUDE BTROMSEG.EQU ;R59A INCLUDE COMMON.EQU INCLUDE POST.EQU INCLUDE ATORGS.EQU INCLUDE PORT61.EQU INCLUDE 8042.EQU INCLUDE 8259.EQU INCLUDE COMMON.MAC INCLUDE POST.MAC INCLUDE USERINT.MAC ;R59A INCLUDE PNP.EQU ;R59 ifdef RPB_ENABLED ;R143 INCLUDE rpb.cfg ;M01 INCLUDE rpb_err.equ ;R143 endif ;RPB_ENABLED ;R143 ifdef Ct_Special_Do_InPost_60 ;R264 extrn Ct_Special_Do_InPOST60:near ;R264 endif ;Ct_Special_Do_InPost_60 ;R264 ifdef Elan400 ;R250 extrn Elan_CPU:Near ;R250 endif ;Elan400 ;R250 ;M01 - starts ifdef RPB_ENABLED ifdef RPB_BOOT_FAIL_TRIGGER extrn rpbf_preboot_agent_trigger:near endif ;RPB_BOOT_FAIL_TRIGGER endif ;RPB_ENABLED ;M01 - ends ;R249 - Starts ifdef Three_FullLogo_CMOS extrn ShowLOGO_selectable_Item:near endif ;Three_FullLogo_CMOS ;R249 - End ;R243A - start ifdef MSG_CMOS extrn PostMsgSelectItem:near endif; MSG_CMOS ;R243A - end ifdef Always_QUICKPOST ;R237 Show_Total_After_Memory_Test equ 1 ;R237 endif ;Always_QUICKPOST ;R237 ifdef CUSTOM_LCD_OUTPUT ;R241 extrn Lcd_Init:far ;R241 extrn Lcd_Display_Msg:far ;R241 endif; CUSTOM_LCD_OUTPUT ifdef Show_PS2_UnConnect_Message ;R219 EXTRN MOUSE_ERR_STR:NEAR ;R219 endif ;Show_PS2_UnConnect_Message ;R219 ifdef New_Swap_Fdd_Method ;R217 extrn Fdd_Item:near ;R217 endif ;New_Swap_Fdd_Method ;R217 ;R188 -start ifdef Bootblock_16K_Support ifdef Automatic_Load_Awdflash ifNdef No_Automatic_Load_Awdflash_InPOST ;R225 extrn POST_Awdflash_Check:near extrn TO_ENTER_Awdflash:near ifdef Graphics_Post extrn TO_ENTER_Awdflash1:near endif ;Graphics_Post endif ;No_Automatic_Load_Awdflash_InPOST ;R225 endif ;Automatic_Load_Awdflash endif ;Bootblock_16K_Support ;R188 -end ;R216 -start ;R216cifndef Flash_16K_8K_8K_Unit ;R216b ifdef CMOS_Default_in_Flash extrn XCALL_PROC:near EXTRN Search_CMOS_label:near EXTRN Check_Flash_CMOS:near extrn DRAM2FLASH:near ;;;05/05 extrn CMOS_DRAM_CHECKSUM:near ;;;05/05 endif ;CMOS_Default_in_Flash ;R216cendif ;Flash_16K_8K_8K_Unit ;R216b ;R216 -end ifdef PCI_BUS ;R240 extrn Patch_LanBoot:near ;R240 endif; PCI_BUS ;R240 extrn POST_decompress:near ;R152D ifdef HPM_Support ;R176 extrn Init_HPM:Near ;R176 extrn Post_init_hpm:Near ;R176 extrn Check_HPM_Resume:Near ;R176A endif ;HPM_Support ;R176 ;R218 start ifdef VSA_VGA ifdef DSTN_9210_Support ;R233 extrn New_DSTN_Panel:far ;R233 endif ;DSTN_9210_Support ;R233 ifdef S2D_SUPPORT extrn Check_VSA_resume:near endif ;S2D_SUPPORT endif ;VSA_VGA ;R218 end ifdef JUMPER_CMOS_CLEAR_SUPPORT ;R149 extrn Ct_Cmos_Jumper_Chk:near ;R149 endif; JUMPER_CMOS_CLEAR_SUPPORT ;R149 ;R168 - start ifdef LAN_BOOT_SUPPORT extrn LanBoot_Item:near endif; LAN_BOOT_SUPPORT ;R168 - end ;R223 -start ifdef POST_ERROR_TO_DMI_EVENT_LOG extrn PNP_BIOS_Real:far extrn TEMP_MEM:abs extrn Write_Item_Value:near ;R223A endif ;POST_ERROR_TO_DMI_EVENT_LOG ifdef DMI_EVENT_LOG_IN_SETUP extrn DMI_Event_Log_Item:near extrn Clear_DMI_Event_Log_Item:near endif ;DMI_EVENT_LOG_IN_SETUP ;R223 -end ifndef No_Post_Auto_IDE_Detect ;support auto-HDD detection as default Post_Auto_IDE_Detect equ 1 endif ;No_Post_Auto_IDE_Detect extrn xcall_proc:near ;R145 extrn E000_Enter_Prot_mode:near ;R67 extrn E000_Back_Real_Mode:near ;R67 extrn BootSeq_Item:near ;R64 ifdef CUT_IRQ12_BY_CT ;R210 extrn CT_Cut_Irq12:near ;R210 endif; CUT_IRQ12_BY_CT ;R210 ifdef NEW_SUPERIO_KERNEL ;R56 extrn Cut_Irq12:near ;R56 endif; NEW_SUPERIO_KERNEL ;R56 extrn Temp_Int06:near ;R26 ;R30 - start ifdef PNP_BIOS ifdef NEW_SUPERIO_KERNEL ifdef CT_IO_DECODE ;R30B extrn Ct_Disable_IO_DECODE:near ;R30B endif ;CT_IO_DECODE ;R30B extrn Disable_SuperIO_ComLptPort:near ifdef Secondary_IO_Use ;R228 extrn Disable_SecondIO_ComLptPort:near ;R228 endif; Secondary_IO_Use ;R228 extrn Get_Node_IO:near endif; PNP_BIOS endif; NEW_SUPERIO_KERNEL ;R30 - end ifdef Support_4_IDE extrn HDDE_ITEM:near extrn HDDF_ITEM:near endif ;Support_4_IDE IF BUS_TYPE EQ EISA_BUS extrn Eisa_Early_Init:near extrn Init_Eisa_Slots:near extrn Eisa_Error_Chk:near endif;BUS_TYPE EQ EISA_BUS ifdef MP_SUPPORT extrn If_MP_PLUGGED:near endif; MP_SUPPORT ifdef ACPI_SUPPORT ;R156A extrn ACPITableAddress:near ;R156A extrn ACPINVSAddress:near ;R156B extrn RSD_PTR:near ;R182 extrn Ct_ACPI_Option:near ;R182 extrn ACPI_RESERVED_MEM:near ;R244 ifdef SIMPLE_BOOT_SUPPORT ;R245 Show_Total_After_Memory_Test equ 1 ;R245 endif ;SIMPLE_BOOT_SUPPORT ;R245 ifdef S4_SUPPORT ;R245 Show_Total_After_Memory_Test equ 1 ;R245 endif ;S4_SUPPORT ;R245 endif ;ACPI_SUPPORT ;R156A ifdef PS2_SETUPABLE extrn PS2_select_item:near extrn Clear_Ps2Mouse_Flag:near ;R251 - start ifdef USB_SUPPORT ifdef USB_MOUSE_SUPPORT ;R255 extrn Usb_Mouse_Item:near extrn Report_USB_Mouse_Support:near ;R255 endif ;USB_MOUSE_SUPPORT endif ;USB_SUPPORT ;R251 - end endif ;PS2_SETUPABLE extrn E_F000_Shadow_W:near ;R150 extrn E_F000_Shadow_R:near ;R150 QUERY_SYSTEM_ADDRESS_MAP EQU 1 ;enable INT 15H , 0E820H ifdef QUERY_SYSTEM_ADDRESS_MAP extrn ExtData1Kb:near extrn ExtMem128Mb:near ;R150 extrn F000_Shadow_W:near ;R150 extrn F000_Shadow_R:near endif; QUERY_SYSTEM_ADDRESS_MAP ;R185Mono_Card_support = 1 ;R181 ;R185ifdef EPA_LOGO_Use_Graphics ;R181 ;R185FULL_SCREEN_LOGO EQU 1 ;R181 ;R185CENTER_SHOW_LOGO EQU 16 ;R181 ;R185No_Show_Graphic_POST_MSG EQU 1 ;R181 ;R185AWARDLOGO_COLOR EQU LIGHTBLUE ;R181 ;R185endif; EPA_LOGO_Use_Graphics ;R181 ;R185ifndef EPA_LOGO_Use_Graphics ;R181 ;R185ifdef FULL_SCREEN_LOGO ifdef Graphics_Post ;R185 ;R198 ifdef Notebook_Power_Management ;R69 if STD_Function EQ 1 ;R198 extrn Resume_POST_MSG:near ;R69 endif ;STD_Function EQ 1 ;R198 ;R198 endif ;Notebook_Power_Management ;R69 ifndef No_Show_Graphic_POST_MSG ;R114 extrn Graphic_POST_MSG:near endif ;Notebook_Power_Management ;R69 extrn POST_INT9_Vect:near extrn KBDINT_VECT:near endif; Graphics_Post ;R185 ;R185Mono_Card_support = 0 ;R181 ;R185endif ;FULL_SCREEN_LOGO ;R185endif; EPA_LOGO_Use_Graphics ;R181 ;R198 - start if STD_Function EQ 1 EXTRN Check_0V_Resume:NEAR EXTRN Show_PM_Config:NEAR EXTRN Notebook_Resume:NEAR endif ;STD_Function EQ 1 ;R198 - end ifdef PM_SUPPORT EXTRN PM_Sign_On_Msg:NEAR IFDEF NoteBook_Power_Management ;R198 EXTRN Check_0V_Resume:NEAR ;R198 EXTRN Show_PM_Config:NEAR ;R198 EXTRN Notebook_Resume:NEAR ;R173 ifndef NO_LCD_DISPLAY ;R24 ;R173 LCD_CRT_OPTION EQU 1 ;R24 ;R173 endif ;NO_LCD_DISPLAY ;R24 ENDIF ;NoteBook_Power_Management ;R173 ifdef LCD_CRT_OPTION ;R24 ;R173 ifdef ONBOARD_PCI_VGA ;R163 ;R173 extrn PCI_VGA_INFO:near ;R163 ;R173 endif ;ONBOARD_PCI_VGA ;R163 ;R173 extrn Set_SimulScan:NEAR ;R24 ;R173 endif ;LCD_CRT_OPTION ;R24 extrn PM_Option_Check:near extrn EARLY_PM_INIT:near extrn Cfg_Video_Mode:near ifndef NO_EPA_LOGO extrn EPA_pattern:NEAR endif ;NO_EPA_LOGO ;R181 extrn Award_Mark_Font:Near extrn Ct_PMRAM_Use_SYSRAM:near extrn PM_INIT:near extrn Ct_PM_Final_Init:Near endif; PM_SUPPORT if EPA_LOGO_Switch ;R181 extrn Award_Mark_Font:Near ;R181 endif ;EPA_LOGO_Switch ;R181 ;R173 start ifdef LCD_CRT_OPTION ifdef ONBOARD_PCI_VGA extrn PCI_VGA_INFO:near endif ;ONBOARD_PCI_VGA extrn Set_SimulScan:NEAR endif ;LCD_CRT_OPTION ;R173 end ifdef AUTO_CFG_IO extrn AUTO_CFG_IDE_PORT:near endif; AUTO_CFG_IO ifdef Turbo_Pin_Handler extrn TB_SW_Input_Item:near endif ;Turbo_Pin_Handler ifdef QUERY_SYSTEM_ADDRESS_MAP extrn Setup_PS2:Near endif; QUERY_SYSTEM_ADDRESS_MAP ifdef No_Cyrix_Mark_For_M6M7 extrn Cyrix_Detect:near endif ;No_Cyrix_Mark_For_M6M7 ifdef PCI_BUS extrn PCI_VGA_FOUND:abs ;R33A extrn PciRom_Before_Init:near extrn PciRom_After_Init:near extrn Copy_ROM:Near extrn Disable_UnUsed_Shadow:near ;R08A extrn Before_PciVGARomInit:near ;R29 extrn Move_VGA_BIOS_To_C000:Near ;R106 extrn Release_Shadow_From_PCI_VGA:Near ;R106 extrn fPatch_Ebda_Usage:far ;R187 endif; PCI_BUS ifdef PNP_BIOS extrn PNP_System_Resource:near extrn PNP_Early_Init:near extrn PNP_Video_Init:near extrn PNP_BootDev_Init:near extrn PNP_OptROM_Init:near extrn PNP_Final_Init:near extrn PNP_IPL_Init:near extrn PNP_Disp_Logo:near extrn PNP_SuperIO_Init:near extrn Kill_Onboard_PnP_IO:near ifdef NEW_SUPERIO_KERNEL extrn Superio_Early_Init:Near ;R159 endif ;NEW_SUPERIO_KERNEL endif ;PNP_BIOS ;R164B - start ifdef Password_ON_NOW_SUPPORT ifdef MOUSE_BUTTON_ON_SUPPORT Init_PS2Mouse_at_POST EQU 1 endif; MOUSE_BUTTON_ON_SUPPORT endif; Password_ON_NOW_SUPPORT ;R164B - end Early_Init_PS2Mouse = 0 ;R169 ;R164Aifdef Password_ON_NOW_SUPPORT ;R164 ;R164Aifdef MOUSE_BUTTON_ON_SUPPORT ;R164 ;R164A Early_Init_PS2Mouse = 1 ;R169 ;R169 extrn Init_Ps2Mouse_Proc:near ;R164 ;R164Aendif; MOUSE_BUTTON_ON_SUPPORT ;R164 ;R164Aendif; Password_ON_NOW_SUPPORT ;R164 ifdef Init_PS2Mouse_at_POST ;R169 Early_Init_PS2Mouse = 1 ;R169 endif; Init_PS2Mouse_at_POST ;R169 if Early_Init_PS2Mouse ;R169 extrn Init_Ps2Mouse_Proc:near ;R169 endif; Early_Init_PS2Mouse ;R169 ifdef CLEAR_PASSWORD_SUPPORT extrn Ck_Password_Switch:near endif ;CLEAR_PASSWORD_SUPPORT ifdef NO_SYSTEM_CONFIG extrn AX_To_DEC3:Near extrn Show_SIX_DIGIT:near endif ;NO_SYSTEM_CONFIG ifdef VGA_SHARE_MEMORY extrn Ct_Share_Memory_Size:near endif ;VGA_SHARE_MEMORY ifdef SPECIAL_SHARE_MEMORY_SHOW ;R98B extrn Ct_Share_Memory_Size:near ;R98B endif ;SPECIAL_SHARE_MEMORY_SHOW ;R98B ifdef Special_for_Weitek ;R01 extrn Weitek_Share_Vga_GCLK:near ;R01 endif ;Special_for_Weitek ;R01 ;R44AIFDEF USB_SUPPORT ;R44 ;R44A extrn usb_kbd:near ;R44 ;R44AENDIF ;USB_SUPPORT ;R44 ifdef USB_SUPPORT ;R44C ;R96 extrn Ct_SMI_Handler_Init:near ;R44C ;R63 extrn Usb_Kbd:near ;R44C extrn Usb_Init:near ;R63 extrn Report_USB_Keyboard:near ;R78 endif ;USB_SUPPORT ;R44C ifdef NEW_SUPERKBC_KERNEL ;R97 extrn Load_Key_Matrix:near ;R97 endif ;NEW_SUPERKBC_KERNEL ;R97 extrn SPURIOUS_INT_HDLR:near extrn SPURIOUS_soft_HDLR:near ;R215 ifndef PCI_BUS ;R136 extrn Ct_Disable_C8_To_DF_Shadow:near endif; PCI_BUS ;R136 extrn Special_KBC_Init:near extrn Init_Apic:near extrn Show_Processor_Number:near EXTRN ROM_AND_CMOS:NEAR EXTRN ROM_OR_CMOS:NEAR EXTRN A20_OFF:NEAR EXTRN A20_ON:NEAR EXTRN AX_To_HEX3:NEAR EXTRN BATTERY_FAIL_MSG:NEAR EXTRN BCD_TO_BINARY:NEAR EXTRN BIOS_INFORM_STR:BYTE EXTRN BTM_LINE_CLR:NEAR EXTRN BUFFER_8042_FULL:NEAR EXTRN Cache_Init:NEAR EXTRN CKSM_ERROR_MSG:NEAR EXTRN CODE_START:NEAR EXTRN COLDBOOT:NEAR EXTRN COPYRIGHT_MSG:BYTE EXTRN CPU_CACHE:NEAR EXTRN CPU_DISPLAY:NEAR EXTRN CP_INSTALL:NEAR EXTRN Ct_Auto_Check:NEAR EXTRN CT_CACHE:NEAR EXTRN CT_EARLY_SHADOW:NEAR EXTRN Ct_Ext_Mem_Limit:NEAR EXTRN Ct_Math_Detect:NEAR EXTRN Ct_Option_Rom_Scan:NEAR EXTRN Ct_Parity_Control:NEAR EXTRN CT_REMAP:NEAR EXTRN Ct_Show_Config:NEAR EXTRN CURSOR_GET:NEAR EXTRN CURSOR_ON:NEAR EXTRN CURSOR_OFF:NEAR ;R200 EXTRN CURSOR_SET:NEAR EXTRN CYRIX_INIT:NEAR EXTRN DISP_DWORD_INT6:NEAR EXTRN DISP_WORD_INT5:NEAR EXTRN ENABLE_PARITY:NEAR EXTRN EVAL_MSG:BYTE EXTRN EVAL_MSG_CHKSUM:BYTE EXTRN FIXED_DIAG_MSG:NEAR EXTRN FLOPPY_MISMATCH_MSG:NEAR EXTRN FLOPPY_RESET_MSG:NEAR EXTRN FP_INSTALL:NEAR EXTRN GET_CMOS:NEAR EXTRN Get_CPU_Speed:NEAR EXTRN HALT_ERR_MSG:NEAR ;R216 -start ;R216cifndef Flash_16K_8K_8K_Unit ;R216b ifdef CMOS_Default_in_Flash EXTRN test_ERR_MSG:NEAR endif ; CMOS_Default_in_Flash ;R216cendif ; Flash_16K_8K_8K_Unit ;R216b ;R216 -end ifdef Graphics_Post ;R185A EXTRN FULL_HALT_MSG:NEAR ;R185A EXTRN skip_mem_msg1:NEAR ;R185B EXTRN TO_ENTER_SETUP1:NEAR ;R185B EXTRN BTM_LINE_CLR1:NEAR ;R185B EXTRN CLR_SKIP_MEM_MSG1:NEAR ;R185B endif; Graphics_Post ;R185A EXTRN HD_INSTALL:NEAR EXTRN Init_Onboard_Io:NEAR EXTRN INT_TBL:WORD EXTRN IRET_VECT:NEAR EXTRN SIGN_ON_CHKSUM:BYTE EXTRN DISP_BYTE_HEX2:NEAR extrn SPD_DEF:byte EXTRN KBD_ERR_MSG:NEAR EXTRN KB_OUT:NEAR EXTRN KEY_LOCK_MSG:NEAR EXTRN MEM_ERROR_MSG:NEAR EXTRN MS_INSTAL:NEAR EXTRN OK_MSG:NEAR EXTRN OUT_8042:NEAR EXTRN OUT_8042_FULL:NEAR EXTRN OVERRIDE_ENABLE_STR:NEAR ;R177 EXTRN Prg_Auto:NEAR ;R177 EXTRN PRG_CHIPSET:NEAR ;R177 EXTRN PRG_CHIPSET_DEFAULT:NEAR EXTRN fProc_Prg_Auto:Far ;R177 EXTRN fProc_Prg_Chipset:Far ;R177 EXTRN fProc_Prg_Chipset_Default:Far ;R177 EXTRN REDO:NEAR ;R65 EXTRN REPORT_ERR_WSPKR:NEAR EXTRN RST_VECT:NEAR EXTRN R_MOD_CK:NEAR ;R40 EXTRN SECTOR_VERIFY_MSG:NEAR EXTRN SEC_HRDWR_INTS:WORD EXTRN SETSPEED:NEAR EXTRN SETTINGS:BYTE EXTRN Setup:NEAR EXTRN SET_CMOS:NEAR EXTRN SIGN_ON_MSG:BYTE EXTRN SIGN_ON_MSG:BYTE EXTRN SIZE_SYS_INITS:ABS EXTRN SKIP_MEM_MSG:NEAR EXTRN SND_SPKR:NEAR EXTRN SYSTEM1_BYTE:BYTE ;R187 EXTRN SYSTEM4_BYTE:BYTE EXTRN SYSTEM5_BYTE:BYTE EXTRN SYSTEM_BYTE:BYTE EXTRN SYS_INITS:WORD EXTRN TEST_EXT_MSG:NEAR EXTRN TEST_MEM_MSG:NEAR EXTRN TO_ENTER_SETUP:NEAR ;R40 EXTRN UNABLE_INIT_MSG:NEAR ;R40 EXTRN UNABLE_RECALIBRATE_MSG:NEAR ;R40 EXTRN UNABLE_RESET_MSG:NEAR ;R40 start extrn HDD_Drive0_Err_Str:near extrn HDD_Drive1_Err_Str:near extrn HDD_Drive2_Err_Str:near extrn HDD_Drive3_Err_Str:near ;R40 end ;R242 - start ifdef Show_IDE_Changed_Message extrn IDE_Drive0_Changed_Str:near extrn IDE_Drive1_Changed_Str:near extrn IDE_Drive2_Changed_Str:near extrn IDE_Drive3_Changed_Str:near endif; Show_IDE_Changed_Message ;R242 - end extrn Disp_Access_mode:near EXTRN USER_BEGIN:NEAR EXTRN VCRLF:NEAR EXTRN VID_SWITCH_MSG:NEAR EXTRN VNORMAL:NEAR EXTRN VREVERSE:NEAR EXTRN WAIT_REFRESH:NEAR EXTRN WORD_CHECKSUM:BYTE extrn Unlock_Cyrix:near extrn Lock_Cyrix:near extrn F000_Display_String:near ;R227 extrn Display_String:near extrn Display_Char:near extrn Chk_Intel_S_CPU:near extrn Read_Cmos_To_Stack:near ifndef NO_FAST_A20 ;R75 extrn GateA20_Item:near endif; NO_FAST_A20 ;R75 ifndef Support_1_FDD ;R140 extrn SwapFloppy_Item:near endif ;Support_1_FDD ;R140 extrn Set_High_Speed:near extrn Load_Auto_Cfg_D4:near extrn Ct_Disable_E000_Vga:near extrn Ct_Disable_Onboard_Vga:near extrn Ct_Enable_Onboard_Vga:near extrn Ct_Enable_E000_Vga:near extrn CPU_Type_Clk:near IF BIOS_SUPPORT_IBM_CPU EXTRN IBMCPU_Cacheable_Size:Near endif ;BIOS_SUPPORT_IBM_CPU extrn QuickPost_Item:near extrn CLR_SKIP_MEM_MSG:near extrn Read_Memory:Near extrn Later_cache_Sizing:near extrn A20_Byte:byte extrn Virus_Item:near ifdef Support_HDD_Write_Protect ;R147 extrn Hdd_Wt_Protect_Item:near ;R147 endif ;Support_HDD_Write_Protect ;R147 extrn Enter_Setup_Check:near extrn HaltOn_Item:near extrn Verify_Password:near extrn Save_All_Cmos:near ;R75 extrn Parity_Item:near ;R23 extrn BootSpeed_Item:near extrn CT_FINAL_INIT:near extrn DayLight_Item:near extrn NumLock_Item:near ;R23 extrn TypeRate_Item:near ;R23 extrn TypeDelay_Item:near extrn Get_Item_Setup_D4:near extrn Get_Item_Bios_D4:near extrn GetItem_Value:near extrn Restore_Cyrix_Reg:near extrn Out_8042_Pin:near extrn VGA_Buffer:near EXTRN DRIVE_A_ITEM:Near EXTRN HDDC_ITEM:Near ifndef Support_1_FDD ;R140 EXTRN DRIVE_B_ITEM:Near endif ;Support_1_FDD ;R140 extrn Get_HDD_CMOS_Info:near EXTRN Read_Item_Value:Near EXTRN Video_Item:Near EXTRN Show_SIX_DIGIT:Near Extrn Get_Cache_Size:Near ;R252 EXTRN Transfer_Hdd_Parms:Near extrn Wr_Cpu:near extrn Restore_Speed:near ;R23 extrn TypeSpeed_Item:near extrn IntCache_Item:near extrn ExtCache_Item:near extrn E000_Shadow_R:near extrn E000_Shadow_W:near ;R150 extrn F000_Shadow_R:near ;R150 extrn F000_Shadow_W:near extrn C000_Shadow_R:near ;R08 extrn C000_Shadow_W:near extrn C000_Shadow_RW:near ;R08 extrn C800_Shadow:near extrn CC00_Shadow:near extrn D000_Shadow:near extrn D000_Shadow:near extrn D400_Shadow:near extrn D800_Shadow:near extrn DC00_Shadow:near extrn Ct_Shadow_Alone_Check:near extrn Ct_Shadow_Allow:near ;R256 extrn C000_Item:near ifndef No_C8_DF_Shadow_Item ;R193 extrn C800_Item:near extrn CC00_Item:near extrn D000_Item:near extrn D400_Item:near extrn D800_Item:near extrn DC00_Item:near endif ;No_C8_DF_Shadow_Item ;R193 extrn Shadow_Dr:near ;R72 extrn Move_Codes:near extrn E000_Move_Codes:near ;R72 extrn Clear_Parity:near extrn Do_F000_Shadow:Near EXTRN HDDD_ITEM:Near EXTRN Get_VarString_Offset:Near EXTRN AX_To_DEC3:Near EXTRN AX_To_DEC2:Near extrn Mono_Style:near extrn Tran_HDD_User_Type:Near extrn Init_Onboard_Super_IO:near extrn Init_Onboard_AUDIO:near extrn Init_Onboard_Sensor:near ;R144 extrn Auto_Cfg_SuperIO:near ;R54 extrn Preint_19:near extrn Cmos_Check_Sum:near extrn F000_SET_CMOS:near extrn F000_BUFFER_8042_FULL:near extrn F000_OUT_8042_FULL:near extrn CHECK_PS2_MOUSE_SUPPORT:near extrn F000_GET_CMOS:near extrn F000_GETITEM_VALUE:near extrn F000_CPU_CACHE:near extrn F000_OUT_8042:near extrn F000_CURSOR_SET:near extrn DISP_STR_IN_BIOS:near extrn DISP_STR_IN_POST:near extrn F000_VCRLF:near ;R89 extrn DISP_INTEL_S_CPU:near extrn Disp_Extra_CPU_Info:Near ;R89 extrn SYSCFG_CPU_CLOCK1:near extrn TRY_SHADOW:near extrn F000_DISPLAY_CHAR:near extrn ISA_POST_CODE:ABS extrn ISA_POST_TESTS:near extrn RAM_POST_TESTS:near extrn COMMON_POST_CODE:ABS extrn COMMON_POST_TESTS:near extrn RAM_POST_TESTS:near extrn HALTSYSTEM:near extrn TRY_ACTUAL_CACHE:near extrn F000_VNORMAL:near extrn F000_VREVERSE:near extrn WAIT_REFRESH1:near extrn Try_Other_Shadow:near ifdef PCI_BUS ;R07 extrn CT_C8_TO_DF_RW:near ;R07 extrn CT_SHADOW_UNIT:near ;R07 extrn CT_DISABLE_SHADOW:near ;R07 extrn LMEM_RESOURCE:ABS ;R07 extrn LMEM_BEFORE_ROM:ABS ;R07 extrn VGA_BIOS_LENGTH:ABS ;R08A endif ;PCI_BUS ;R07 extrn Get_Cyrix:near extrn Set_Cyrix:near extrn F000_func_end:Near extrn F000_VECT:Near extrn Check_Upd:Near ;R76 extrn Get_Rtc_Byte:near ;R76 extrn Set_Rtc_Byte:near ;R76 extrn Valid_Century:near ;R76 ;R59 - START ifdef FLASH_SUPPORT ;R59B ;R95 ifdef Flash_2M_support ifdef AUTO_DETECT_EEPROM_ID ;R95 ;R266 extrn Ct_ROM_Write_Enable:near ;R266 extrn Ct_ROM_Write_Disable:near ;R266 extrn CT_Enable_ROM_Shadow:near ;R266 extrn CT_Disable_ROM_Shadow:near ;R266;R95 extrn FLASH_ROUTINE_START:near ;R266;R95 extrn FLASH_ROUTINE_LEN:word ;R266;R95 extrn _2M_FLASH_ENTRY_POINT:near ;R266;R95 extrn _2M_FLASH_WRITE_ENTRY_POINT:near ;R266 extrn Ct_Init:near ;R95 ;R266 extrn FLASH_ENTRY_POINT:near ;R95 ;R266 extrn FLASH_WRITE_ENTRY_POINT:near ;R95 ;R266 extrn Ct_Get_Flash:near ;R95 ;R266 extrn Ct_Set_Flash:near ;R95 ;R266 extrn Erase_Delay:near ;R95 ;R266 extrn Write_Delay:near ;R95 ;R266 extrn EEPROM_Wait_10ms:near ;R95 extrn Detect_EEPROM:Near ;R208 ;R95 endif; Flash_2M_support endif; AUTO_DETECT_EEPROM_ID ;R95 endif; FLASH_SUPPORT ;R59B ;R59 - END extrn Enable_M1_FarHit:near ;R85 extrn MEASURE_CPU_SPEED:Near ;R85 extrn MOV_SHAD_SEG:ABS ;R85 extrn Set_Cpu_MtRR:Near ;R85 IF BIOS_SUPPORT_686 ;R85 extrn P6_BiosUpdate:near ;R85 ifdef MP_SUPPORT ;R85 extrn Init_Mtrr:near ;R85 endif ;MP_SUPPORT ;R85 ENDIF ;BIOS_SUPPORT_686 ;R85 IF BIOS_SUPPORT_KLAMATH ;R85 extrn ConfigurePProL2Cache:Near ;R85 ENDIF ;BIOS_SUPPORT_KLAMATH ;R85 IF BIOS_SUPPORT_586 ;R89 extrn Try_Show_PRating:Near ;R89 extrn Check_K6_CPU:Near ;R276 ENDIF ;BIOS_SUPPORT_586 ;R89 ;R276 extrn Check_K6_CPU:Near ;R90 extrn Prg_K5_Write_Allocate:Near ;R92 ;R108 - start ifdef CMOS_BACKUP_SUPPORT extrn Flash_Write:near extrn Flash_Read:near extrn Check_CMOS_Sum:near endif ;CMOS_BACKUP_SUPPORT ;R108 - end extrn CHECK_BOOT_RECORD:near ;R221B extrn Clear_Screen_Str:near ;R232 ifdef JUMPLESS_SUPPORT ;R247 ifdef POWER_ON_PRESS_SPECIAL_KEY_INTO_SETUP_SUPPORT ;R247 extrn into_the_Setup:near ;R247 endif; POWER_ON_PRESS_SPECIAL_KEY_INTO_SETUP_SUPPORT ;R247 endif; JUMPLESS_SUPPORT ;R247 ;R257 - start ifdef Date_DEFAULT_IS_BIOS_MAKE_DAY extrn E000_64K_shadow_RW:near extrn E000_64K_shadow_R:near endif ;Date_DEFAULT_IS_BIOS_MAKE_DAY ;R257 - end .LIST ;Macro for far calling from E-segment and the called routine is in F-segment F000_call MACRO func_addr LOCAL Ret_addr push 0e000h push offset cs:Ret_addr push offset F000_func_end if ((.TYPE func_addr) and 10h) ;func_addr is register? push func_addr ;Yes,direct push else push offset func_addr endif FAR_JMP ,0F000H Ret_addr: ENDM ;[]---------------------------[] ; ; Low memory init (1st 64k) ; ;[]---------------------------[] G_RAM SEGMENT USE16 AT 0 ORG 04H*4 INCLUDE SEG_0.INC ORG 400H INCLUDE G_RAM.INC G_RAM ENDS PAGE EGROUP GROUP ECODE DGROUP GROUP FCODE ECODE SEGMENT USE16 PARA PUBLIC 'ECODE' ASSUME CS:EGROUP,DS:G_RAM,ES:EGROUP ;R26 ;Clock detection is different from P6 CPU and the other CPUs ;R26 ifdef P6_BIOS_ONLY ;R26 ;R26 ALIGN 16 ;R26 MOV_SHAD_OFF EQU 00000H ;R26 ;R22 MOV_SHAD_SEG EQU 02000H ;R26 MOV_SHAD_SEG EQU 8000H ;R22 ;R26 Measure_CPU_Speed proc near ;R26 ;R26 ;-------------------------------------- ;R26 ;Copy code into RAM for speed detection ;R26 ;-------------------------------------- ;R26 ;R26 mov ax,cs ;GET THE SEGMENT ;R26 mov ds,ax ;AND SET UP SOURCE ;R26 mov ax,MOV_SHAD_SEG ;SET THE SEGMENT FOR DEST ;R26 mov es,ax ;R26 lea si,S_Cpu ;GET THE OFFSET FOR SOURCE ;R26 mov di,MOV_SHAD_OFF ;MOVE OFFSET IN FOR DEST ;R26 lea cx,LAST_S_Cpu ;GET SETUP FOR THE LENGTH ;R26 sub cx,si ;GET THE LENGTH OF THE CODE ;R26 ;R26 push cx ;R26 push es ;R26 push di ;R26 ;R26 rep movsb ;MOVE THE COPY CODE ;R26 push 0f000h ;R26 pop ds ;R26 ;R26 in al,PORT61 ;R26 IODELAY ;R26 push ax ;R26 ;R26 push cs ;R26 push offset SHAD_ret_off ;R26 push MOV_SHAD_SEG ;R26 push MOV_SHAD_OFF ;R26 retf ;R26 SHAD_ret_off: ;R26 ;write CPU_INTERNAL_CLOCK[bp] with tested value ;R26 ;R26 mov CPU_INT_CLOCK[bp],al ;actual internal CPU clock ;R26 ;R26 pop ax ;R26 out PORT61,al ;R26 IODELAY ;R26 ;R26 mov al,CPU_INT_CLOCK[bp] ;actual internal CPU clock ;R26 mov si,offset P6_Int_Clock_Tbl ;R26 ;R26 ;far call Round_Off_Clock ;R26 FAR_CALL ,0E000h ;R26 ;R26 mov CPU_INT_CLOCK[bp],bl ;actual internal CPU clock ;R26 push G_RAM ;R26 pop es ;R26 mov bl,cs:[si+2] ;SI+2 = system clock ;R26 mov byte ptr es:[CPU_CLOCK],bl ;R26 ;------------------- ;R26 ;Clear temporary RAM ;R26 ;------------------- ;R26 ;R26 pop di ;R26 pop es ;R26 pop cx ;R26 xor ax,ax ;R26 rep stosw ;clear ram ;R26 ;R26 clc ;R26 ret ;R26 Measure_CPU_Speed endp ;R26 DIVID MACRO ;R26 mov ax,di ;R26 div bx ;R26 endm ;R26 PORT61 EQU 61H ;R26 PORT8254 EQU 42H ;R26 DATA8254 EQU 43H ;R26 COUNT EQU 3EH ;R26 ;R26 ;----------------------------------------------------------------- ;R26 ;Input : None ;R26 ;Output : BH : System Clock in interger ;R26 ; BL : System Clock i.e. 10h = 16MHz ;R26 ; 20h = 20MHz ;R26 ; 30h = 25MHz ;R26 ; 40h = 33MHz ;R26 ; 50h = 40MHz ;R26 ; 60h = 50MHz ;R26 ; 60h = 60MHz ;R26 ; 60h = 66MHz ;R26 ; DH : Actual CPU clock index found ;R26 ; DL : Single/Double/Trible ;R26 ;----------------------------------------------------------------- ;R26 ALIGN 16 ;R26 S_Cpu proc far ;R26 ;R26 cli ;R26 mov al,0fch ;disable counter 2 ;R26 out PORT61,al ;R26 SIODELAY ;R26 mov al,0b4h ;program counter 2 ;R26 out DATA8254,al ;R26 IODELAY ;R26 xor al,al ;R26 out PORT8254,al ;R26 IODELAY ;R26 out PORT8254,al ;R26 IODELAY ;R26 ;R26 mov di,7aaah ;dividend ;R26 mov bx,5555h ;divisor ;R26 xor dx,dx ;R26 mov cx,COUNT ;count ;R26 mov al,0fdh ;enable counter ;R26 out PORT61,al ;R26 SIODELAY ;R26 ALIGN 4 ;R26 Divid_33: ;R26 DIVID ;divide 1 ;R26 DIVID ;divide 2 ;R26 DIVID ;divide 3 ;R26 DIVID ;divide 4 ;R26 DIVID ;divide 5 ;R26 DIVID ;divide 6 ;R26 DIVID ;divide 7 ;R26 DIVID ;divide 8 ;R26 DIVID ;divide 9 ;R26 DIVID ;divide 10 ;R26 DIVID ;divide 11 ;R26 DIVID ;divide 12 ;R26 DIVID ;divide 13 ;R26 DIVID ;divide 14 ;R26 DIVID ;divide 15 ;R26 DIVID ;divide 16 ;R26 DIVID ;divide 17 ;R26 DIVID ;divide 18 ;R26 DIVID ;divide 19 ;R26 DIVID ;divide 20 ;R26 DIVID ;divide 21 ;R26 DIVID ;divide 22 ;R26 DIVID ;divide 23 ;R26 DIVID ;divide 24 ;R26 DIVID ;divide 25 ;R26 DIVID ;divide 26 ;R26 DIVID ;divide 27 ;R26 DIVID ;divide 28 ;R26 DIVID ;divide 29 ;R26 DIVID ;divide 30 ;R26 DIVID ;divide 31 ;R26 DIVID ;divide 32 ;R26 DIVID ;divide 33 ;R26 dec cx ;R26 jz short Finish ;R26 jmp Divid_33 ;R26 Finish: ;R26 mov al,0fch ;stop counter 2 ;R26 out 61h,al ;R26 SIODELAY ;R26 in al,PORT8254 ;read counter 2 low byte ;R26 IODELAY ;R26 mov ah,al ;R26 in al,PORT8254 ;read counter 2 high byte ;R26 IODELAY ;R26 xchg ah,al ;R26 mov si,ax ;store result ;R26 ;R26 xor dx,dx ;R26 mov cx,COUNT ;count ;R26 mov al,0fdh ;enable counter ;R26 out PORT61,al ;R26 SIODELAY ;R26 ALIGN 4 ;R26 Divid_1: ;R26 DIVID ;divide 1 ;R26 dec cx ;R26 jz short Finish1 ;R26 jmp short Divid_1 ;R26 Finish1: ;R26 mov al,0fch ;stop counter 2 ;R26 out 61h,al ;R26 SIODELAY ;R26 in al,PORT8254 ;read counter 2 low byte ;R26 IODELAY ;R26 mov ah,al ;R26 in al,PORT8254 ;read counter 2 high byte ;R26 IODELAY ;R26 xchg ah,al ;R26 mov cx,ax ;R26 sub cx,si ;result 2 - result 1 ;R26 ;R26 ;factor for P6 CPU ;R26 xor ax,ax ;R26 mov dx,0052h ;dividend high word ;R26 ;R26 div cx ;R26 ;R26 xor bl,bl ;R26 Sub_1: ;R26 inc bl ;R26 sub ax,100 ;R26 jc short Fin_0 ;R26 jz short No_Carry ;R26 jmp short Sub_1 ;R26 Fin_0: ;R26 add ax,100 ;R26 ;R26 cmp al,50 ;R26 jae short No_Carry ;R26 dec bl ;R26 No_Carry: ;R26 ;R26 mov al,bl ;R26 add al,3 ;tolerance ;R26 ;R26 ret ;R26 ;R26 ;R26 even ;R26 Last_S_Cpu: ;R26 S_Cpu endp ;R26 ;R26 ;R26 ;[]--------------------------------------------------------------[] ;R26 ;Input : AL = Clock to be compared ;R26 ; SI = table offset ;R26 ; (format: reference System_Clock_Table) ;R26 ; CX = no of entries ;R26 ; ;R26 ;Output : BH = reference value (see System_Clock_Table) ;R26 ; BL = round-offed value ;R26 ; SI = offset which round-offed value locates ;R26 ;[]--------------------------------------------------------------[] ;R26 Round_Off_Clock Proc Far ;R26 Next_Clk_Tbl: ;R26 mov bx,cs:[si] ;R26 cmp al,bh ;R26 jae short @F ;R26 cmp byte ptr cs:[si+3],0 ;last table ? ;R26 je short @F ;R26 add si,3 ;next table ;R26 jmp short Next_Clk_Tbl ;R26 @@: ;R26 retf ;R26 Round_Off_Clock Endp ;R26 ;R26 ;-------------------------------------------------------------------- ;R26 ; round value value ;R26 ; offed for to be put ;R26 ; output reference into G_RAM:CPU_CLOCK ;R26 ;-------------------------------------------------------------------- ;R26 P6_Int_Clock_Tbl: ;R26 db 200, 195, CPU66 ;66x3 ;R26 db 180, 175, CPU60 ;60x3 ;R26 db 167, 163, CPU66 ;66x2.5 ;R26 db 150, 145, CPU60 ;60x2.5 ;R26 ;R26 db 133, 127, CPU66 ;66x2 ;R26 db 120, 110, CPU60 ;60x2 ;R26 db 100, 95, CPU50 ;50x2 ;R26 db 80, 75, CPU40 ;40x2 ;R26 db 0 ;end of table ;R26 else; P6_BIOS_ONLY ;R26 - starts ;R85 ;[]==============================================================[] ;R85 ; ;R85 ;CpuClk_Int08: ;R85 ; ;R85 ; Temporary interrupt service routine for caculating CPU clock ;R85 ; ;R85 ;Saves: NONE ;R85 ; ;R85 ;Entry: NONE ;R85 ;Exit: NONE ;R85 ; ;R85 ;[]==============================================================[] ;R85 ALIGN 4 ;R85 CpuClk_Int08 PROC NEAR ;R85 ;R85 push edx ;R85 ;R85 db 0fh,31h ;ReaD Time Stamp Counter ;R85 cmp dword ptr ds:[4fch],-1 ;high 32 bit value ;R85 je short First_Int ;R85 ;R85 cmp byte ptr ds:[4f0h],0aaH ;second INT ? ;R85 je short Finish_Int ;R85 ;R85 mov edi,dword ptr ds:[4fch] ;high 32 bit value ;R85 mov esi,dword ptr ds:[4f8h] ;low 32 bit value ;R85 ;R85 sub edx,edi ;high 32-bit value ;R85 sub eax,esi ;low 32-bit value ;R85 jnc short No_Dec_High32 ;R85 dec edx ;R85 No_Dec_High32: ;R85 mov dword ptr ds:[4fch],edx ;high 32 bit value ;R85 mov dword ptr ds:[4f8h],eax ;low 32 bit value ;R85 ;R85 ;R85 mov byte ptr ds:[4f0h],0aaH;mark for second INT ;R85 jmp short Finish_Int ;R85 ;R85 ;R85 First_Int: ;R85 mov dword ptr ds:[4fch],edx ;high 32 bit value ;R85 mov dword ptr ds:[4f8h],eax ;low 32 bit value ;R85 ;R85 Finish_Int: ;R85 pop edx ;R85 ;R85 NEWIODELAY ;R85 mov al,END_OF_INT ; eoi command ;R85 out a8259,al ; tell controller ;R85 NEWIODELAY ;R85 ;R85 iret ;R85 CpuClk_Int08 ENDP ;R85 ;R85 ;----------------------------------------------------------------- ;R85 ;Input : None ;R85 ;Output : carry set - this CPU don't have instruction RDTSC ;R85 ; carry clear - this CPU have instruction RDTSC and ;R85 ; BX : CPU clock detected (0-65535Mhz) return ;R85 ;Destroy: use 0:4f8H - 0:4ffH as temporary memory ;R85 ;----------------------------------------------------------------- ;R85 ; ;R85 New_CpuClk_Detection proc near ;R85 ;use RDTSC to check CPU clock if 586 level CPU ;R85 cli ;R85 cmp byte ptr CPU_LEVEL[bp], LEVEL_686 ;R85 je short Yes_Rdtsc ;R85 cmp byte ptr CPU_LEVEL[bp], LEVEL_586 ;R85 stc ;assume CPU no counter ;R85 jne No_Rdtsc ;R85 ;R85 Yes_Rdtsc: ;R85 xor edx,edx ;R85 xor eax,eax ;input value = 1 ;R85 mov ds,ax ;R85 push dword ptr ds:[4*6] ;save int 06h vector ;R85 mov word ptr ds:[4*6],offset Temp_Int06 ;R85 mov word ptr ds:[4*6+2], cs ;R85 ;R85 db 0fh,31h ;ReaD Time Stamp Counter ;R85 ;R85 pop dword ptr ds:[4*6] ;restore int 06h vector ;R85 ;R85 or eax,edx ;counter changed ? ;R85 stc ;assume CPU no counter ;R85 jz short No_Rdtsc ;no , this CPU don't have ;R85 ;counter ;R85 ;R85 mov ax,G_RAM ; seg_0 ;R85 mov ds,ax ;R85 assume ds:G_RAM ;R85 ;R85 mov byte ptr ds:[4f8h],0 ;init flag ;R85 mov dword ptr ds:[4f8h],0 ;init low dword value ;R85 mov dword ptr ds:[4fch],-1 ;init high dword value ;R85 ;R85 ; ;R85 ; Move INT 08h vector to a temporary routine ;R85 ; ;R85 ;R85 mov dx,word ptr [int08] ; save vector ;R85 mov bx,word ptr [int08+2] ;R85 ;R85 mov word ptr [int08],offset CpuClk_Int08; tmr isr entry ;R85 mov word ptr [int08+2],cs ; code segment ;R85 ;R85 ; ;R85 ; Enable just the timer interrupt ;R85 ; ;R85 ;R85 mov al,0ffh ; mask all interrupts on controller 2 ;R85 out B8259+1,al ; tell controller ;R85 NEWIODELAY ;R85 dec al ; mask all except timer (IRQ 8) ;R85 out A8259+1,al ; tell controller ;R85 ;R85 ; ;R85 ; Set up timer 0 ;R85 ; ;R85 ;R85 mov al,36h ; setup timer counter 0 ;R85 out 43h,al ; select counter 0 ;R85 NEWIODELAY ;R85 ;R85 xor ax,ax ; INT every 1/18 seconds ;R85 out 40h,al ; write lsb ;R85 NEWIODELAY ;R85 out 40h,al ; write msb ;R85 ;R85 ; ;R85 ; Wait for interrupts ;R85 ; ;R85 ;R85 xor ax,ax ; clear interrupt flag ;R85 sti ; enable interrupt ;R85 Wait_Irq0: ;R85 cmp byte ptr ds:[4f0h],0aaH ;second INT occured ? ;R85 jne short Wait_Irq0 ;R85 cli ; disable interrupts ;R85 ;R85 ; ;R85 ; Turn off all of the interrupts ;R85 ; ;R85 mov al,0ffh ; mask all interrupts ;R85 out A8259+1,al ; tell controller ;R85 NEWIODELAY ;R85 ;R85 ; ;R85 ; Restore INT 08h vector ;R85 ; ;R85 ;R85 mov word ptr [int08],dx ; restore old vector ;R85 mov word ptr [int08+2],bx ;R85 ;R85 ;Now , the content of 0:[4f8h] contain counter value ;R85 mov bx,1 ;R85 mov eax,dword ptr ds:[4f8h] ;R85 mov ecx,55100 ;factor to calculate ;R85 Next_Div: ;R85 sub eax,ecx ;R85 jc short Finish_Div ;R85 inc bx ;R85 jmp short Next_Div ;R85 Finish_Div: ;R85 clc ;R85 No_Rdtsc: ;R85 ret ;R85 New_CpuClk_Detection endp ;R85 ;R85 ;R79 - start ;R85 ;Table for CPU clock over 255Mhz ;R85 CPU_Over255MHz: ;R85 db 333-256, 333-256-2, CPU66 ;66x5 ;R85 db 300-256, 300-256-2, CPU60 ;60x5 ;R85 db 266-256, 266-256-2, CPU66 ;66x4 ;R85 db 0 ;end of table ;R85 ;R79 - end ;R85 ;R85 ;Clock table for P5-class CPUs ;R85 NewCPU_Int_Clock_Tbl: ;R85 ;R85 ;R34A ifdef P6_BIOS_ONLY ;R34 ;R85 db 240, 238, CPU60 ;60x4 ;R34 ;R85 db 233, 230, CPU66 ;66x3.5 ;R34 ;R85 ;R85 db 225, 223, CPU66 ;75x3 ;R43 ;R85 ;R85 db 210, 208, CPU60 ;60x3.5 ;R34 ;R85 ;R34A endif; P6_BIOS_ONLY ;R34 ;R85 ;R85 ;R42A ifndef NEW_P6_200_TBL ;R42 ;R85 ;R42A db 200, 199, CPU66 ;66x3 ;R85 ;R42A else; NEW_P6_200_TBL ;R42 ;R85 db 200, 195, CPU66 ;66x3 ;R42 ;R85 ;R42A endif; NEW_P6_200_TBL ;R42 ;R85 db 180, 179, CPU60 ;60x3 ;R85 db 166, 165, CPU66 ;66x2.5 ;R85 db 150, 149, CPU60 ;60x2.5 ;R85 db 133, 132, CPU66 ;66x2 ;R85 db 125, 124, CPU50 ;50x2.5 ;R85 db 120, 119, CPU60 ;60x2 ;R85 db 110, 109, CPU50 ;55x2 ;R85 db 100, 99, CPU66 ;66x1.5 ;R85 ;R26A db 90, 89, CPU60 ;60x1.5 ;R85 db 90, 88, CPU60 ;60x1.5 ;R26A ;R85 db 83, 82, CPU50 ;55x1.5 ;R02-add ;R85 db 75, 74, CPU50 ;50x1.5 ;R85 db 66, 65, CPU66 ;66x1 ;R85 db 60, 59, CPU66 ;60x1 ;R85 db 50, 49, CPU66 ;50x1 ;R85 db 0 ;end of table ;R85 ;R26 - ends ;R85 ;R85 ;Clock detection for 386,486 & 586 CPUs ;R85 ;R85 ALIGN 16 ;R85 MOV_SHAD_OFF EQU 00000H ;R85 ;R22 MOV_SHAD_SEG EQU 02000H ;R85 ;R57 MOV_SHAD_SEG EQU 8000H ;R22 ;R85 MOV_SHAD_SEG EQU 4000h ;R57 ;R85 ;R85 Measure_CPU_Speed proc near ;R85 ;R85 ;-------------------------------------- ;R85 ;Copy code into RAM for speed detection ;R85 ;-------------------------------------- ;R85 ;R85 mov ax,cs ;GET THE SEGMENT ;R85 mov ds,ax ;AND SET UP SOURCE ;R85 mov ax,MOV_SHAD_SEG ;SET THE SEGMENT FOR DEST ;R85 mov es,ax ;R85 lea si,S_Cpu ;GET THE OFFSET FOR SOURCE ;R85 mov di,MOV_SHAD_OFF ;MOVE OFFSET IN FOR DEST ;R85 lea cx,LAST_S_Cpu ;GET SETUP FOR THE LENGTH ;R85 sub cx,si ;GET THE LENGTH OF THE CODE ;R85 ;R85 push cx ;R85 push es ;R85 push di ;R85 ;R85 rep movsb ;MOVE THE COPY CODE ;R85 push 0f000h ;R85 pop ds ;R85 ;R85 ;R26 - starts ;R85 ;Use new algorithm for CPU clock detection if CPU have RDTSC instruction ;R85 ;(0fh,31h) ;R85 call New_CpuClk_Detection ;use new method to check ;R85 jc short Cpu_NoRdtsc ;CPU clock ? ;R85 ;carry set, use old method ;R85 ;R85 mov al,bl ;AL = Actual CPU clock found ;R85 mov dh,bl ;AL = Actual CPU clock found ;R85 mov CPU_INT_CLOCK[bp],bx ;actual internal CPU clock;R79 ;R85 ;R79 mov CPU_INT_CLOCK[bp],bl ;actual internal CPU clock ;R85 mov si,offset NewCPU_Int_Clock_Tbl ;new table for PENTIUM ;R85 ;R79 - start ;R85 cmp word ptr CPU_INT_CLOCK[bp],255 ;over 255Mhz ? ;R85 jbe short Not_Over255Mhz ;R85 ;R85 mov si,offset CPU_Over255MHz ;R85 Not_Over255Mhz: ;R85 ;R79 - end ;R85 ;R85 jmp short R_Off_Clk ;R85 Cpu_NoRdtsc: ;R85 ;R26 - ends ;R85 ;R85 ifndef P6_BIOS_ONLY ;R71 ;R85 ;R85 ;-------------------------------------------------- ;R85 ;Set KB high speed for test & save results(push bx) ;R85 ;-------------------------------------------------- ;R85 ;R85 ifdef TOGGLE_8042_FOR_CPU_CLK_DETECT ;R85 mov al,1 ;Set low speed for test ;R85 call F000_Out_8042_Pin ;R85 endif; TOGGLE_8042_FOR_CPU_CLK_DETECT ;R85 ;R85 in al,PORT61 ;R85 IODELAY ;R85 push ax ;save PORT61 value ;R85 ;R85 ;execute the CPU detection code in DRAM ;R85 push cs ;R85 push offset SHAD_ret_off ;R85 push MOV_SHAD_SEG ;R85 push MOV_SHAD_OFF ;R85 retf ;R85 SHAD_ret_off: ;R85 ;return register values after calling S_CPU are ;R85 ; BH - CPU host clock ;R85 ; DL - CPU clock mode (x1, x2 ,x3 or x4) ;R85 mov al,bh ;R85 mul dl ;R85 mov si,ax ;R85 ;R85 pop ax ;restore PORT61 value ;R85 out PORT61,al ;R85 IODELAY ;R85 ;R85 ifdef TOGGLE_8042_FOR_CPU_CLK_DETECT ;R85 ;Save KB high speed result ;R85 ;R85 push dx ;R85 push bx ;R85 ;R85 ;------------------------- ;R85 ;Set KB low speed for test ;R85 ;------------------------- ;R85 ;R85 xor al,al ;Set high speed for test ;R85 call F000_Out_8042_Pin ;R85 ;R85 in al,PORT61 ;save PORT61 value ;R85 IODELAY ;R85 push ax ;R85 ;R85 push cs ;R85 push offset SHAD_ret_off1 ;R85 push MOV_SHAD_SEG ;R85 push MOV_SHAD_OFF ;R85 retf ;R85 SHAD_ret_off1: ;R85 ;R85 pop ax ;restore PORT61 value ;R85 out PORT61,al ;R85 IODELAY ;R85 ;R85 ;-------------------------------------------------------------- ;R85 ;compare results of KB high & KB low speed, take the higher one ;R85 ;-------------------------------------------------------------- ;R85 ;R85 ;restore KB high speed results in ax, di ;R85 ;R85 mov al,bh ;R85 mul dl ;R85 cmp ax,si ;R85 pop ax ;R85 pop di ;R85 ;R85 jae short AUTO_CPUS_READY ;R85 ;R85 ;use KB high speed result ;R85 ;R85 mov bx,ax ;R85 mov dx,di ;R85 ;R85 AUTO_CPUS_READY: ;R85 endif; TOGGLE_8042_FOR_CPU_CLK_DETECT ;R85 ;R85 ;write CPU_INTERNAL_CLOCK[bp] with tested value ;R85 ;R85 mov al,bh ;system clock(integer) in AL ;R85 mul dl ;Sing/doub/treb value in DL ;R85 ;R79A mov CPU_INT_CLOCK[bp],al ;actual internal CPU clock ;R85 mov CPU_INT_CLOCK[bp],ax ;actual internal CPU clock;R79A ;R85 ;R85 mov dl,FIXED_DISK_STEP[bp] ;get CPU type ;R85 and dl,CPU_TYPE_MASK ;get CPU type ;R85 ;R85 ;special table for P24T , because the clock mode is x2.5 ;R85 cmp dl,TYPE_P24T ;R85 jne short Not_P24T_2Point5 ;R85 test byte ptr OVERRIDE[bp],DOUBLE_CLOCK ;R85 jz short Not_P24T_2Point5 ;R85 mov si,offset P24T_Int_Clock_Tbl ;R85 jmp short R_Off_Clk ;R85 Not_P24T_2Point5: ;R85 ;R85 ifdef No_586_Support ;for 386 & 486 only ;R85 jmp short Not_Pentium ;R85 else ;No_586_Support ;R85 ;R85 ;special table for P5 & M1 & K5 ;R85 mov bh,byte ptr FIXED_DISK_STEP[bp] ;R85 and bh,CPU_TYPE_MASK ;R85 mov si,offset CPU_Int_Clock_Tbl ;table for PENTIUM ;R85 cmp bh,TYPE_586 ;Pentium CPU? ;R85 je short Round_Off_It ;R85 ;R85 cmp bh,TYPE_AMD5K86 ;K5 CPU? ;R85 je short Round_Off_It ;R85 ;R85 mov si,offset M1_Int_Clock_Tbl ;table for M1 ;R85 cmp bh,TYPE_M1 ;M1 CPU? ;R85 je short Round_Off_It ;R85 ;R85 jmp short Not_Pentium ;R85 ;R85 Round_Off_It: ;R85 ;R85 mov al,dh ;R85 endif ;No_586_Support ;R85 endif; P6_BIOS_ONLY ;R71 ;R85 ;R85 R_Off_Clk: ;R85 ;R85 ;far call Round_Off_Clock ;R85 ;R85 FAR_CALL ,0E000h ;R85 ;R85 mov CPU_INT_CLOCK[bp],bl ;actual internal CPU clock ;R85 push G_RAM ;R85 pop es ;R85 ;R85 mov bl,cs:[si+2] ;SI+2 = system clock ;R85 ;R85 ifndef P6_BIOS_ONLY ;R71 ;R85 ;R04A - start ;R85 ;There is two combination for 150Mhz , 75*2 and 50*3 , the default is 75*2 ;R85 ;, we need to check the clock mode , if 3x , change host clock to 50Mhz ;R85 mov al,byte ptr FIXED_DISK_STEP[bp] ;R85 and al,CPU_TYPE_MASK ;R85 cmp al,TYPE_M1 ;M1 CPU? ;R85 jne short NotM1_Cpu ;R85 ;R85 cmp byte ptr CPU_INT_CLOCK[bp],150 ;150Mhze ? ;R85 jne short NotM1_Cpu ;R85 ;R85 test byte ptr OVERRIDE[bp],THREE_CLOCK ;3x mode ? ;R85 jz short NotM1_Cpu ;R85 ;R85 ;set 50Mhz host clock if 3x mode ;R85 mov bl,CPU50 ;set host clock ;R85 ;R85 NotM1_Cpu: ;R85 ;R04A - end ;R85 endif; P6_BIOS_ONLY ;R71 ;R85 ;R85 mov byte ptr es:[CPU_CLOCK],bl ;R85 ;R85 Not_P54C: ;R85 Not_Pentium: ;R85 ;R85 ;Show 100Mhz if 99Mhz ;R85 cmp byte ptr CPU_INT_CLOCK[bp],132 ;R85 je short Set_133 ;R85 cmp byte ptr CPU_INT_CLOCK[bp],99 ;R85 jne short @F ;R85 Set_133: ;R85 inc byte ptr CPU_INT_CLOCK[bp] ;R85 @@: ;R85 ;R85 ifdef TOGGLE_8042_FOR_CPU_CLK_DETECT ;R85 mov al,1 ;R85 call F000_Out_8042_Pin ;R85 endif; TOGGLE_8042_FOR_CPU_CLK_DETECT ;R85 ;R85 ;------------------- ;R85 ;Clear temporary RAM ;R85 ;------------------- ;R85 ;R85 pop di ;R85 pop es ;R85 pop cx ;R85 xor ax,ax ;R85 rep stosw ;clear ram ;R85 ;R85 mov ax,G_RAM ;R85 mov es,ax ;R85 assume es:G_RAM ;R85 ;R85 ;---------------------------- ;R85 ;Special treatment for TI CPU ;R85 ;---------------------------- ;R85 ;R85 IF BIOS_SUPPORT_TI_CPU ;R85 cmp bl,CPU33 ;R85 ja short @F ;R85 mov al,FIXED_DISK_STEP[bp] ;R85 and al,CPU_TYPE_MASK ;R85 cmp al,TYPE_TI486SXL ;R85 mov dx,CPU_TI486SXL2 ;R85 je short Set_TI_CPU ;R85 cmp al,TYPE_TI486SXLC ;R85 jne short @F ;R85 mov dx,CPU_TI486SXLC2 ;R85 Set_TI_CPU: ;R85 test byte ptr FIXED_DISK_STEP[bp],01H;coprocess or exist ;R85 jz short No_Copro ;R85 or dl,01H ;restore copro. flag ;R85 No_Copro: ;R85 ;R85 mov byte ptr FIXED_DISK_STEP[bp],dl ;R85 mov ah,FIXED_DISK_STEP[bp] ;R85 mov es:CPU_TYPE_FLAG,ah ;R85 mov al,CMOS_AWARD_2 NMI_OFF ;R85 call F000_Set_Cmos ;R85 ;R85 mov ah,byte ptr OVERRIDE[bp] ;R85 and ah,Not Clock_Mode ;R85 or ah,dh ;R85 mov byte ptr OVERRIDE[bp],ah ;R85 mov al,OVERRIDE NMI_OFF ;R85 call F000_Set_Cmos ;R85 ;R85 mov al,0c0h ;R85 out 22h,al ;R85 NEWIODELAY ;R85 in al,23h ;R85 NEWIODELAY ;R85 ;R85 or al,40h ;R85 mov ah,al ;R85 ;R85 mov al,0c0h ;R85 out 22h,al ;R85 NEWIODELAY ;R85 mov al,ah ;R85 out 23h,al ;R85 NEWIODELAY ;R85 ;R85 shl byte ptr CPU_INT_CLOCK[bp],1 ;double clock ;R85 ;R85 @@: ;R85 ENDIF ;BIOS_SUPPORT_TI_CPU ;R85 ;R85 mov byte ptr es:CPU_CLOCK,bl ;R85 ;R85 clc ;R85 ret ;R85 Measure_CPU_Speed endp ;R85 DIVID MACRO ;R85 mov ax,di ;R85 div bx ;R85 endm ;R85 PORT61 EQU 61H ;R85 PORT8254 EQU 42H ;R85 DATA8254 EQU 43H ;R85 COUNT EQU 3EH ;R85 ;R85 ;----------------------------------------------------------------- ;R85 ;Input : None ;R85 ;Output : BH : System Clock in interger ;R85 ; BL : System Clock i.e. 10h = 16MHz ;R85 ; 20h = 20MHz ;R85 ; 30h = 25MHz ;R85 ; 40h = 33MHz ;R85 ; 50h = 40MHz ;R85 ; 60h = 50MHz ;R85 ; 60h = 60MHz ;R85 ; 60h = 66MHz ;R85 ; DH : Actual CPU clock index found ;R85 ; DL : Single/Double/Trible ;R85 ;----------------------------------------------------------------- ;R85 ALIGN 16 ;R85 S_Cpu proc far ;R85 ;R85 ifndef P6_BIOS_ONLY ;R71 ;R85 cli ;R85 mov al,0fch ;disable counter 2 ;R85 out PORT61,al ;R85 SIODELAY ;R85 mov al,0b4h ;program counter 2 ;R85 out DATA8254,al ;R85 IODELAY ;R85 xor al,al ;R85 out PORT8254,al ;R85 IODELAY ;R85 out PORT8254,al ;R85 IODELAY ;R85 ;R85 mov di,7aaah ;dividend ;R85 mov bx,5555h ;divisor ;R85 xor dx,dx ;R85 mov cx,COUNT ;count ;R85 mov al,0fdh ;enable counter ;R85 out PORT61,al ;R85 SIODELAY ;R85 ALIGN 4 ;R85 Divid_33: ;R85 DIVID ;divide 1 ;R85 DIVID ;divide 2 ;R85 DIVID ;divide 3 ;R85 DIVID ;divide 4 ;R85 DIVID ;divide 5 ;R85 DIVID ;divide 6 ;R85 DIVID ;divide 7 ;R85 DIVID ;divide 8 ;R85 DIVID ;divide 9 ;R85 DIVID ;divide 10 ;R85 DIVID ;divide 11 ;R85 DIVID ;divide 12 ;R85 DIVID ;divide 13 ;R85 DIVID ;divide 14 ;R85 DIVID ;divide 15 ;R85 DIVID ;divide 16 ;R85 DIVID ;divide 17 ;R85 DIVID ;divide 18 ;R85 DIVID ;divide 19 ;R85 DIVID ;divide 20 ;R85 DIVID ;divide 21 ;R85 DIVID ;divide 22 ;R85 DIVID ;divide 23 ;R85 DIVID ;divide 24 ;R85 DIVID ;divide 25 ;R85 DIVID ;divide 26 ;R85 DIVID ;divide 27 ;R85 DIVID ;divide 28 ;R85 DIVID ;divide 29 ;R85 DIVID ;divide 30 ;R85 DIVID ;divide 31 ;R85 DIVID ;divide 32 ;R85 DIVID ;divide 33 ;R85 dec cx ;R85 jz short Finish ;R85 jmp Divid_33 ;R85 Finish: ;R85 mov al,0fch ;stop counter 2 ;R85 out 61h,al ;R85 SIODELAY ;R85 in al,PORT8254 ;read counter 2 low byte ;R85 IODELAY ;R85 mov ah,al ;R85 in al,PORT8254 ;read counter 2 high byte ;R85 IODELAY ;R85 xchg ah,al ;R85 mov si,ax ;store result ;R85 ;R85 xor dx,dx ;R85 mov cx,COUNT ;count ;R85 mov al,0fdh ;enable counter ;R85 out PORT61,al ;R85 SIODELAY ;R85 ALIGN 4 ;R85 Divid_1: ;R85 DIVID ;divide 1 ;R85 dec cx ;R85 jz short Finish1 ;R85 jmp short Divid_1 ;R85 Finish1: ;R85 mov al,0fch ;stop counter 2 ;R85 out 61h,al ;R85 SIODELAY ;R85 in al,PORT8254 ;read counter 2 low byte ;R85 IODELAY ;R85 mov ah,al ;R85 in al,PORT8254 ;read counter 2 high byte ;R85 IODELAY ;R85 xchg ah,al ;R85 mov cx,ax ;R85 sub cx,si ;result 2 - result 1 ;R85 ;R85 mov ax,26f5h ;dividend low word ;R85 mov dx,005ah ;dividend high word ;R85 ;R85 mov bh,byte ptr FIXED_DISK_STEP[bp] ;R85 and bh,CPU_TYPE_MASK ;R85 ;R85 cmp bh,TYPE_AMD5K86 ;K86 CPU ;R85 jne short AmdK86_CPU ;R85 mov dl,4AH ;for K86 ;R85 AmdK86_CPU: ;R85 ;R85 cmp bh,TYPE_M1 ;R85 jne short Not_M1 ;R85 mov ax,0dbb8h ;R85 mov dl,56h ;R85 jmp short Not_Cyrix_Cpu ;R85 Not_M1: ;R85 ;R85 cmp bh,TYPE_M9 ;R85 jne short Not_M9 ;R85 mov ax,4632h ;R85 mov dl,6Dh ;R85 jmp short Not_Cyrix_Cpu ;R85 Not_M9: ;R85 ;R85 cmp bh,TYPE_U5 ;R85 jne short Not_U5 ;R85 mov ax,0dbb8h ;R85 mov dl,52h ;R85 jmp short Not_Cyrix_Cpu ;R85 Not_U5: ;R85 ;R85 ifdef IBM_CPU_SUPPORT ; ;R85 cmp byte ptr CPU_BRAND[bp],CPU_BRAND_IBM ;R85 je short Yes_Cyrix_Cpu ;R85 endif ;IBM_CPU_SUPPORT ; ;R85 ;R85 cmp byte ptr CPU_BRAND[bp],CPU_BRAND_CYRIX ;R85 je short Yes_Cyrix_Cpu ;R85 ;R85 IF BIOS_SUPPORT_TI_CPU ;R85 cmp byte ptr CPU_BRAND[bp],CPU_BRAND_TI ;R85 je short Yes_Cyrix_Cpu ;R85 ENDIF ;BIOS_SUPPORT_TI_CPU ;R85 ;R85 jmp short Not_Cyrix_Cpu ;R85 Yes_Cyrix_Cpu: ;R85 mov ax,64a8h ;R85 mov dl,4eh ;R85 Not_Cyrix_Cpu: ;R85 ;R85 div cx ;R85 ;R85 xor bl,bl ;R85 Sub_1: ;R85 inc bl ;R85 sub ax,100 ;R85 jc short Fin_0 ;R85 jz short No_Carry ;R85 jmp short Sub_1 ;R85 Fin_0: ;R85 add ax,100 ;R85 ;R85 cmp al,50 ;R85 jae short No_Carry ;R85 dec bl ;R85 No_Carry: ;R85 ;------------------------------------------------------------------ ;R85 ;calculate system clock by checking CPU type (Single/Double/Treble) ;R85 ;------------------------------------------------------------------ ;R85 mov al,byte ptr FIXED_DISK_STEP[bp] ;R85 and al,CPU_TYPE_MASK ;R85 cmp al,TYPE_P24C ;R85 jne short Not_P24C ;R85 cmp bl,70 ;clock below 70Mhz ;R85 jae short Not_P24C ;R85 ;set double clock ;R85 and byte ptr OVERRIDE[bp],NOT CLOCK_MODE ;R85 or byte ptr OVERRIDE[bp],DOUBLE_CLOCK ;R85 jmp short Xchg_CPU_Mode_OK ;R85 Not_P24C: ;R85 ;R85 cmp bl,50 ;R85 jae short Not_P24T_X1 ;R85 cmp al,TYPE_P24T ;R85 jne short Not_P24T_X1 ;R85 and byte ptr OVERRIDE[bp],NOT CLOCK_MODE ;R85 Not_P24T_X1: ;R85 ;R85 mov al,byte ptr FIXED_DISK_STEP[bp] ;R85 and al,CPU_TYPE_MASK ;R85 cmp al,TYPE_AMD486DX2 ;R85 je short Xchg_AMD_CPU ;R85 cmp al,TYPE_486DX2 ;R85 jne short Not_AMDDX4 ;R85 Xchg_AMD_CPU: ;R85 cmp bl,90 ;R85 jb short Not_AMDDX4 ;R85 ;set three clock mode ;R85 and byte ptr OVERRIDE[bp],NOT CLOCK_MODE ;R85 or byte ptr OVERRIDE[bp],THREE_CLOCK ;R85 mov al,byte ptr FIXED_DISK_STEP[bp] ;R85 and al,NOT_CPU_TYPE_MASK ;R85 or al,TYPE_AMD486DX4 ;R85 mov byte ptr FIXED_DISK_STEP[bp],al ;R85 jmp short Xchg_CPU_Mode_OK ;R85 Not_AMDDX4: ;R85 ;R85 Xchg_CPU_Mode_OK: ;R85 xor bh,bh ;R85 mov ax,bx ;R85 ;R85 mov bl,1 ;R85 ;R85 call Check_586_Cpu ;p5 class CPU ? ;R85 je short Single_Freq ;yes, ;R85 ;R85 test byte ptr OVERRIDE[bp],FOUR_CLOCK ;R85 jz short Three_Freq ;R85 mov bl,4 ;R85 jmp short Single_Freq ;R85 Three_Freq: ;R85 ;R85 test byte ptr OVERRIDE[bp],THREE_CLOCK ;R85 jz short Double_Freq ;R85 ;R85 mov bl,3 ;R85 jmp short Single_Freq ;R85 Double_Freq: ;R85 test byte ptr OVERRIDE[bp],DOUBLE_CLOCK ;R85 jz short Single_Freq ;R85 ;R85 mov bl,2 ;R85 Single_Freq: ;R85 div bl ;R85 ;R85 add al,3 ;tolerance ;R85 ;R85 Skip_Gap: ;R85 ;R85 mov dh,al ;DH = Actual CPU clock found ;R85 mov dl,bl ;DL = Single/Double/Trible ;R85 ;R85 mov si,offset Sys_Clock_Tbl ;R85 mov cx,Sys_Clock_Tbl_Len ;R85 ;R85 ;far call Round_Off_Clock ;R85 ;R85 FAR_CALL ,0E000h ;R85 ;R85 endif; P6_BIOS_ONLY ;R71 ;R85 ret ;R85 ;R85 Check_586_Cpu proc near ;R85 push bx ;R85 mov bh,byte ptr FIXED_DISK_STEP[bp] ;R85 and bh,CPU_TYPE_MASK ;R85 cmp bh,TYPE_AMD5K86 ;K86 CPU ;R85 je short Yes_P5_Class ;R85 ;R85 cmp bh,TYPE_586 ;Pentium CPU? ;R85 je short Yes_P5_Class ;R85 ;R85 cmp bh,TYPE_M1 ;R85 je short Yes_P5_Class ;R85 ;R85 Yes_P5_Class: ;R85 pop bx ;R85 ret ;R85 Check_586_Cpu endp ;R85 ;R85 Check_M1_Cpu proc near ;R85 push bx ;R85 mov bh,byte ptr FIXED_DISK_STEP[bp] ;R85 and bh,CPU_TYPE_MASK ;R85 cmp bh,TYPE_M1 ;R85 pop bx ;R85 ret ;R85 Check_M1_Cpu endp ;R85 ;R85 even ;R85 Last_S_Cpu: ;R85 S_Cpu endp ;R85 ;R85 ;[]--------------------------------------------------------------[] ;R85 ;Input : AL = Clock to be compared ;R85 ; SI = table offset ;R85 ; (format: reference System_Clock_Table) ;R85 ; CX = no of entries ;R85 ; ;R85 ;Output : BH = reference value (see System_Clock_Table) ;R85 ; BL = round-offed value ;R85 ; SI = offset which round-offed value locates ;R85 ;[]--------------------------------------------------------------[] ;R85 Round_Off_Clock Proc Far ;R85 Next_Clk_Tbl: ;R85 mov bx,cs:[si] ;R85 cmp al,bh ;R85 jae short @F ;R85 cmp byte ptr cs:[si+3],0 ;last table ? ;R85 je short @F ;R85 add si,3 ;next table ;R85 jmp short Next_Clk_Tbl ;R85 @@: ;R85 retf ;R85 Round_Off_Clock Endp ;R85 ;R85 ifndef P6_BIOS_ONLY ;R71 ;R85 ;-------------------------------------------------------------------- ;R85 ; round value value ;R85 ; offed for to be put ;R85 ; output reference into G_RAM:CPU_CLOCK ;R85 ;-------------------------------------------------------------------- ;R85 Sys_Clock_Tbl: ;R85 db CPU66, 66, CPU66 ;R85 db CPU60, 60, CPU60 ;R85 db CPU50, 50, CPU50 ;R85 db CPU40, 40, CPU40 ;R85 db CPU33, 33, CPU33 ;R85 db CPU25, 25, CPU25 ;R85 db CPU20, 20, CPU20 ;R85 db CPU16, 16, CPU16 ;R85 db 0 ;end of table ;R85 Sys_Clock_Tbl_Len EQU ($ - offset Sys_Clock_Tbl)/3 ;R85 endif; P6_BIOS_ONLY ;R71 ;R85 ;R85 ;R26 ifndef No_586_Support ;R85 ;-------------------------------------------------------------------- ;R85 ; round value value ;R85 ; offed for to be put ;R85 ; output reference into G_RAM:CPU_CLOCK ;R85 ;-------------------------------------------------------------------- ;R85 CPU_Int_Clock_Tbl: ;R85 ifndef P6_BIOS_ONLY ;R71 ;R85 ;R85 IF BIOS_SUPPORT_586 ;R26 ;R85 ;Add P55C-150,P54CT-150,P54CT-166 and P54CT-180 ;R85 ifdef LOW_CLOCK_VALUE_FOR_P5 ;R85 db 200, 193, CPU66 ;66x3 ;R85 db 180, 174, CPU60 ;60x3 ;R85 db 166, 161, CPU66 ;66x2.5 ;R85 else; LOW_CLOCK_VALUE_FOR_P5 ;R85 ifdef Higher_200MHz_Tbl ;R13 ;R85 db 200, 197, CPU66 ;66x3 ;R13 ;R85 else ;Higher_200MHz_Tbl ;R13 ;R85 db 200, 195, CPU66 ;66x3 ;R85 endif ;Higher_200MHz_Tbl ;R13 ;R85 ifdef LUCKY_START_166_CPU_DETECT ;R03-start ;R85 db 180, 180, CPU60 ;60x3 ;R85 else ;LUCKY_START_166_CPU_DETECT ;R85 db 180, 179, CPU60 ;60x3 ;R85 endif ;LUCKY_START_166_CPU_DETECT ;R03-end ;R85 db 166, 163, CPU66 ;66x2.5 ;R85 endif; LOW_CLOCK_VALUE_FOR_P5 ;R85 ;R85 db 150, 145, CPU60 ;60x2.5 ;R85 ;R85 ;add P54CS CPU support for 120 & 132 MHz ;R85 ifdef Higher_133MHz_Tbl ;R85 db 133, 129, CPU66 ;66x2 ;R85 else ;Higher_133MHz_Tbl ;R85 db 133, 127, CPU66 ;66x2 ;R85 endif ;Higher_133MHz_Tbl ;R85 db 125, 121, CPU50 ;R19 50x2.5 ;R85 db 120, 118, CPU60 ;60x2 ;R85 ;R85 ifndef NO_110MHZ_CLOCK ;R25 ;R85 ifdef Higher_110MHz_Tbl ;R85 db 110, 108, CPU50 ;55x2 ;R85 else ;Higher_110MHz_Tbl ;R85 ;R85 ifdef LOW_CLOCK_VALUE_FOR_P5 ;R85 db 110, 105, CPU50 ;55x2 ;R85 else; LOW_CLOCK_VALUE_FOR_P5 ;R85 db 110, 107, CPU50 ;55x2 ;R85 endif; LOW_CLOCK_VALUE_FOR_P5 ;R85 ;R85 endif ;Higher_110MHz_Tbl ;R85 endif; NO_110MHZ_CLOCK ;R25 ;R85 ;R85 ifdef Force_100_EQU_50_Double ;R18 ;R85 db 100, 95, CPU50 ;R18 50x2 ;R85 else ;Force_100_EQU_50_Double ;R18 ;R85 ifdef Special_P54C_Clock ;R85 db 100, 100, CPU66 ;66x1.5 ;R85 else ;Special_P54C_Clock ;R85 db 100, 95, CPU66 ;66x1.5 ;R85 endif ;Special_P54C_Clock ;R85 endif ;Force_100_EQU_50_Double ;R18 ;R85 ;R85 db 90, 89, CPU60 ;60x1.5 ;R85 ;R02 db 83, 80, CPU50 ;55x1.5 ;R85 db 83, 81, CPU50 ;55x1.5 ;R02-add ;R85 db 75, 70, CPU50 ;50x1.5 ;R85 db 66, 60, CPU66 ;66x1 ;R85 db 0 ;end of table ;R85 ENDIF ;BIOS_SUPPORT_586 ;R26 ;R85 endif; P6_BIOS_ONLY ;R71 ;R85 ;R85 ;-------------------------------------------------------------------- ;R85 ; round value value ;R85 ; offed for to be put ;R85 ; output reference into G_RAM:CPU_CLOCK ;R85 ;-------------------------------------------------------------------- ;R85 M1_Int_Clock_Tbl: ;R85 ;R85 ifndef P6_BIOS_ONLY ;R71 ;R85 ;R85 IF BIOS_SUPPORT_586 ;R26 ;R85 ifdef LOW_CLOCK_VALUE_FOR_P5 ;R85 db 200, 193, CPU66 ;66x3 ;R85 db 180, 174, CPU60 ;60x3 ;R85 else; LOW_CLOCK_VALUE_FOR_P5 ;R85 db 200, 195, CPU66 ;66x3 ;R85 db 180, 179, CPU60 ;60x3 ;R85 endif; LOW_CLOCK_VALUE_FOR_P5 ;R85 ;R85 ;R04 db 150, 145, CPU50 ;50*3 ;R85 db 150, 145, CPU66 ;75*2 ;R04 ;R85 ;R85 ifdef Higher_133MHz_Tbl ;R85 ifdef Special_Cyrix_Tbl_For_VLSI59X ;R16 ;R85 db 133, 130, CPU66 ;66x2 ;R16 ;R85 else ;Special_Cyrix_Tbl_For_VLSI59X ;R16 ;R85 db 133, 129, CPU66 ;66x2 ;R85 endif ;Special_Cyrix_Tbl_For_VLSI59X ;R16 ;R85 else ;Higher_133MHz_Tbl ;R85 db 133, 127, CPU66 ;66x2 ;R85 endif ;Higher_133MHz_Tbl ;R85 ;R85 ifndef Higher_120MHz_Tbl ;R28 ;R85 db 120, 118, CPU60 ;60x2 ;R85 else ;Higher_120MHz_Tbl ;R28 ;R85 db 120, 120, CPU60 ;60x2 ;R28 ;R85 endif ;Higher_120MHz_Tbl ;R28 ;R85 ;R85 ifndef NO_110MHZ_CLOCK ;R25 ;R85 ifdef Higher_110MHz_Tbl ;R85 ifdef Special_Cyrix_Tbl_For_VLSI59X ;R16 ;R85 db 110, 109, CPU50 ;55x2 ;R16 ;R85 else ;Special_Cyrix_Tbl_For_VLSI59X ;R16 ;R85 db 110, 108, CPU50 ;55x2 ;R85 endif ;Special_Cyrix_Tbl_For_VSI59X ;R16 ;R85 else ;Higher_110MHz_Tbl ;R85 ;R85 ifdef LOW_CLOCK_VALUE_FOR_P5 ;R85 db 110, 105, CPU50 ;55x2 ;R85 else; LOW_CLOCK_VALUE_FOR_P5 ;R85 db 110, 107, CPU50 ;55x2 ;R85 endif; LOW_CLOCK_VALUE_FOR_P5 ;R85 ;R85 endif ;Higher_110MHz_Tbl ;R85 endif; NO_110MHZ_CLOCK ;R25 ;R85 ;R85 ifdef Special_P54C_Clock ;R85 db 100, 100, CPU50 ;50x2 ;R85 else ;Special_P54C_Clock ;R85 db 100, 95, CPU50 ;50x2 ;R85 endif ;Special_P54C_Clock ;R85 db 80, 70, CPU40 ;40x2 ;R85 ;R85 db 66, 64, CPU66 ;66x1 ;R50 ;R85 db 60, 58, CPU60 ;60x1 ;R50 ;R85 db 50, 48, CPU50 ;50x1 ;R50 ;R85 ;R85 db 0 ;end of table ;R85 endif; BIOS_SUPPORT_586 ;R26 ;R85 endif; P6_BIOS_ONLY ;R71 ;R85 ;R85 ;R26 endif ;No_586_Support ;R85 ;R85 P24T_Int_Clock_Tbl: ;R85 ifndef P6_BIOS_ONLY ;R71 ;R85 db 125, 110, CPU50 ;R85 db 100, 95, CPU40 ;R85 db 83, 75, CPU33 ;R85 db 63, 55, CPU25 ;R85 db 50, 45, CPU20 ;R85 db 0 ;R85 endif; P6_BIOS_ONLY ;R71 ;R85 ;R26 endif; P6_BIOS_ONLY ;R85 ;R85 Cpu_Speed_Msg: db 'CPU Clock',0 ;--------------------------------------------------------------------------------- Public Check_Warm_Boot Check_Warm_Boot: push ds push ax mov ax,G_RAM mov ds,ax assume ds:G_RAM cmp word ptr [USER_REBOOT],CTRL_ALT_DEL pop ax pop ds ret ;--------------------------------------------------------------------------------- ;R120A if Desktop_Power_Management EQ 1 ;R120 ;Function : reset keyboard and detect plugged or not ;Input : non ;Output: CMOS_STATUS[bp] - indicate KB present/absent Reset_Kb proc near pushf cli ;Don't do keyboard selftest if warm boot mov ax,G_RAM mov ds,ax ifndef KBD_SELFTEST_FOR_WARM_BOOT ;R229 cmp word ptr ds:USER_REBOOT, CTRL_ALT_DEL je Keybord_Init_Exit endif; KBD_SELFTEST_FOR_WARM_BOOT ;R229 mov dl,15 ; bl = number of retries p5_4: ;Disable KB interface during KB selftest, otherwise JETKEY failed with ; "kebyard error" mov al,0ADh ; disable KBD call F000_Out_8042 mov cx, 256 @@: NEWIODELAY loop short @B in al,DATA8042 ; read return garbage byte NEWIODELAY call F000_Buffer_8042_Full; wait til command received jnz p5_91_1 mov al,KB_RESET ; kbd self test cmd out DATA8042,al NEWIODELAY call F000_Buffer_8042_Full ; wait til command received jnz short p5_91_1 call F000_Out_8042_Full ; wait til output buffer full jz short p5_91_1 ;use cpu loop in case refresh is not stable in this stage mov al,55H ; clear bus in al,DATA8042 ; get returned value... NEWIODELAY cmp al,KB_ACK ; ack? je short p5_41 ; yes... p5_40: ;Resend command if received data is not 0FAH or 0AAH dec dl ; retries left? jnz short p5_4 ; yes... jmp short p5_91_1 ; ; Check return code ; p5_41: mov cx,10 delay_for_kbd_reset: push cx xor bx,bx mov cx,256*2 ; wait 512*30 microseconds = 6.7 milliseconds call wait_refresh1 call F000_Out_8042_Full ; wait for output buffer to be full pop cx loopz delay_for_kbd_reset in al,DATA8042 NEWIODELAY cmp al,0aah ; all OK? jne short p5_40 ; no, error ; ; Return with no error ; p5_9: jmp short Keybord_Init_Exit p5_91_1: or byte ptr CMOS_STATUS[bp],EQUIP_STATUS+KBD_STATUS Keybord_Init_Exit: mov al,0aeh ; disable keyboard interface call F000_Out_8042 popf ret Reset_Kb endp ;R120A endif ;Desktop_Power_Management EQ 1 ;R120 ;R85 ;Function : Program MTRR for CPUs like P6 or P55CT ;R85 ;Input : AL = 0 - program MTRR for conventional memory (0-640K) ;R85 ; = 1 - program MTRR for extended memory (1Mb to top of memory) ;R85 ; esi - extended memory size ;R85 ;Output : none ;R85 Set_Cpu_MtRR proc near ;R85 ;R85 IF BIOS_SUPPORT_586 ;R85 ;Program cacheable region for M1 CPU ;R85 ;BIOS have to set cacheable memory size for M1 CPU according to detected ;R85 ;memory. ;R85 ;Table for M1 CPU cacheable region control ;R85 ; memory size value of reg. ;R85 ; ----------- ------------- ;R85 ; 1Mb 03H ;R85 ; 2Mb 04H ;R85 ; 4Mb 05H ;R85 ; 8Mb 06H ;R85 ; ... ... ;R85 ; 4Gb 0FH ;R85 or al,al ;for extended memory ? ;R85 jz Not_M1Cpu ;R85 ;R85 mov al,byte ptr FIXED_DISK_STEP[bp] ;get CPU type ;R85 and al,CPU_TYPE_MASK ;R85 cmp al,TYPE_M1 ;6x86 CPU ? ;R85 jne Not_M1Cpu ;R85 ;R85 push esi ;R17C ;R85 shl esi,10 ;R17D ;convert to byte unit ;R85 and esi, 0fff00000h ;R17C ;R85 shr esi,10 ;R17D ;resotore to 1k unit ;R85 mov ebx,esi ;R85 add ebx,1024 ;add 1Mb base address ;R85 ;R17B - Start ;R85 push ebx ;save ext memory size ;R85 ;R85 shr ebx,10 ;convert to 1Mb unit ;R85 ;R85 mov ah,3 ;value for 1Mb ;R85 mov si,1 ;minmum is 1Mb ;R85 Chk_MemSize: ;R85 cmp bx, si ;if main memory size <= cacheable ;R85 ;memory size ;R85 jbe short Value_Ok0 ;yes ;R85 shl si, 1 ;next memory size ;R85 inc ah ;next register value ;R85 jmp short Chk_MemSize ;recheck again ;R85 Value_Ok0: ;R85 F000_call Unlock_Cyrix ;open cyrix register locked ;R85 ;R85 ;set cacheable region for M1 CPU in ARR7 ;R85 ;R85 mov cl, 0dbh ;ARR7 ;R85 mov al, ah ;set cacheable region ;R85 call F000_Set_Cyrix ;R85 ;R85 cmp bx, si ;if main memory = cacheable memory ;R85 pop ebx ;restore memory size ;R85 je Value_Ok ;yes , finish ;R85 push ebx ;Save memory size ;R85 ;R85 shr ebx, 2 ;EBX b4-b23 -> A12-A31 ;R85 shl ebx, 4 ;R85 ;R85 mov cl, 0d8h ;ARR6 ;R85 mov al, bl ;set A15-A12 address ;R85 call F000_Set_Cyrix ;R85 ;R85 shr ebx, 8 ;EBX bit 15-0 => A31-A16 ;R85 mov cl, 0d6h ;ARR6 ;R85 mov al, bh ;set A31-A24 ;R85 call F000_Set_Cyrix ;R85 ;R85 mov cl, 0d7h ;ARR6 ;R85 mov al, bl ;set A23-A16 ;R85 call F000_Set_Cyrix ;R85 ;R85 mov cl, 0E2h ;R85 mov al, 1 ;ARR6 as non-cacheable ;R85 call F000_Set_Cyrix ;R85 ;R85 pop ebx ;get onboard memory size ;R85 shr ebx, 10 ;ebx=ebx/1024 convert 1M ;R85 mov ax, bx ;ax= onboard memory size ;R85 mov bx, si ;Get Cacheable size ;R85 sub bx, ax ;bx=must set noncacheable memory size ;R85 mov ch, 0 ;ch=D8h value if bx=0 ;R85 jz short Value_Ok1 ;go to set D8h value ;R85 ;R85 mov ch, 0Fh ;value for 32MB ;R85 mov si, 01000000b ;minnum is 32MB ;R85 xor dx, dx ;initial surplus value ;R85 Chk_MemSize1: ;R85 shr si, 1 ;next memory size ;R85 dec ch ;next register value ;R85 cmp bx, si ;if must set noncacheable memory size ;R85 ;=> noncacheable memory size ;R85 jae short Value_Ok1 ;then check it is on the times value ;R85 jmp short Chk_MemSize1;next value to check ;R85 Value_Ok1: ;R85 push ax ;save onboard memory size ;R85 push dx ;save surplus value ;R85 div si ;onboard memory size DIV ;R85 ;noncacheable memory size ;R85 or dx, dx ;if on the value ;R85 pop dx ;restore surplus value ;R85 pop ax ;restore onboard memory size ;R85 jnz short Chk_MemSize1 ;go to set it ;R85 ;R85 mov cl, 0D8h ;ARR6 ;R85 call F000_Get_Cyrix ;R85 and al, 11110000b ;R85 or al, ch ;set REGION BLOCK size ;R85 call F000_Set_Cyrix ;R85 ;R85 cmp bx, si ;if must set noncacheable memory size ;R85 ;= set noncacheable memory size ;R85 je Value_Ok ;then set finish ;R85 ;R85 push bx ;save next must noncacheable address ;R85 ; MB is it unit ;R85 ;R85 xor ebx, ebx ;clear ebx ;R85 ;R85 mov cl, 0d6h ;ARR6 Noncacheable A31-A24 ;R85 call F000_Get_Cyrix ;R85 mov bh, al ;R85 ;R85 mov cl, 0d7h ;ARR6 Noncacheable A23-A16 ;R85 call F000_Get_Cyrix ;R85 mov bl, al ;now BX is system memory size ;R85 ;R85 shl ebx, 16 ;ebx Bit 31 - 16 is A31-A16 ;R85 ;R85 mov cl, 0d8h ;ARR6 Noncacheable A15-A12 ;R85 call F000_Get_Cyrix ;R85 mov bh, al ;ebx Bit 31 - 12 is A31-A12 ;R85 ;R85 xor eax, eax ;clear eax ;R85 mov ax, si ;get last set cacheable memory size ;R85 shl eax, 20 ;EAX b31-b12 => A31-A12 ;R85 add ebx, eax ;BX is next noncacheable start address ;R85 ;Bit 31-12 is A31-A12 ;R85 ;now BX is next noncacheable address ;R85 mov al, bh ;set A15-A12 ;R85 mov cl, 0d5h ;ARR5 A15-A12 ;R85 call F000_Set_Cyrix ;R85 ;R85 shr ebx, 16 ;EBX bit 15-0 is A31-A16 ;R85 ;R85 mov al, bl ;R85 mov cl, 0d4h ;ARR5 A23-A16 ;R85 call F000_Set_Cyrix ;set A23-A16 ;R85 ;R85 mov al, bh ;R85 mov cl, 0d3h ;ARR5 A31-A24 ;R85 call F000_Set_Cyrix ;set A31-A24 ;R85 ;R85 mov cl, 0e1h ;R85 mov al, 1 ;Set ARR5 noncacheable region ;R85 call F000_Set_Cyrix ;R85 ;R85 pop bx ;get must noncacheable address ;R85 mov ax, si ;Get last Cacheable size ;R85 sub bx, ax ;if noncacheable address = ;R85 ;Cacheable size ;R85 mov ax, bx ;ax is must noncacheable address ;R85 mov ch, 0 ;ch is D5 value ;R85 jz short Value_Ok2 ;go set D5 value ;R85 ;R85 mov ch, 0fh ;value for 32MB D5 value ;R85 mov si, 01000000b ;maxnum is 32MB ;R85 Chk_MemSize2: ;R85 shr si, 1 ;next memory size ;R85 dec ch ;next register value ;R85 cmp bx, si ;if must noncacheable address ;R85 ;=> Cacheable size ;R85 jae short Value_Ok2 ;go to check is it on the times value ;R85 jmp short Chk_MemSize2;check next vlaue ;R85 Value_Ok2: ;R85 push ax ;save must noncacheable address ;R85 push dx ;save surplus value ;R85 div si ;onboard memory size DIV ;R85 ;noncacheable memory size ;R85 or dx, dx ;if on the value ;R85 pop dx ;restore surplus value ;R85 pop ax ;restore onboard memory size ;R85 jnz short Chk_MemSize2 ;go to set it ;R85 ;R85 mov cl, 0D5h ;ARR5 ;R85 call F000_Get_Cyrix ;R85 and al, 11110000b ;set REGION BLOCK value ;R85 or al, ch ;R85 call F000_Set_Cyrix ;R85 ;R85 cmp bx, si ;if must set noncacheable memory size ;R85 ;= set noncacheable memory size ;R85 je short Value_Ok ;then set finish ;R85 ;R85 push bx ;save must noncacheable address ( MB ) ;R85 xor ebx, ebx ;clear ebx ;R85 mov cl, 0d3h ;ARR5 Noncacheable A31-A24 ;R85 call F000_Get_Cyrix ;R85 mov bh, al ;R85 ;R85 mov cl, 0d4h ;ARR5 Noncacheable A23-A16 ;R85 call F000_Get_Cyrix ;R85 mov bl, al ;now BX is system memory size ;R85 ;R85 shl ebx, 16 ;ebx Bit 31 - 16 is A31-A16 ;R85 ;R85 mov cl, 0d5h ;ARR5 Noncacheable A15-A12 ;R85 call F000_Get_Cyrix ;R85 mov bh, al ;ebx Bit 31 - 12 is A31-A12 ;R85 ;R85 xor eax, eax ;clear EAX ;R85 mov ax, si ;ax is last set noncacheable size ;R85 shl eax, 20 ;eax bit 31-12 is noncacheable size ;R85 ;A31-A12 ;R85 add ebx, eax ;BX is next noncacheable start address ;R85 ;Bit 31-12 is A31-A12 ;R85 ;now BX is next noncacheable address ;R85 mov al, bh ;R85 mov cl, 0d2h ;ARR4 A15-A12 ;R85 call F000_Set_Cyrix ;R85 ;R85 shr ebx, 16 ;EBX bit 15-0 is A31-A16 ;R85 ;R85 mov al, bl ;R85 mov cl, 0d1h ;ARR4 A23-A16 ;R85 call F000_Set_Cyrix ;R85 ;R85 mov al, bh ;R85 mov cl, 0d0h ;ARR4 A31-A24 ;R85 call F000_Set_Cyrix ;R85 ;R85 mov cl, 0e0h ;R85 mov al, 1 ;Set ARR4 noncacheable region ;R85 call F000_Set_Cyrix ;R85 ;R85 pop bx ;get must noncacheable address ( MB ) ;R85 mov ax, si ;Get last Cacheable size ;R85 sub bx, ax ;if noncacheable address = ;R85 ;Cacheable size ;R85 mov ax, bx ;ax is must noncacheable address ;R85 mov ch, 0 ;ch is D2 value ;R85 jz short Value_Ok3 ;go set D2 value ;R85 ;R85 mov ch, 0fh ;value for 32MB ;R85 mov si, 01000000b ;maxmum is 32MB ;R85 Chk_MemSize3: ;R85 shr si, 1 ;next memory size ;R85 dec ch ;next register value ;R85 cmp bx, si ;if must noncacheable address ;R85 ;=> Cacheable size ;R85 jae short Value_Ok3 ;go to check is it on the times value ;R85 jmp short Chk_MemSize3;check next vlaue ;R85 Value_Ok3: ;R85 push ax ;save must noncacheable address ;R85 push dx ;save surplus value ;R85 div si ;onboard memory size DIV ;R85 ;noncacheable memory size ;R85 or dx, dx ;if on the value ;R85 pop dx ;restore surplus value ;R85 pop ax ;restore onboard memory size ;R85 jnz short Chk_MemSize3 ;go to set it ;R85 ;R85 mov cl, 0D2h ;ARR4 ;R85 call F000_Get_Cyrix ;R85 and al, 11110000b ;set REGION BLOCK value ;R85 or al, ch ;R85 call F000_Set_Cyrix ;R85 Value_ok: ;R85 F000_call lock_Cyrix ;lock cyrix CPU register access ;R85 ;R17B - End ;R85 ;R85 ;R17B ifndef M1_Cacheable_Use_Old ;R17A ;R85 ;R17B shr ebx,10 ;R17 convert to 1Mb unit ;R85 ;R17B ;R17 - Start ;R85 ;R17B shr ebx, 3 ;convert 8 MB Unit ;R85 ;R17B or bx, bx ;if less 8 MB ;R85 ;R17B jz Not_M1Cpu ;don't set register ;R85 ;R17B ;R85 ;R17B cmp bl, 8 ;R85 ;R17B jne short @f ;R85 ;R17B mov bl, 7 ;R85 ;R17B jmp short set_register ;R85 ;R17B @@: ;R85 ;R17B cmp bl, 9 ;R85 ;R17B jne short @f ;R85 ;R17B mov bl, 8 ;R85 ;R17B jmp short set_register ;R85 ;R17B @@: ;R85 ;R17B cmp bl, 10 ;R85 ;R17B jne short @f ;R85 ;R17B mov bl, 9 ;R85 ;R17B jmp short set_register ;R85 ;R17B @@: ;R85 ;R17B cmp bl, 12 ;R85 ;R17B jne short @f ;R85 ;R17B mov bl, 10 ;R85 ;R17B jmp short set_register ;R85 ;R17B @@: ;R85 ;R17B cmp bl, 16 ;R85 ;R17B jne short @f ;R85 ;R17B mov bl, 11 ;R85 ;R17B jmp short set_register ;R85 ;R17B @@: ;R85 ;R17B cmp bl, 20 ;R85 ;R17B jne short @f ;R85 ;R17B mov bl, 12 ;R85 ;R17B jmp short set_register ;R85 ;R17B @@: ;R85 ;R17B cmp bl, 24 ;R85 ;R17B jne short @f ;R85 ;R17B mov bl, 13 ;R85 ;R17B jmp short set_register ;R85 ;R17B @@: ;R85 ;R17B cmp bl, 32 ;R85 ;R17B jne short set_register ;R85 ;R17B mov bl, 14 ;R85 ;R17B set_register: ;R85 ;R17B mov si, offset egroup:Cyrix_cache_tbl ;R85 ;R17B xor ax, ax ;R85 ;R17B mov al, bl ;R85 ;R17B dec al ;R85 ;R17B mov bl, 12 ;R85 ;R17B mul bl ;R85 ;R17B add si, ax ;R85 ;R17B F000_call Unlock_Cyrix ;R85 ;R17B mov cl, 0d0h ;R85 ;R17B @@: ;R85 ;R17B mov al, cs:[si] ;R85 ;R17B call F000_Set_Cyrix ;R85 ;R17B inc cl ;R85 ;R17B inc si ;R85 ;R17B cmp cl, 0dbh ;R85 ;R17B jbe @b ;R85 ;R17B ;R85 ;R17B F000_call lock_Cyrix ;R85 ;R17B ;R17 - End ;R85 ;R17B ;R85 ;R17B else ;R17A ;R85 ;R17B ;R85 ;R17B ;R17A comment % ;R17 ;R85 ;R17B push ebx ;save ext memory size ;R85 ;R17B ;R85 ;R17B shr ebx,10 ;convert to 1Mb unit ;R85 ;R17B ;R85 ;R17B mov ah,3 ;value for 1Mb ;R85 ;R17B mov si,1 ;minmum is 1Mb ;R85 ;R17B Chk_MemSize: ;R85 ;R17B cmp bx,si ;R85 ;R17B jbe short Value_Ok ;R85 ;R17B shl si,1 ;next memory size ;R85 ;R17B inc ah ;next register value ;R85 ;R17B jmp short Chk_MemSize ;R85 ;R17B Value_Ok: ;R85 ;R17B ;R85 ;R17B F000_call Unlock_Cyrix ;R85 ;R17B ;R85 ;R17B ;set cacheable region for M1 CPU in ARR7 ;R85 ;R17B ;R85 ;R17B mov cl, 0dbh ;ARR7 ;R85 ;R17B mov al,ah ;set cacheable region ;R85 ;R17B call F000_Set_Cyrix ;R85 ;R17B ;R85 ;R17B pop ebx ;restore extended memory size ;R85 ;R17B ;R85 ;R17B push ebx ;Save memory size ;R85 ;R17B ;R85 ;R17B shr ebx, 2 ;EBX b4-b23 -> A12-A31 ;R85 ;R17B shl ebx, 4 ;R85 ;R17B ;R85 ;R17B mov cl, 0d8h ;ARR6 ;R85 ;R17B mov al, bl ;R85 ;R17B call F000_Set_Cyrix ;R85 ;R17B ;R85 ;R17B shr ebx, 8 ;R85 ;R17B mov cl, 0d6h ;ARR6 ;R85 ;R17B mov al, bh ;R85 ;R17B call F000_Set_Cyrix ;R85 ;R17B ;R85 ;R17B mov cl, 0d7h ;ARR6 ;R85 ;R17B mov al, bl ;R85 ;R17B call F000_Set_Cyrix ;R85 ;R17B ;R85 ;R17B mov cl, 0E2h ;R85 ;R17B mov al, 1 ;ARR6 as non-cacheable ;R85 ;R17B call F000_Set_Cyrix ;R85 ;R17B ;R85 ;R17B pop ebx ;R85 ;R17B shr ebx, 10 ;ebx=ebx/1024 ;R85 ;R17B mov ax, bx ;R85 ;R17B mov bx, si ;Get Cacheable size ;R85 ;R17B sub bx, ax ;R85 ;R17B mov al, 0 ;R85 ;R17B jz short Value_Ok1 ;R85 ;R17B ;R85 ;R17B mov al,9 ;value for 1MB ;R85 ;R17B mov si,1 ;minmum is 1MB ;R85 ;R17B Chk_MemSize1: ;R85 ;R17B cmp bx,si ;R85 ;R17B jbe short Value_Ok1 ;R85 ;R17B shl si,1 ;next memory size ;R85 ;R17B inc al ;next register value ;R85 ;R17B cmp ah, 0fh ;R85 ;R17B jb short Chk_MemSize1 ;R85 ;R17B ;R85 ;R17B Value_Ok1: ;R85 ;R17B ;R85 ;R17B mov cl, 0D8h ;R85 ;R17B call F000_Set_Cyrix ;R85 ;R17B ;R85 ;R17B F000_call lock_Cyrix ;R85 ;R17B ;R17A % ;R17 ;R85 ;R17B endif ;M1_Cacheable_Use_Old ;R85 pop esi ;R17C ;R85 Not_M1Cpu: ;R85 ;R85 endif; BIOS_SUPPORT_586 ;R85 ;R85 ifdef P6_BIOS_ONLY ;R85 ;Set 0-640K MTRR for P6 type CPUs ;R85 ;R85 or al,al ;for base memory ? ;R85 jnz short Set_1MbAbove ;R85 ;R85 ;Set A0000-BFFFF as uncache region ;R85 xor eax,eax ;set uncache of low 32bit ;R85 mov edx,eax ;set uncache of high 32bit ;R85 mov ecx,259H ;region for A0000-BFFFF ;R85 WRMSR ;R85 ;R85 ;Set C0000-FFFFF as uncache region ( 268H - 26FH ) ;R85 mov cl,68H ;start from C0000H ;R85 SetUc_Nxt32K: ;R85 WRMSR ;R85 inc cl ;next 32k ;R85 cmp cl,6FH ;f8000-fffff ? ;R85 jbe short SetUc_Nxt32K ;R85 ;R85 ;Clear all Variable Range MTRRs (200H - 20FH) ;R85 xor cl,cl ;start from register 200H ;R85 Clear_VarMtrr: ;R85 WRMSR ;R85 inc cl ;next MTRR ;R85 cmp cl,0FH ;last MTRR ? ;R85 jbe short Clear_VarMtrr ;R85 ;R85 ;Enable write back of 0-640K for P6 CPU ;R85 mov eax,06060606H ;set memory type to WB in lower 32bit ;R85 mov edx,eax ;higher 32bit ;R85 mov ecx,250H ;address(250H) for 0-512K ;R85 WRMSR ;R85 mov cl,58H ;address(258H) for 512K-640K ;R85 WRMSR ;R85 ;R85 ;Enable caching for memory ;R85 mov eax,00000C00h ;R85 xor edx,edx ;R85 mov cl,0ffH ;address(2ffH) to enable caching ;R85 WRMSR ;R85 jmp Flush_Cache_TLB ;R85 ;R85 Set_1MbAbove: ;R85 mov eax,esi ;R85 or eax,eax ;zero size ? ;R85 jz short No_Need_MTRR ;R85 ;R85 add eax,1024 ;add 1Mb base address ;R85 shl eax,10 ;convert to flat address ;R85 ;R85 mov cx,11 ;check A31-A21 ;R85 ;R85 mov esi,200H ;MTRRphybas0 ;R85 xor ebx,ebx ;start from MTRR mask 0 ;R85 xor edi,edi ;R85 ;R85 Next_Addr_Bit: ;R85 ;R85 or bl,1 ;set mask bit ;R85 ror ebx,1 ;R85 ;R85 rol eax,1 ;R85 jc short Set_Mtrr_Base ;R85 ;R85 loop short Next_Addr_Bit ;next address bit to check ;R85 ;R85 jmp short Flush_Cache_TLB ;R85 ;R85 Set_Mtrr_Base: ;R85 push eax ;R85 push ecx ;R85 ;R85 mov ecx,esi ;address of MTRR ;R85 mov eax,edi ;memory type ;R85 or al,06H ;enable WB ;R85 xor edx,edx ;top 32bit of MTRR ;R85 WRMSR ;R85 ;R85 inc ecx ;address mask of MTRR ;R85 mov edx,0FH ;mask bit for A35-A32;R66 ;R85 mov eax,ebx ;R85 or ah,08H ;enable valid bit ;R85 WRMSR ;R85 ;R85 ;setup next base address by examine mask address ;R85 xor eax,eax ;R85 mov al,1 ;R85 mov ecx,ebx ;R85 ;R85 NextShift_Bit: ;R85 ;R85 ror ecx,1 ;R85 jc short Shift_Ok ;R85 ;R85 shl eax,1 ;R85 jmp short NextShift_Bit ;R85 Shift_Ok: ;R85 add edi,eax ;R85 ;R85 pop ecx ;R85 pop eax ;R85 inc esi ;next base address ;R85 inc esi ;next base address ;R85 jmp short Next_Addr_Bit ;R85 ;R85 ;R85 Flush_Cache_TLB: ;R85 ;Invalidate TLB and flush cache ;R85 WBINVD ;R85 mov eax,cr3 ;R85 mov cr3,eax ;Invalidate TLB by loading CR3. ;R85 ;R85 ;R85 No_Need_MTRR: ;R85 endif; P6_BIOS_ONLY ;R85 ;R85 ret ;R85 Set_Cpu_MtRR endp ;R17B ;R17 - Start ;R17B IF BIOS_SUPPORT_586 ;R17B Cyrix_cache_tbl: ;R17B ; ARR4 , ARR5 , ARR6 , ARR7 ;R17B ; A31-A16 , A31-A16 , A31-A16 , A31-A16 ;R17B ; A15-A12, A15-A12, A15-A12, A15-A12 ;R17B ; 0D0h,0D1h,0D2h, 0D3h,0D4h,0D5h, 0D6h,0D7h,0D8h, 0D9h,0DAh,0DBh ;R17B ;R17B db 000h,000h,000h, 000h,000h,000h, 000h,000h,000h, 000h,000h,006h ;8M ;R17B db 000h,000h,000h, 000h,000h,000h, 000h,000h,000h, 000h,000h,007h ;16M ;R17B db 000h,000h,000h, 000h,000h,000h, 001h,080h,00Ch, 000h,000h,008h ;24M ;R17B db 000h,000h,000h, 000h,000h,000h, 000h,000h,000h, 000h,000h,008h ;32M ;R17B db 000h,000h,000h, 002h,080h,00Ch, 003h,000h,00Dh, 000h,000h,009h ;40M ;R17B db 000h,000h,000h, 000h,000h,000h, 003h,000h,00Dh, 000h,000h,009h ;48M ;R17B db 000h,000h,000h, 000h,000h,000h, 000h,000h,000h, 000h,000h,009h ;64M ;R17B db 004h,080h,00Ch, 005h,000h,00Dh, 006h,000h,00Eh, 000h,000h,00Ah ;72M ;R17B db 000h,000h,000h, 005h,000h,00Dh, 006h,000h,00Eh, 000h,000h,00Ah ;80M ;R17B db 000h,000h,000h, 000h,000h,000h, 006h,000h,00Eh, 000h,000h,00Ah ;96M ;R17B db 000h,000h,000h, 000h,000h,000h, 000h,000h,000h, 000h,000h,00Ah ;128M ;R17B db 00Ah,000h,00Eh, 00Ch,000h,00Eh, 00Eh,000h,00Eh, 000h,000h,00Bh ;160M ;R17B db 000h,000h,000h, 00Ch,000h,00Eh, 00Eh,000h,00Eh, 000h,000h,00Bh ;192M ;R17B db 000h,000h,000h, 000h,000h,000h, 000h,000h,000h, 000h,000h,00Bh ;256M ;R17B ENDIF ;BIOS_SUPPORT_586 ;R17B ;R17 - End ;[]==========================================================[] ;KBD_A20_OFF ; ; Procedure to disable GATE A20 on the keyboard ; controller. This is necessary for FAST A20 ; operation because if KBD A20 is enabled, gate A20 ; cannot be disabled with FAST A20 (the A20 line ; will always be enabled which will screw up any ; software that needs the 1 meg wrap around. ; ; INPUT: NONE ; OUTPUT: KBD gate A20 is disabled ; ; SAVES: AX BX CX DX ; ;[]==========================================================[] ALIGN 4 PUBLIC KBD_A20_OFF KBD_A20_OFF PROC NEAR push ax mov al,0ddh ;gate a20 off command push ds push 0f000h pop ds lea bx,SPD_DEF test byte ptr [bx],01H pop ds jz short No_Active_Low and al,11110011b ;set 23 and 24 pins low No_Active_Low: a20_op: push bx push cx push dx push ax call F000_Buffer_8042_Full ; wait for kb inbuff empty jnz short a20_op_bad ; return if empty mov al,0D1h ; write output port command out STAT8042,al call F000_Buffer_8042_Full ; and wait jnz short a20_op_bad ; timeout, jump out of here pop ax ; command byte out DATA8042,al call F000_Buffer_8042_Full ; and make sure got there jz short a20_op_ret push ax ; push junk onto stack a20_op_bad: pop ax ; get junk off stack stc ; set carry for error a20_op_ret: pop dx pop cx pop bx pop ax ret KBD_A20_OFF ENDP ;R85 ifdef MP_SUPPORT ;R85 ;R85 ifdef P6_BIOS_ONLY ;R85 public Init_Mtrr ;R85 Init_Mtrr proc far ;R85 ;R85 call P6_BiosUpdate ;update P6 patch codes ;R85 ;R85 xor al,al ;program address for 0-640k ;R85 call Set_Cpu_MtRR ;R85 ;R85 mov ax,4100H ;R85 mov ds,ax ;R85 mov esi,dword ptr ds:[0] ;save extended size ;R85 ;R85 mov al,1 ;program address above 1Mb ;R85 call Set_Cpu_MtRR ;R85 ;R85 ret ;R85 Init_Mtrr endp ;R85 endif; P6_BIOS_ONLY ;R85 ;R85 endif; MP_SUPPORT ;R85 ;R85 ifdef P6_BIOS_ONLY ;R85 P6_BiosUpdate proc near ;R85 ;Execute BIOS Update data to fix P6 bugs ;R85 ;R85 ;Now , read CPU ID , don't execute BIOS Update data if mismatch ;R85 mov eax,1 ;eax = 1 to read CPU ID ;R85 db 0fh,0A2h ;CPU ID instruction ;R85 ;R85 ;R14 - start ;R85 mov si,offset P6Upd_CPUIDs ;get offset of CPUID table ;R85 Check_Next_P6: ;R85 mov bx,cs:[si] ;get address of CPUid ;R85 cmp bx,-1 ;last CPU ID ? ;R85 je short No_Patch_Data ;R85 mov cx,cs:[si+2] ;R27 ;R85 mov ds,cx ;R27 ;R85 cmp ax,word ptr ds:[bx].Processor_Version ;R27 ;R85 ;R27 cmp ax,word ptr cs:[bx] ;CPU ID match ? ;R85 je short Go_Patch ;yes patch it ;R85 add si,4 ;R27 ;R85 ;R27 add si,2 ;scan next CPU ;R85 jmp short Check_Next_P6 ;R85 ;R85 Go_Patch: ;R85 mov ecx,79H ;CPU register ;R85 xor eax,eax ;R85 xor edx,edx ;R85 mov ax,ds ;R27 ;R85 ;R27 mov ax,cs ;R85 shl eax,4 ;segment of data ;R85 ;R61 add bx,ADDR_UPD_DATA ;point to data area ;R85 add bx,48 ;point to data area;R61 ;R85 mov ax,bx ;R85 WRMSR ;R85 No_Patch_Data: ;R85 ;R14 - end ;R85 ;R85 ;R14 cmp ax,word ptr cs:[CpuIdNo];CPU ID match ? ;R85 ;R14 jne short No_Patch_Data ;skip if mismatch ;R85 ;R14 ;R85 ;R14 mov ecx,79H ;CPU register ;R85 ;R14 xor eax,eax ;R85 ;R14 xor edx,edx ;R85 ;R14 mov ax,cs ;R85 ;R14 shl eax,4 ;segment of data ;R85 ;R14 mov ax,offset BiosUpdateData;offset of data ;R85 ;R14 WRMSR ;R85 ;R14 No_Patch_Data: ;R85 ret ;R85 P6_BiosUpdate endp ;R85 endif; P6_BIOS_ONLY ;[]==============================================================[] ; ; POST_3S: ; ; Force default values into almost everything, including ; CMOS timers, math coprocessor, timers, DMA controllers, ; interrupt controller, basic video, etc. ; ;Saves: NONE + NO STACK ; ;Entry: NONE ;Exit: C Set if fatal error ; ;[]==============================================================[] PUBLIC POST_3S POST_3S PROC NEAR call Restore_WarmFlag ;R39A ifdef CUSTOM_LCD_OUTPUT ;R241 call Lcd_Init ;R241 endif; CUSTOM_LCD_OUTPUT ;R241 IF BUS_TYPE EQ EISA_BUS call Eisa_Early_Init ENDIF ;BUS_TYPE clc ret POST_3S ENDP ;R39A - start Restore_WarmFlag proc near ifdef PCI_RESET_SUPPORT ;Clear warm boot flag stored in CMOS for next warm reset mov ax,G_RAM mov ds,ax assume ds:G_RAM mov al,0FH NMI_OFF call F000_Get_Cmos cmp al,0AAH jne short Not_WarmBoot mov word ptr ds:USER_REBOOT, CTRL_ALT_DEL ; warm boot ;clear warm boot flag mov al,0FH NMI_OFF xor ah,ah call F000_Set_Cmos Not_WarmBoot: endif; PCI_RESET_SUPPORT ret Restore_WarmFlag endp ;R39A - end ;[]==============================================================[] ; ; POST_4S: ; ; Check the memory refresh toggle. ; ;Saves: NONE ; ;Entry: NONE ;Exit: C Set if fatal error ; ;[]==============================================================[] PUBLIC POST_4S POST_4S PROC NEAR clc ret POST_4S ENDP ;Begin move keyboard stuff ;[]==============================================================[] ; ; POST_5S: ; ; Blank out the video screen. Initialize the keyboard. ; ;Saves: NONE + NO STACK ; ;Entry: NONE ; Exit: C Set if fatal error ; ;[]==============================================================[] ;R160 - start ifndef NO_Special_KB_Test ;R155A ifndef NO_USE_KB ;R160A ;R263 - start ;; Note : Switch "Special_KB_Test" will cause system hang up if ;; Phoneix Multi-Key KBC is used (like W83627F-PW). ;; ifdef W83627F Special_KB_Test EQU 1 endif; W83627F ifdef W83627HF Special_KB_Test EQU 1 endif; W83627HF ;R263 - end ifdef W83977EF ;R234 Special_KB_Test EQU 1 ;R234 endif; W83977EF ;R234 ifdef W83977TF Special_KB_Test EQU 1 endif; W83977TF ifdef W83977ATF Special_KB_Test EQU 1 endif; W83977ATF ifdef W83977AF Special_KB_Test EQU 1 endif; W83977AF ifdef W83967AF Special_KB_Test EQU 1 endif; W83967AF endif; NO_USE_KB ;R160A endif; NO_Special_KB_Test ;R155A ;R160 - end PUBLIC POST_5S POST_5S PROC NEAR ifdef PNP_BIOS ;R159 ifdef NEW_SUPERIO_KERNEL call Superio_Early_Init ;R159 endif ;NEW_SUPERIO_KERNEL endif; PNP_BIOS ;R159 ; ;r143 start ;M01 ifdef RPB_ENABLED ;M01 ifndef RPB_NOVIDEO ;M01 extrn rpb_set_bios_error:near ;M01 xor cx,cx ;M01 call rpb_set_bios_error ; clear error bits ;M01 endif ;M01 endif ; RPB_ENABLED ;r143 end ; ; ; Blank out the video screen ; ifndef DTK_PCI_BOARD in al,64H test al,04H ;power up ? jz short @F ;skip if yes mov dx,03c0h xor al,al out dx,al NEWIODELAY out dx,al NEWIODELAY @@: endif ;DTK_PCI_BOARD ; ; Clear CMOS status byte ; mov al,CMOS_ERROR NMI_OFF xor ah,ah call F000_Set_Cmos ; reset status byte ; ; Clear 8042 interface... ; ;[STN012699] START ; To solve the hang at 05h if keypressed problem mov cx,5000 @@: in al, 60h ;get dummy data loop short @B ;[STN012699] END xor cx,cx p5_11: in al,STAT8042 ; see if any data NEWIODELAY test al,IBF_8042+OBF_8042 ; any input and/or output? jz short p5_2_1 ; no, next part of test ifdef Special_KB_Test ;R155 jmp p5_91 ;R155 IBF & OBF must be cleared endif; Special_KB_Test ;R155 test al,OBF_8042 ; input? jz short p5_12 ; no, just keep waiting in al,DATA8042 ; yes, clear out data NEWIODELAY p5_12: loop short p5_11 jmp p5_91 ; failure of 8042 p5_2_1: ; ; Tell 8042 to do self-test ; mov bl,10 p5_2: mov al,TEST_KBRD out STAT8042,al ; send self-test cmd. NEWIODELAY call F000_Buffer_8042_Full ; wait for buffer to clear jnz p5_91 ; failure of 8042 call F000_Out_8042_Full ; wait for 8042 output to be full ifdef Special_KB_Test ;R155 jz p5_91 ;R155 IBF & OBF must be cleared else; Special_KB_Test ;R155 jz short p5_91 ; yes, error... endif; Special_KB_Test ;R155 in al,DATA8042 NEWIODELAY cmp al,055h ; any errors on keyboard ctlr? je short p5_911 dec bl jnz short P5_2 p5_911: ifndef No_Keyboard_Switch_Delay ; Auto-switch delay mov cx,8000h loop short $ endif ;No_Keyboard_Switch_Delay ; ; Set 8042 command byte ; p5_3: ;R155 - start ifdef Special_KB_Test in al,STAT8042 test al,OBF_8042 ; Check OBF jz p5_30 in al,DATA8042 ; clear output Buffer p5_30: mov al,0a7h ; Disable Mouse out STAT8042,al NEWIODELAY call F000_Buffer_8042_Full jnz p5_91 ; timeout error mov al,0cah ; Test PS2/AT Mode out STAT8042,al call F000_Buffer_8042_Full jnz p5_91 ; timeout error call F000_Out_8042_Full ; wait output buffer full jz p5_91 ; timeout error in al,DATA8042 test al,1 jz p5_91 ; mode error mov al,0d2h out STAT8042,al ; write KBD output buffer NEWIODELAY call F000_Buffer_8042_Full jnz p5_91 mov al,0aah out DATA8042,al NEWIODELAY jnz p5_91 call F000_Out_8042_Full jz p5_91 in al,DATA8042 cmp al,0aah jnz p5_91 mov al,0aah out STAT8042,al call F000_Buffer_8042_Full jnz p5_91 call F000_Out_8042_Full jz p5_91 in al,DATA8042 cmp al,055h jz p5_31 jmp p5_91 p5_31: mov al,0f4h ; Default enable out DATA8042,al p5_32: call F000_Buffer_8042_Full jnz short p5_91 ; timeout error p5_33: in al,STAT8042 test al,40h ; General Time out ?? jnz short p5_39 ; Yes, KB is not connected test al,01h ; Output Buffer Full?? jz short p5_33 ; No!! in al,DATA8042 cmp al,0fah jnz short p5_91 p5_39: endif; Special_KB_Test ;R155 - end ifndef Special_Patch_For_Abit_P6 ;R53 mov al,60h ; 60h = write 8042 command byte out STAT8042,al NEWIODELAY call F000_Buffer_8042_Full ; wait for input buffer to be empty jnz short p5_91 ; timeout error... mov al,45h ; AT interface, keyboard enabled, system flag out DATA8042,al NEWIODELAY call F000_Buffer_8042_Full ; wait for input buffer to be empty jnz short p5_91 ; timeout error... endif; Special_Patch_For_Abit_P6 ;R53 mov al,ENABLE_KBRD ;enable keyboard out STAT8042,al newiodelay call F000_Buffer_8042_Full ; wait for input buffer to be empty jnz short p5_91 ; timeout error... ifndef DISABLE_PS2_AT_POST5 call Check_PS2_Mouse_Support jz short No_Mouse_Support endif ;DISABLE_PS2_AT_POST5 ifndef No_Disable_PS2_Mouse_In_POST5 ;R99 mov al,0A7H ; disable mouse interface out STAT8042,al newiodelay call F000_Buffer_8042_Full ; wait for input buffer to be empty endif; No_Disable_PS2_Mouse_In_POST5 ;R99 No_Mouse_Support: ifdef KBC_KBDMOUSE_SWAP ;R115 call KbdMouse_Swap ;R115 endif; KBC_KBDMOUSE_SWAP ;R115 ;R169ifdef Password_ON_NOW_SUPPORT ;R164 ;R164Aifdef MOUSE_BUTTON_ON_SUPPORT ;R164 ;R164Aif Early_Init_PS2Mouse ;R169 ;R164A call Init_Ps2Mouse_Proc ;R164 ;R164Aendif; Early_Init_PS2Mouse ;R169 ;R164Aendif; MOUSE_BUTTON_ON_SUPPORT ;R164 ;R169endif; Password_ON_NOW_SUPPORT ;R164 ifdef Special_KB_Test ;R214 call Reset_Kb ;R214;reset KB endif; Special_KB_Test ;R214 clc Post5_Exit: ret ; ; Return with an error ; p5_91: stc ;R111 - start ifdef PCI_RESET_SUPPORT ifdef PIIX_ID ;R111C FIX_W83C43_BTC5339 EQU 1 ;R111C endif; PIIX_ID ;R111C endif; PCI_RESET_SUPPORT ;R111 - end ifdef FIX_W83C43_BTC5339 ;issue hardware reset signal to reset keyboard controller mov dx,0cf9h mov al,2 ;enable hardware reset out dx,al NEWIODELAY mov al,6 ;issue reset out dx,al endif; FIX_W83C43_BTC5339 ;R158 - start ifdef ALiM153x_Hardware_RESET mov eax,80000000h + M1543 + 44h mov dx,0cf8H out dx,eax NEWIODELAY mov dl,0fcH mov al,80h out dx,al NEWIODELAY mov al,0feh out 64h,al jmp $ endif ;ALiM153x_Hardware_RESET ;R158 - end ;R167 - start ifdef VIA_PCI_RESET ifndef No_Cut_IRQ12_When_No_PS2_Pluged ;R167E Disable_VIA_PS2_In_PCI_RESET EQU 1 ;R167E endif; No_Cut_IRQ12_When_No_PS2_Pluged ;R167E IFDEF Disable_VIA_PS2_In_PCI_RESET ;R167D - start mov eax,80000000H + VT586 + 058h ;Release IRQ12 mov dx,0cf8H out dx,eax NEWIODELAY mov dl,0feH ;Register 5Ah Bit 1 in al,dx NEWIODELAY and al,not 02H ;Clear Bit 1 out dx,al ENDIF; Disable_VIA_PS2_In_PCI_RESET ;R167D - end ifdef VT586_ACPI mov eax,80000000H + VT586_ACPI + 40h mov dx,0cf8H out dx,eax NEWIODELAY mov dl,0fdH ;Register 41h Bit 7 in al,dx NEWIODELAY and al,not 80H ;Clear Bit 7 out dx,al endif; VT586_ACPI ;R167B mov eax,80003808H ;index port ifndef VT596 ;R167C mov eax,80000000H + VT586 + 08h ;R167B index port mov dx,0cf8H out dx,eax NEWIODELAY mov dl,0fcH ;register 08H = Revision in al,dx cmp al,22h jb @f endif; VT596 ;R167C ;R167B mov eax,80003844H ;index port mov eax,80000000H + VT586 + 44h ;R167B index port mov dx,0cf8H out dx,eax NEWIODELAY mov dl,0ffH ;register 47H bit 0 to reset in al,dx NEWIODELAY or al,01H ;enable system reset out dx,al jmp $ ;R167B @@: endif ;VIA_PCI_RESET ifdef SIS_5598_PCI_RESET mov dx,0cf9h mov al,0ch ;issue CPU reset out dx,al jmp short $ ;R167A ;R167A xor cx,cx ;R121A ;R167A loop $ ;R121A ;R167A xor cx,cx ;R121B ;R167A loop $ ;R121B ;R167A xor cx,cx ;R121C ;R167A loop $ ;R121C ;R167A xor cx,cx ;R121C ;R167A loop $ ;R121C endif; SIS_5598_PCI_RESET ;R167 - end jmp short Post5_Exit POST_5S ENDP ;R115 - start ifdef KBC_KBDMOUSE_SWAP KbdMouse_Swap proc near call Special_KBC_Init call Free_8042_Ibuf ;wait for input buffer free mov al,0aeh ;enable keyboard out 64h,al call Free_8042_Ibuf ;wait for input buffer free mov al,0a8h ;enable PS2 mouse out 64h,al call Free_8042_Ibuf ;wait for input buffer free ;Read data to clear self test mov dl,6 ;try 6 times DataRetry: xor cx,cx ;timeout count DataRd_Loop: in al,64h test al,1 ;output buffer full ? loopz short DataRd_Loop jz short DataRd_Exit in al,60h ;read data dec dl jnz short DataRetry DataRd_Exit: ;Disable PS2 mouse mov al,0a7h ;disable PS2 mouse out 64h,al call Free_8042_Ibuf ;wait for input buffer free ;Save keyboard controller command byte mov al,20h ;read KBC command byte out 64h,al call Free_8042_Ibuf ;wait for input buffer free call Full_8042_Obuf ;wait for output buffer full mov bl,al ;save command byte ;Make primary connector keyboard mov al,0c8h out 64h,al call Free_8042_Ibuf ;wait for input buffer free ;Issue read ID command to primary port call Send_KbRdId cmp al,0f2h ;check if mouse found on primary port je short MouseOn_Pport cmp al,0fah jne short MoreChk_Needed call Full_8042_Obuf ;wait for output buffer full cmp al,0ffh ;mouse on primary port ? ;R115B je short SwapIt je short MouseOn_Pport ;R115Bfind ps2 mouse at PPort or al,al ;check if mouse on primary port je short MouseOn_Pport call Full_8042_Obuf ;wait for output buffer full MoreChk_Needed: in al,64h test al,40h ;check if keyboard found on Pport jz short KbdOn_PPort SwapIt: ;At this moment, nothing found on primary port ; Select secondary port ; mov al,0d4h ; out 64h,al ; call Free_8042_Ibuf ;wait for input buffer free ;issue command to swap ports call Swap_8042Port ;Issue read ID command to secondary port call Send_KbRdId cmp al,0f2h ;check if mouse found on primary port je short MouseOn_SPort cmp al,0fah jne short MoreChk_Needed_Sec call Full_8042_Obuf ;wait for output buffer full cmp al,0ffh ;mouse on secondary port ? je short Make_primary_connector_keyboard ;R115B or al,al ;check if mouse on primary port je short MouseOn_SPort call Full_8042_Obuf ;wait for output buffer full MoreChk_Needed_Sec: in al,64h test al,40h ;check if keyboard found on Pport jz short NonOn_SPort ;R115B - start Make_primary_connector_keyboard: mov al,0c8h out 64h,al call Free_8042_Ibuf ;wait for input buffer free jmp short NonOn_SPort ;R115B - end MouseOn_Pport: ;issue command to swap ports call Swap_8042Port KbdOn_PPort: MouseOn_SPort: NonOn_SPort: ;Restore keyboard controller command byte mov al,60h ;write KBC command byte out 64h,al call Free_8042_Ibuf ;wait for input buffer free mov al,bl out 60h,al call Free_8042_Ibuf ;wait for input buffer free ret KbdMouse_Swap endp Swap_8042Port proc near mov al,0c9h out 64h,al call Free_8042_Ibuf ;wait for input buffer free ret Swap_8042Port endp Send_KbRdId proc near mov al,0f2h out 60h,al call Free_8042_Ibuf ;wait for input buffer free call Full_8042_Obuf ;wait for output buffer full ret Send_KbRdId endp Free_8042_Ibuf: in al,64h ;get status test al,02h ;input buffer jnz short Free_8042_Ibuf ret Full_8042_Obuf: push cx ;R115A push dx ;R115A mov dl, 6 ;R115A aa: xor cx, cx ;R115A @@: in al,64h test al,01h ;output buffer ;R115A jz short Full_8042_Obuf jnz short Full_8042_Obuf_EXIT;R115A loop short @b ;R115A dec dl ;R115A jnz short aa ;R115A Full_8042_Obuf_EXIT: in al,60h ;read input data pop dx ;R115A pop cx ;R115A ret endif; KBC_KBDMOUSE_SWAP ;R115 - end ;[]==============================================================[] ; ; POST_6S: ; ; Checksum the ROM. There are four basic checksums: ; the entire BIOS, the sign-on message, the evaluation ; message and the ATORGS region. ; ;Saves: NONE + NO STACK ; ;Entry: NONE ;Exit: C Set if fatal error ; ;[]==============================================================[] ;R208 ;R208 ;R59 - START ;R208 ifdef FLASH_SUPPORT ;R59B ;R208 ifdef AUTO_DETECT_EEPROM_ID ;R95 ;R208 ;R95 ifdef Flash_2M_support ;R208 ;R95 INCLUDE 2MEEPROM.INC ;R208 INCLUDE EEPROM.INC ;R95 ;R208 EEPROM_Decode_Len EQU offset EEPROM_Decode_End - offset EEPROM_Decode_Start ;R208 ;R208 SST_ID EQU 0BFh ;SST Manufacturer Code ;R208 SST_28EE010_DEVICE EQU 001h ;R95 SST 28EE010 Device ID ;R208 SST_29EE010_DEVICE EQU 007h ;R95 SST 29EE010 Device ID ;R208 SST_29EE020_DEVICE EQU 010h ;SST 29EE020 Device ID ;R208 ;R208 WINBOND_ID EQU 0DAh ;R95 SST Manufacturer Code ;R208 WINBOND_29EE011_DEVICE EQU 0C1h ;R95 WINBOND 29EE010 Device ID ;R208 WINBOND_29C020_DEVICE EQU 045h ;R101 WINBOND 29EE010 Device ID ;R208 ;R208 ATMEL_ID EQU 01Fh ;ATMEL Manufacturer Code ;R208 ATMEL_29C010_DEVICE EQU 0D5h ;R95 ATMEL 29C010 Device ID ;R208 ATMEL_29C020_DEVICE EQU 0DAh ;ATMEL 29F002T Device ID ;R208 ;R208 AMD_ID EQU 001h ;AMD Manufacturer Code ;R208 AMD_29F010_DEVICE EQU 020H ;R95 AMD 29F010 Device ID ;R208 AMD_29F002T_DEVICE EQU 0B0h ;AMD 29F002T Device ID ;R208 ;R208 INTEL_28F002T_ID EQU 089h ;R68 INTEL Manufacturer Code ;R208 INTEL_28F001T_DEVICE EQU 094h ;R95 INTEL 28f001T Device ID ;R208 INTEL_28F002T_DEVICE EQU 07Ch ;R68 INTEL 28f002T Device ID ;R208 INTEL_28F020_DEVICE EQU 0BDh ;R184 INTEL/TI 28f020 Device ID ;R208 ;R208 MXIC_ID EQU 0C2h ;R77 MXIC Manufacturer Code ;R208 MXIC_28F1000PPC_DEVICE EQU 01Ah ;R95 MXIC 28f1000PPC Device ID ;R208 MXIC_28F1000PL_DEVICE EQU 011h ;R95 MXIC 28f1000PL Device ID ;R208 MXIC_28F2000PPC_DEVICE EQU 02Ah ;R77 MXIC 28f2000PPC Device ID ;R208 MXIC_28F2000TPC_DEVICE EQU 03Ch ;R113 MXIC 28f2000TPC Device ID ;R208 MXIC_28F002TTC_DEVICE EQU 02Dh ;R118 MXIC 28f2000TPC Device ID ;R208 ;R208 CSI_ID EQU 031h ;R107 CSI Manufacturer Code ;R208 CSI_CAT28F001P_DEVICE EQU 094h ;R113 CSI CAT28f001P Device ID ;R208 CSI_CAT28F002T_DEVICE EQU 07Ch ;R107 CSI CAT28f002T Device ID ;R208 ;R178 - start ;R208 IMT_MANU_ID_1 EQU 07FH ;IMT manufacturer code byte 1 ;R208 IMT_MANU_ID_2 EQU 01FH ;IMT manufacturer code byte 2 ;R208 IMT_IM29F002T_DEVICE EQU 0A1H ;IMT IM29F002T device code ;R208 ;R178 - end ;R208 ;R190 - start ;R208 BRIGHT_MANU_ID EQU 0DCH ;BRIGHT manufacturer code byte 1 ;R208 BM_29FS020T_DEVICE EQU 02H ;BRIGHT manufacturer code byte 2 ;R208 ;R190 - end ;R208 ;R196 - start ;R208 SGS_THOMSON_MANU EQU 020H ; SGS-THOMSON ;R208 ST_M29F002T EQU 0B0H ; M29F002T device code ;R208 ;R196 - end ;R208 MOSEL_MANU EQU 040H ; MOSEL ;R205 ;R208 MOSEL_V29C51002T_DEVICE EQU 02H ; MOSEL V29C51002T device code ;R205 ;R208 PMC_MANU EQU 09DH ; Programmble Microelectronics Corp. ;R207 ;R208 PMC_PM29F002C EQU 01H ; PM29F002C device code ;R207 ;R208 ;R208 SST_2M_TYPE_EEPROM EQU 1 ;R208 ATMEL_2M_TYPE_EEPROM EQU 2 ;R208 AMD_2M_TYPE_EEPROM EQU 3 ;R208 INTEL_2M_TYPE_EEPROM EQU 4 ;R68 ;R208 MXIC_2M_TYPE_EEPROM EQU 5 ;R77 ;R208 WINBOND_2M_TYPE_EEPROM EQU 6 ;R101 ;R208 CSI_2M_TYPE_EEPROM EQU 7 ;R107 ;R208 MXIC_2M_TYPE_1_EEPROM EQU 8 ;R118 ;R208 IMT_2M_TYPE_EEPROM EQU 9 ;R178 ;R208 BM_2M_TYPE_EEPROM EQU 10 ;R190 ;R208 ST_2M_TYPE_EEPROM EQU 11 ;R196 ;R208 MOSEL_2M_TYPE_EEPROM EQU 12 ;R205 ;R208 PMC_2M_TYPE_EEPROM EQU 13 ;R207 ;R208 ;R208 ;R95 - start ;R208 SST_1M_TYPE_EEPROM EQU 11h ;R208 ATMEL_1M_TYPE_EEPROM EQU 12h ;R208 WINBOND_1M_TYPE_EEPROM EQU 13h ;R208 INTEL_1M_TYPE_EEPROM EQU 14h ;R208 MXIC_1M_PPC_TYPE_EEPROM EQU 15h ;R208 CSI_1M_TYPE_EEPROM EQU 16h ;R113 ;R208 ;R208 MXIC_1M_PL_TYPE_EEPROM EQU 21h ;R208 AMD_1M_TYPE_EEPROM EQU 22h ;R208 ;R95 - end ;R208 ;R208 RESET_CMD EQU 0FFh ;R68 ;R208 ;R208 ;R95 - start ;R208 ifdef Flash_2M_support ;R208 ifdef Flash_16K_8K_8K_Unit ;R208 SST_ID_Check_Routine EQU 1 ;R208 AMD_ID_Check_Routine EQU 1 ;R208 ATMEL_ID_Check_Routine EQU 1 ;R208 INTEL_ID_Check_Routine EQU 1 ;R208 WINBOND_ID_Check_Routine EQU 1 ;R101 ;R208 MXIC_ID_Check_Routine EQU 1 ;R113 ;R208 IMT_ID_Check_Routine EQU 1 ;R178 ;R208 BM_ID_Check_Routine EQU 1 ;R190 ;R208 ST_ID_Check_Routine EQU 1 ;R196 ;R208 MOSEL_ID_Check_Routine EQU 1 ;R205 ;R208 PMC_ID_Check_Routine EQU 1 ;R207 ;R208 ;R123 elseifdef Flash_4K_Unit ;R208 ;R123 MXIC_ID_Check_Routine EQU 1 ;R208 elseifdef Flash_4K_Unit ;R123A ;R208 MXIC_ID_Check_Routine EQU 1 ;R123A ;R208 endif; Flash_16K_8K_8K_Unit ;R208 else; Flash_2M_support ;R208 ifdef Flash_4K_Unit ;R208 SST_ID_Check_Routine EQU 1 ;R208 ATMEL_ID_Check_Routine EQU 1 ;R208 WINBOND_ID_Check_Routine EQU 1 ;R208 MXIC_ID_Check_Routine EQU 1 ;R208 INTEL_ID_Check_Routine EQU 1 ;R208 elseifdef Flash_16K_Unit ;R208 MXIC_ID_Check_Routine EQU 1 ;R208 AMD_ID_Check_Routine EQU 1 ;R208 endif; Flash_4K_Unit ;R208 endif; Flash_2M_support ;R208 ;R95 - end ;R208 ;R208 ;R95 endif; Flash_2M_support ;R208 endif; AUTO_DETECT_EEPROM_ID ;R95 ;R208 endif; FLASH_SUPPORT ;R59B ;R208 ;R59 - END PUBLIC POST_6S POST_6S PROC NEAR ;R138 - start ifdef PATCH_FOR_NEC_SDRAM RESET_CMOS EQU 37H+80H mov al,RESET_CMOS call F000_Get_Cmos cmp al,0BBH ;second boot ? je short Not_1stBoot call Check_Warm_Boot je short Not_1stBoot mov al,RESET_CMOS mov ah,0BBH ;mark second boot flag call F000_Set_Cmos mov si,0e000h ;from e000:0 mov di,02000h ;to 2000:0 mov cx,8000h call E000_Move_Codes far_jmp ,02000h DoReset: ;clear register of 59H to disable F000 shadow mov eax,80000058H ;enable PCI config. mov dx,0cf8h out dx,eax add dl,5 ;start from 0cfch xor al,al ;disable F000 shadow out dx,al ;issue CPU reset ifdef PATCH_FOR_NEC_SDRAM_USE_CPU_RESET ;R138A mov al,4 ;R138A mov dx,0cf9h ;R138A out dx,al ;CPU reset ;R138A else; PATCH_FOR_NEC_SDRAM_USE_CPU_RESET ;R138A mov al,0feh ; out 64h,al ; endif; PATCH_FOR_NEC_SDRAM_USE_CPU_RESET ;R138A Not_1stBoot: mov al,RESET_CMOS xor ah,ah ;mark not second boot flag call F000_Set_Cmos endif; PATCH_FOR_NEC_SDRAM ;R138 - end ;R88 start ;----- Test F000h segment shadow readable and writeable ;----- for POST access correct Test_Address equ 10h Test_Address1 equ 8010h F000_Shadow_Err equ 0EFh call E_F000_Shadow_W ;R150 ;R150 F000_call F000_Shadow_W mov ax,0f000h mov ds,ax mov ecx,ds:[Test_Address] ;save original pattern mov edx,ds:[Test_Address1] ;save original pattern mov dword ptr ds:[Test_Address],55aa33cch mov dword ptr ds:[Test_Address1],0cc33aa55h cmp dword ptr ds:[Test_Address],55aa33cch je short Check_F_next F000_Err_Out: ;Display error code at 80H if F-segment shadow RAM can not be ;accessed. POST_CODE F000_Shadow_Err ifdef CUSTOM_LCD_OUTPUT ;R241 call LCD_Display_Msg ;R241 endif; CUSTOM_LCD_OUTPUT ;R241 ; ; Short beeps loop ; Shadow_Err_Beep: mov dl,2 align 4 short_beep: MOV BL,1 call E000_Snd_Spkr xor cx,cx loop $ dec dl jnz short short_beep loop $ loop $ loop $ loop $ jmp short Shadow_Err_Beep Check_F_next: cmp dword ptr ds:[Test_Address1],0cc33aa55h jne short F000_Err_Out mov ds:[Test_Address],ecx ;restore original pattern mov ds:[Test_Address1],edx ;restore original pattern call E_F000_Shadow_R ;R150 ;R150 F000_call F000_Shadow_R ;R88 end ;R208 ifndef Temp_No_Flash_Support ;R124 ;R59 - START ifdef FLASH_SUPPORT ;R59B ifdef AUTO_DETECT_EEPROM_ID ;R95 ;R208 - start xcall Detect_EEPROM endif ;AUTO_DETECT_EEPROM_ID endif ;FLASH_SUPPORT clc ret POST_6S ENDP ;R208 - end ;R208 ;R208 ;R95 ifdef Flash_2M_support ;R208 cli ;R208 push ds ;R208 push es ;R208 ;R208 ;R123A ;R123 - start ;R208 ;R123A ifdef Flash_2M_support ;R208 ;R123A push ds ;R208 ;R123A mov ax, G_RAM ;R208 ;R123A mov ds, ax ;R208 ;R123A assume ds: G_RAM ;R208 ;R123A or INIT_ERR_FLG,FLASH_IN_POST ;R208 ;R123A pop ds ;R208 ;R123A endif; Flash_2M_support ;R208 ;R123A ;R123 - end ;R208 ;R208 ;; Copy Flash EEPROM Detect Code to 3C00h:0 ;R208 mov ax,3c00h ;R208 mov es,ax ;R208 xor di,di ;R208 push cs ;R208 pop ds ;R208 mov si,offset EEPROM_Decode_Start ;R208 mov cx,EEPROM_Decode_Len ;R208 rep movsb ;R208 ;R208 ;R95 mov bx,di ;R208 ;R95 shl ebx,16 ;R208 mov ax,0f000h ;R208 mov ds,ax ;R208 ;R95A mov ax,8000h ;R95 ;R208 ;R123 mov ax,5000h ;R95A ;R208 mov ax,PnP_DMI_CPU_Backup_Seg ;R123 ;R208 mov es,ax ;R95 ;R208 ;R95 mov si,offset FLASH_ROUTINE_START ;R208 ;R95 mov cx,FLASH_ROUTINE_LEN ;R208 xor di,di ;R95 ;R208 xor si,si ;R95 ;R208 mov cx,8000h ;R95 ;R208 ;R95 rep movsb ;R208 rep movsw ;R95 ;R208 ;R208 FAR_JMP <0>,3c00h ;R208 ;R208 EEPROM_Decode_Start: ;R208 ;R208 ;R95 push cs ;R208 ;R95 pop ds ;R208 ;R95 shr ebx,16 ;R208 push es ;R95 ;R208 pop ds ;R95 ;R208 ;R208 ;R95 mov si,offset Ct_ROM_Write_Enable ;R208 ;R95 sub si,offset FLASH_ROUTINE_START ;R208 ;R95 add si,bx ;R208 ;R95 push cs ;R208 ;R95 call si ;R208 push cs ;R95 ;R208 push offset @f - offset EEPROM_Decode_Start ;R95 ;R208 ;R95A FAR_JMP ,8000h ;R95 ;R208 ;R123 FAR_JMP ,5000h ;R95A ;R208 FAR_JMP ,PnP_DMI_CPU_Backup_Seg ;R123 ;R208 ;R208 @@: ;R95 ;R208 ;R208 ;R95 mov si,offset CT_Disable_ROM_Shadow ;R208 ;R95 sub si,offset FLASH_ROUTINE_START ;R208 ;R95 add si,bx ;R208 ;R95 push cs ;R208 ;R95 call si ;R208 push cs ;R95 ;R208 push offset @f - offset EEPROM_Decode_Start ;R95 ;R208 ;R95A FAR_JMP ,8000h ;R95 ;R208 ;R123 FAR_JMP ,5000h ;R95A ;R208 FAR_JMP ,PnP_DMI_CPU_Backup_Seg ;R123 ;R208 @@: ;R95 ;R208 ;R208 assume es:DGROUP ;R208 mov ax,0f000h ;R208 mov es,ax ;R208 ;R208 ;R95 ifdef Flash_16K_8K_8K_Unit ;R77 ;R208 ;R95 call Check_ATMEL_29C020 ;R208 ;R95 jnc short EEPROM_Decode_Final ;R208 ;R95 ;R208 ;R95 call Check_SST29EE020 ;R208 ;R95 jnc short EEPROM_Decode_Final ;R208 ;R95 ;R208 ;R95 call Check_AM29F002T ;R208 ;R95 jnc short EEPROM_Decode_Final ;R208 ;R95 ;R208 ;R95 call Check_INTEL_28F002T ;R68 ;R208 ;R95 jnc short EEPROM_Decode_Final ;R68 ;R208 ;R95 ;R208 ;R95 ;R77 - start ;R208 ;R95 elseifdef Flash_4K_Unit ;R208 ;R95 call Check_MXIC_28F2000PPC ;R208 ;R95 jnc short EEPROM_Decode_Final ;R208 ;R95 endif; Flash_16K_8K_8K_Unit ;R208 ;R95 ;R77 - end ;R208 ;R208 ;R95 - start ;R208 ifdef ATMEL_ID_Check_Routine ;R208 call Check_ATMEL_EEPROM ;R208 jnc short EEPROM_Decode_Final ;R208 endif; ATMEL_ID_Check_Routine ;R208 ;R208 ifdef SST_ID_Check_Routine ;R208 call Check_SST_EEPROM ;R208 jnc short EEPROM_Decode_Final ;R208 ;R110B - start ;R208 ifdef WINBOND_ID_Check_Routine ;R208 cmp al,WINBOND_ID ;WINBOND Manufacturer Code ;R208 je short @F ;R208 endif; WINBOND_ID_Check_Routine ;R208 ;R110B - end ;R208 endif; SST_ID_Check_Routine ;R208 ;R208 ;R110 ifdef WINBOND_ID_Check_Routine ;R208 ;R110 call Check_WINBOND_EEPROM ;R208 ;R110 jnc short EEPROM_Decode_Final ;R208 ;R110 endif; WINBOND_ID_Check_Routine ;R208 ;R208 ;R110B ifdef EARLY_WINBOND_DECODE ;R110A ;R208 ;R110B ifdef WINBOND_ID_Check_Routine ;R110 ;R208 ;R110B call Check_WINBOND_EEPROM ;R110 ;R208 ;R110B jnc short EEPROM_Decode_Final ;R110 ;R208 ;R110B endif; WINBOND_ID_Check_Routine ;R110 ;R208 ;R110B endif; EARLY_WINBOND_DECODE ;R110A ;R208 ;R190 - start ;R208 ifdef BM_ID_Check_Routine ;R208 call Check_BM_EEPROM ;R208 jnc short EEPROM_Decode_Final ;R208 endif; BM_ID_Check_Routine ;R208 ;R190 - end ;R208 ;R208 ifdef AMD_ID_Check_Routine ;R208 call Check_AMD_EEPROM ;R208 jnc short EEPROM_Decode_Final ;R208 endif; AMD_ID_Check_Routine ;R208 ;R208 ;R110B ifndef EARLY_WINBOND_DECODE ;R110A ;R208 ifdef WINBOND_ID_Check_Routine ;R110 ;R208 @@: ;R110B ;R208 call Check_WINBOND_EEPROM ;R110 ;R208 jnc short EEPROM_Decode_Final ;R110 ;R208 endif; WINBOND_ID_Check_Routine ;R110 ;R208 ;R110B endif; EARLY_WINBOND_DECODE ;R110A ;R208 ;R208 ;R178- start ;R208 ifdef IMT_ID_Check_Routine ;R208 call Check_IMT_EEPROM ;R208 jnc short EEPROM_Decode_Final ;R208 endif; IMT_ID_Check_Routine ;R208 ;R178- end ;R208 ;R208 ifdef INTEL_ID_Check_Routine ;R208 ;R184A push es ;R184 ;R208 ;R184A push 0e000h ;R184 ;R208 ;R184A pop es ;R184 ;R208 call Check_INTEL_EEPROM ;R208 ;R184A pop es ;R184 ;R208 jnc short EEPROM_Decode_Final ;R208 endif; INTEL_ID_Check_Routine ;R208 ;R208 ifdef MXIC_ID_Check_Routine ;R208 call Check_MXIC_EEPROM ;R208 jnc short EEPROM_Decode_Final ;R208 endif; MXIC_ID_Check_Routine ;R208 ;R95 - end ;R208 ;R184A - start ;R208 ;check INTEL 28F020 ;R208 ifdef INTEL_ID_Check_Routine ;R208 push es ;R208 push 0e000h ;R208 pop es ;R208 call Check_INTEL_EEPROM ;R208 pop es ;R208 jnc short EEPROM_Decode_Final ;R208 endif; INTEL_ID_Check_Routine ;R208 ;R184A - end ;R208 ;R208 mov byte ptr es:[0],RESET_CMD ;R68 ;R208 mov di,-1 ;Set EEPROM Detect Fail ;R208 ;R208 EEPROM_Decode_Final: ;R208 ;R208 push di ;Save EEPROM Type ;R208 ;R208 ;R95 mov si,offset Ct_ROM_Write_Disable ;R208 ;R95 sub si,offset FLASH_ROUTINE_START ;R208 ;R95 add si,bx ;R208 ;R95 push cs ;R208 ;R95 call si ;R208 push cs ;R95 ;R208 push offset @f - offset EEPROM_Decode_Start ;R95 ;R208 ;R95A FAR_JMP ,8000h ;R95 ;R208 ;R123 FAR_JMP ,5000h ;R95A ;R208 FAR_JMP ,PnP_DMI_CPU_Backup_Seg ;R123 ;R208 @@: ;R95 ;R208 ;R208 ;R95 mov si,offset CT_Enable_ROM_Shadow ;R208 ;R95 sub si,offset FLASH_ROUTINE_START ;R208 ;R95 add si,bx ;R208 ;R95 push cs ;R208 ;R95 call si ;R208 push cs ;R95 ;R208 push offset @f - offset EEPROM_Decode_Start ;R95 ;R208 ;R95A FAR_JMP ,8000h ;R95 ;R208 ;R123 FAR_JMP ,5000h ;R95A ;R208 FAR_JMP ,PnP_DMI_CPU_Backup_Seg ;R123 ;R208 @@: ;R95 ;R208 ;R208 FAR_JMP ,0e000h ;R208 @@: ;R208 ;R208 call E_F000_Shadow_W ;R150 ;R208 ;R150 F000_call F000_Shadow_W ;R208 pop ax ;Load EEPROM Type ;R208 mov es:[0E05AH],al ;R208 ;R208 push cs ;R208 pop ds ;R208 ;R208 ifdef Flash_2M_support ;R95 ;R208 ifdef Flash_16K_8K_8K_Unit ;R77 ;R208 cmp ax,SST_2M_TYPE_EEPROM ;R208 je short Copy_SST_WINBOND_2M_Routine ;R101 ;R208 cmp ax,WINBOND_2M_TYPE_EEPROM ;R101 ;R208 ;R101 jne @f ;R208 jne short @f ;R101 ;R208 ;R208 Copy_SST_WINBOND_2M_Routine: ;R101 ;R208 ;; Copy Flash Routine To F000 Segment For Use By Update ESCD. ;R208 mov cx,SST_29EE020_LEN ;R208 mov si,offset SST020_Flash_Erase ;R208 ;R95 mov di,offset _2M_FLASH_ENTRY_POINT ;R208 mov di,offset FLASH_ENTRY_POINT ;R95 ;R208 rep movsb ;R208 ;R208 ;R95 mov si,offset _2M_FLASH_ENTRY_POINT ;R208 mov si,offset FLASH_ENTRY_POINT ;R95 ;R208 add si,SST_29EE020_WRITE_OFFSET ;R208 ;R95 mov word ptr es:[_2M_FLASH_WRITE_ENTRY_POINT],si ;R208 mov word ptr es:[FLASH_WRITE_ENTRY_POINT],si;R95 ;R208 ;R113 jmp short Flash_ROM_Check_End ;R95 ;R208 jmp Flash_ROM_Check_End ;R113 ;R208 ;R208 @@: ;R208 cmp ax,ATMEL_2M_TYPE_EEPROM ;R208 ;R101 jne @f ;R208 jne short @f ;R101 ;R208 ;R208 ;; Copy Flash Routine To F000 Segment For Use By Update ESCD. ;R208 mov cx,ATMEL_29C020_LEN ;R208 mov si,offset ATMEL29C020_Flash_Erase ;R208 ;R95 mov di,offset _2M_FLASH_ENTRY_POINT ;R208 mov di,offset FLASH_ENTRY_POINT ;R95 ;R208 rep movsb ;R208 ;R208 ;R95 mov si,offset _2M_FLASH_ENTRY_POINT ;R208 mov si,offset FLASH_ENTRY_POINT ;R95 ;R208 add si,ATMEL_29C020_WRITE_OFFSET ;R208 ;R95 mov word ptr es:[_2M_FLASH_WRITE_ENTRY_POINT],si ;R208 mov word ptr es:[FLASH_WRITE_ENTRY_POINT],si;R95 ;R208 ;R123 jmp short Flash_ROM_Check_End ;R95 ;R208 jmp Flash_ROM_Check_End ;R123 ;R208 ;R208 @@: ;R208 cmp ax,AMD_2M_TYPE_EEPROM ;R208 ;R101 jne @f ;R208 jne short @f ;R101 ;R208 ;R208 ;; Copy Flash Routine To F000 Segment For Use By Update ESCD. ;R208 mov cx,AMD_29F002T_LEN ;R208 mov si,offset AM29F002T_Flash_Erase ;R208 ;R95 mov di,offset _2M_FLASH_ENTRY_POINT ;R208 mov di,offset FLASH_ENTRY_POINT ;R95 ;R208 rep movsb ;R208 ;R208 ;R95 mov si,offset _2M_FLASH_ENTRY_POINT ;R208 mov si,offset FLASH_ENTRY_POINT ;R95 ;R208 add si,AMD_29F002T_WRITE_OFFSET ;R208 ;R95 mov word ptr es:[_2M_FLASH_WRITE_ENTRY_POINT],si ;R208 mov word ptr es:[FLASH_WRITE_ENTRY_POINT],si;R95 ;R208 ;R190 jmp short Flash_ROM_Check_End ;R95 ;R208 jmp Flash_ROM_Check_End ;R190 ;R208 ;R208 @@: ;R208 ;R68 - start ;R208 cmp ax,INTEL_2M_TYPE_EEPROM ;R208 je short Copy_INTEL_CSI_2M_Routine ;R107 ;R208 cmp ax,CSI_2M_TYPE_EEPROM ;R107 ;R208 ;R101 jne @f ;R208 jne short @f ;R101 ;R208 ;R208 Copy_INTEL_CSI_2M_Routine: ;R107 ;R208 ;; Copy Flash Routine To F000 Segment For Use By Update ESCD. ;R208 mov cx,INTEL_28F002BXT_LEN ;R208 mov si,offset F002BXT_Flash_Erase ;R208 ;R95 mov di,offset _2M_FLASH_ENTRY_POINT ;R208 mov di,offset FLASH_ENTRY_POINT ;R95 ;R208 rep movsb ;R208 ;R208 ;R95 mov si,offset _2M_FLASH_ENTRY_POINT ;R208 mov si,offset FLASH_ENTRY_POINT ;R95 ;R208 add si,INTEL_28F002BXT_WRITE_OFFSET ;R208 ;R95 mov word ptr es:[_2M_FLASH_WRITE_ENTRY_POINT],si ;R208 mov word ptr es:[FLASH_WRITE_ENTRY_POINT],si;R95 ;R208 ;R207 jmp short Flash_ROM_Check_End ;R95 ;R208 jmp Flash_ROM_Check_End ;R207 ;R208 ;R208 @@: ;R208 ;R68 - end ;R208 ;R113 - start ;R208 cmp ax,MXIC_2M_TYPE_EEPROM ;R208 jne short @f ;R208 ;R208 ;; Copy Flash Routine To F000 Segment For Use By Update ESCD. ;R208 mov cx,MXIC_28F2000PPC_LEN ;R208 mov si,offset MX_28f2000PPC_Flash_Erase ;R208 mov di,offset FLASH_ENTRY_POINT ;R208 rep movsb ;R208 ;R208 mov si,offset FLASH_ENTRY_POINT ;R208 add si,MXIC_28F2000PPC_WRITE_OFFSET ;R208 mov word ptr es:[FLASH_WRITE_ENTRY_POINT],si ;R208 jmp short Flash_ROM_Check_End ;R208 ;R208 @@: ;R208 ;R113 - end ;R208 ;R118 - start ;R208 cmp ax,MXIC_2M_TYPE_1_EEPROM ;R208 jne short @f ;R208 ;R208 ;; Copy Flash Routine To F000 Segment For Use By Update ESCD. ;R208 mov cx,MXIC_28F002TTC_LEN ;R208 mov si,offset MX_28f002TTC_Flash_Erase ;R208 mov di,offset FLASH_ENTRY_POINT ;R208 rep movsb ;R208 ;R208 mov si,offset FLASH_ENTRY_POINT ;R208 add si,MXIC_28F002TTC_WRITE_OFFSET ;R208 mov word ptr es:[FLASH_WRITE_ENTRY_POINT],si ;R208 jmp short Flash_ROM_Check_End ;R208 ;R208 @@: ;R208 ;R118 - end ;R208 ;R178- start ;R208 cmp ax,IMT_2M_TYPE_EEPROM ;R208 jne short @f ;R208 ;; Copy Flash Routine To F000 Segment For Use By Update ESCD. ;R208 mov cx,IMT_29F002T_LEN ;R208 mov si,offset IMT_29F002T_Flash_Erase ;R208 mov di,offset FLASH_ENTRY_POINT ;R208 rep movsb ;R208 ;R208 mov si,offset FLASH_ENTRY_POINT ;R208 add si,IMT_29F002T_WRITE_OFFSET ;R208 mov word ptr es:[FLASH_WRITE_ENTRY_POINT],si ;R208 jmp short Flash_ROM_Check_End ;R208 ;R208 @@: ;R208 ;R178- end ;R208 ;R207 - start ;R208 cmp ax,PMC_2M_TYPE_EEPROM ;R208 jne short @f ;R208 ;; Copy Flash Routine To F000 Segment For Use By Update ESCD. ;R208 mov cx,PMC_29F002C_LEN ;R208 mov si,offset PMC_29F002C_Flash_Erase ;R208 mov di,offset FLASH_ENTRY_POINT ;R208 rep movsb ;R208 ;R208 mov si,offset FLASH_ENTRY_POINT ;R208 add si,PMC_29F002C_WRITE_OFFSET ;R208 mov word ptr es:[FLASH_WRITE_ENTRY_POINT],si ;R208 jmp short Flash_ROM_Check_End ;R208 @@: ;R208 ;R207 - end ;R208 ;R190 - start ;R208 cmp ax,BM_2M_TYPE_EEPROM ;R208 jne short @f ;R208 ;; Copy Flash Routine To F000 Segment For Use By Update ESCD. ;R208 mov cx,BM_29FS020_LEN ;R208 mov si,offset BM_29FS020_Flash_Erase ;R208 mov di,offset FLASH_ENTRY_POINT ;R208 rep movsb ;R208 ;R208 mov si,offset FLASH_ENTRY_POINT ;R208 add si,BM_29FS020_WRITE_OFFSET ;R208 mov word ptr es:[FLASH_WRITE_ENTRY_POINT],si ;R208 jmp short Flash_ROM_Check_End ;R208 @@: ;R208 ;R190 - end ;R208 ;R208 ;R208 ;R123 ;R77 - start ;R208 ;R123 elseifdef Flash_4K_Unit ;R208 ;R123 cmp ax,MXIC_2M_TYPE_EEPROM ;R208 ;R123 ;R101 jne @f ;R208 ;R123 jne short @f ;R101 ;R208 ;R123 ;R208 ;R123 ;; Copy Flash Routine To F000 Segment For Use By Update ESCD. ;R208 ;R123 mov cx,MXIC_28F2000PPC_LEN ;R208 ;R123 mov si,offset MX_28f2000PPC_Flash_Erase ;R208 ;R123 ;R95 mov di,offset _2M_FLASH_ENTRY_POINT ;R208 ;R123 mov di,offset FLASH_ENTRY_POINT ;R95 ;R208 ;R123 rep movsb ;R208 ;R123 ;R208 ;R123 ;R95 mov si,offset _2M_FLASH_ENTRY_POINT ;R208 ;R123 mov si,offset FLASH_ENTRY_POINT ;R95 ;R208 ;R123 add si,MXIC_28F2000PPC_WRITE_OFFSET ;R208 ;R123 ;R95 mov word ptr es:[_2M_FLASH_WRITE_ENTRY_POINT],si ;R208 ;R123 mov word ptr es:[FLASH_WRITE_ENTRY_POINT],si;R95 ;R208 ;R123 jmp short Flash_ROM_Check_End ;R95 ;R208 ;R123 ;R208 ;R123 @@: ;R208 ;R123A - start ;R208 elseifdef Flash_4K_Unit ;R208 cmp ax,MXIC_2M_TYPE_EEPROM ;R208 jne short @f ;R208 ;R208 ;; Copy Flash Routine To F000 Segment For Use By Update ESCD. ;R208 mov cx,MXIC_28F2000PPC_LEN ;R208 mov si,offset MX_28f2000PPC_Flash_Erase ;R208 mov di,offset FLASH_ENTRY_POINT ;R208 rep movsb ;R208 ;R208 mov si,offset FLASH_ENTRY_POINT ;R208 add si,MXIC_28F2000PPC_WRITE_OFFSET ;R208 mov word ptr es:[FLASH_WRITE_ENTRY_POINT],si ;R208 jmp short Flash_ROM_Check_End ;R208 ;R208 @@: ;R208 ;R123A - end ;R208 endif; Flash_16K_8K_8K_Unit ;R208 ;R95 - start ;R208 else; Flash_2M_support ;R208 ifdef Flash_4K_Unit ;R208 cmp ax,SST_1M_TYPE_EEPROM ;R208 je short Copy_SST_Routine ;R208 cmp ax,ATMEL_1M_TYPE_EEPROM ;R208 je short Copy_SST_Routine ;R208 cmp ax,WINBOND_1M_TYPE_EEPROM ;R208 jne short @f ;R208 ;R208 Copy_SST_Routine: ;R208 ;; Copy Flash Routine To F000 Segment For Use By Update ESCD. ;R208 mov cx,SST_29EE010_LEN ;R208 mov si,offset SST010_Flash_Erase ;R208 mov di,offset FLASH_ENTRY_POINT ;R208 rep movsb ;R208 ;R208 mov si,offset FLASH_ENTRY_POINT ;R208 add si,SST_29EE010_WRITE_OFFSET ;R208 mov word ptr es:[FLASH_WRITE_ENTRY_POINT],si ;R208 jmp short Flash_ROM_Check_End ;R208 ;R208 @@: ;R208 cmp di,CSI_1M_TYPE_EEPROM ;R113 ;R208 je short Copy_INTEL_Routine ;R113 ;R208 cmp ax,INTEL_1M_TYPE_EEPROM ;R208 jne short @f ;R208 ;R208 Copy_INTEL_Routine: ;R113 ;R208 ;; Copy Flash Routine To F000 Segment For Use By Update ESCD. ;R208 mov cx,INTEL_28F001BXT_LEN ;R208 mov si,offset F001BXT_Flash_Erase ;R208 mov di,offset FLASH_ENTRY_POINT ;R208 rep movsb ;R208 ;R208 mov si,offset FLASH_ENTRY_POINT ;R208 add si,INTEL_28F001BXT_WRITE_OFFSET ;R208 mov word ptr es:[FLASH_WRITE_ENTRY_POINT],si ;R208 jmp short Flash_ROM_Check_End ;R208 ;R208 @@: ;R208 cmp ax,MXIC_1M_PPC_TYPE_EEPROM ;R208 jne short @f ;R208 ;R208 ;; Copy Flash Routine To F000 Segment For Use By Update ESCD. ;R208 mov cx,MXIC_28F1000_LEN ;R208 mov si,offset MXIC_Flash_Erase ;R208 mov di,offset FLASH_ENTRY_POINT ;R208 rep movsb ;R208 ;R208 mov si,offset FLASH_ENTRY_POINT ;R208 add si,MXIC_28F1000_WRITE_OFFSET ;R208 mov word ptr es:[FLASH_WRITE_ENTRY_POINT],si ;R208 jmp short Flash_ROM_Check_End ;R208 ;R208 @@: ;R208 elseifdef Flash_16K_Unit ;R208 cmp ax,MXIC_1M_PL_TYPE_EEPROM ;R208 jne short @f ;R208 ;R208 ;; Copy Flash Routine To F000 Segment For Use By Update ESCD. ;R208 mov cx,MXIC_28F1000_LEN ;R208 mov si,offset MXIC_Flash_Erase ;R208 mov di,offset FLASH_ENTRY_POINT ;R208 rep movsb ;R208 ;R208 mov si,offset FLASH_ENTRY_POINT ;R208 add si,MXIC_28F1000_WRITE_OFFSET ;R208 mov word ptr es:[FLASH_WRITE_ENTRY_POINT],si ;R208 jmp short Flash_ROM_Check_End ;R208 ;R208 @@: ;R208 cmp ax,AMD_1M_TYPE_EEPROM ;R208 ;R101 jne @f ;R208 jne short @f ;R101 ;R208 ;R208 ;; Copy Flash Routine To F000 Segment For Use By Update ESCD. ;R208 mov cx,AMD_29F010_LEN ;R208 mov si,offset AMD29F_Flash_Erase ;R208 mov di,offset FLASH_ENTRY_POINT ;R208 rep movsb ;R208 ;R208 mov si,offset FLASH_ENTRY_POINT ;R208 add si,AMD_29F010_WRITE_OFFSET ;R208 mov word ptr es:[FLASH_WRITE_ENTRY_POINT],si ;R208 jmp short Flash_ROM_Check_End ;R208 ;R208 @@: ;R208 endif; Flash_4K_Unit ;R208 endif; Flash_2M_support ;R208 ;R95 - end ;R208 ;R208 Flash_ROM_Check_End: ;R95 ;R208 ;R77 - end ;R208 ;R208 call E_F000_Shadow_R ;R150 ;R208 ;R150 F000_call F000_Shadow_R ;R208 ;R208 pop es ;R208 pop ds ;R208 sti ;R208 ;R95 endif; Flash_2M_support ;R208 endif; AUTO_DETECT_EEPROM_ID ;R95 ;R208 endif; FLASH_SUPPORT ;R59B ;R208 endif ;Temp_No_Flash_Support ;R124 ;R208 ;R59 - END ;R208 ;R208 clc ;R208 ret ;R208 POST_6S ENDP ;R208 ;R208 ;R59 - START ;R208 ifdef FLASH_SUPPORT ;R59B ;R208 ifdef AUTO_DETECT_EEPROM_ID ;R95 ;R208 ;R95 ifdef Flash_2M_support ;R208 ;R95 ifdef Flash_16K_8K_8K_Unit ;R77 ;R208 ifdef SST_ID_Check_Routine ;R95 ;R208 Check_SST_EEPROM proc near ;R95 ;R208 ;R95 Check_SST29EE020 proc near ;R208 ;R208 ;; Set SST Read ID Command ;R208 mov byte ptr es:[5555h],0aah ;R208 mov byte ptr es:[2AAAh],055h ;R208 mov byte ptr es:[5555h],080h ;R208 mov byte ptr es:[5555h],0aah ;R208 mov byte ptr es:[2AAAh],055h ;R208 mov byte ptr es:[5555h],060h ;R208 xor cx,cx ;R208 loop $ ;R208 ;R208 mov al,byte ptr es:[0] ;R208 cmp al,SST_ID ;SST Manufacturer Code ;R208 ;R95 jne short Not_SST29EE020_EEPROM ;R208 jne short Not_SST_EEPROM ;R95 ;R208 ;R208 mov al,byte ptr es:[1] ;R208 ifdef Flash_2M_support ;R95 ;R208 mov di,SST_2M_TYPE_EEPROM ;R95 Set SST29EE020 EEPROM Type ;R208 cmp al,SST_29EE020_DEVICE ;SST 29EE020 Device ID ;R208 ;R95 jne short Not_SST29EE020_EEPROM ;R208 jne short Not_SST_EEPROM ;R95 ;R208 ;R208 ;R95 - start ;R208 else; Flash_2M_support ;R208 mov di,SST_1M_TYPE_EEPROM ;Set SST29EE010 EEPROM Type ;R208 cmp al,SST_28EE010_DEVICE ;SST 28EE010 Device ID ;R208 je short IS_SST_EEPROM ;R208 cmp al,SST_29EE010_DEVICE ;SST 29EE010 Device ID ;R208 jne short Not_SST_EEPROM ;R208 endif; Flash_2M_support ;R208 ;R95 - end ;R208 ;R208 IS_SST_EEPROM: ;R95 ;R208 mov byte ptr es:[5555h],0aah ;SST Reset Command ;R208 mov byte ptr es:[2AAAh],055h ;SST Reset Command ;R208 mov byte ptr es:[5555h],0f0h ;SST Reset Command ;R208 ;R208 ;R95 mov di,SST_2M_TYPE_EEPROM ;Set SST29EE020 EEPROM Type ;R208 clc ;R208 ret ;R208 ;R208 ;R95 Not_SST29EE020_EEPROM: ;R208 Not_SST_EEPROM: ;R95 ;R208 stc ;R208 ret ;R208 ;R95 Check_SST29EE020 endp ;R208 Check_SST_EEPROM endp ;R95 ;R208 endif; SST_ID_Check_Routine ;R95 ;R208 ;R208 ifdef AMD_ID_Check_Routine ;R95 ;R208 Check_AMD_EEPROM proc near ;R95 ;R208 ;R95 Check_AM29F002T proc near ;R208 ;R208 ifdef Flash_2M_support ;R95 ;R208 mov byte ptr es:[0555h],0aah ;AMD Reset Command ;R208 mov byte ptr es:[0AAAh],055h ;AMD Reset Command ;R208 mov byte ptr es:[0555h],0f0h ;AMD Reset Command ;R208 ;R208 ;; Set AMD Read ID Command ;R208 mov byte ptr es:[0555h],0aah ;R208 mov byte ptr es:[0AAAh],055h ;R208 mov byte ptr es:[0555h],090h ;R208 ;R95 - start ;R208 else; Flash_2M_support ;R208 mov byte ptr es:[5555h],0aah ;AMD Reset Command ;R208 mov byte ptr es:[2AAAh],055h ;AMD Reset Command ;R208 mov byte ptr es:[5555h],0f0h ;AMD Reset Command ;R208 ;R208 ;; Set AMD Read ID Command ;R208 mov byte ptr es:[5555h],0aah ;R208 mov byte ptr es:[2AAAh],055h ;R208 mov byte ptr es:[5555h],090h ;R208 endif; Flash_2M_support ;R208 ;R95 - end ;R208 xor cx,cx ;R208 loop $ ;R208 ;R208 mov al,byte ptr es:[0] ;R208 cmp al,AMD_ID ;AMD Manufacturer Code ;R208 ;R95 jne short Not_AMD_29F002T_EEPROM ;R208 ;R196 jne short Not_AMD_EEPROM ;R95 ;R208 jne short Check_SGS_TOMSON_EEPROM ;R196 ;R208 ;R208 mov al,byte ptr es:[1] ;R208 ifdef Flash_2M_support ;R95 ;R208 mov di,AMD_2M_TYPE_EEPROM ;R95 Set AMD 29F002T EEPROM Type ;R208 cmp al,AMD_29F002T_DEVICE ;AMD 29F002T Device ID ;R208 ;R95 jne short Not_AMD_29F002T_EEPROM ;R208 jne short Not_AMD_EEPROM ;R95 ;R208 ;R208 ;R95 - start ;R208 else; Flash_2M_support ;R208 mov di,AMD_1M_TYPE_EEPROM ;Set AMD 29F010 EEPROM Type ;R208 cmp al,AMD_29F010_DEVICE ;AMD 29F010 Device ID ;R208 jne short Not_AMD_EEPROM ;R208 endif; Flash_2M_support ;R208 ;R95 - end ;R208 ;R208 Is_AMD_EEPROM: ;R95 ;R208 Is_SGS_THOMSON_EEPROM: ;R196 ;R208 mov byte ptr es:[0555h],0aah ;AMD Reset Command ;R208 mov byte ptr es:[0AAAh],055h ;AMD Reset Command ;R208 mov byte ptr es:[0555h],0f0h ;AMD Reset Command ;R208 ;R208 ;R95 mov di,AMD_2M_TYPE_EEPROM ;Set SST29EE020 EEPROM Type ;R208 clc ;R208 ret ;R208 ;R208 ;R95 Not_AMD_29F002T_EEPROM: ;R208 Not_AMD_EEPROM: ;R95 ;R208 Not_SGS_TOMSON_EEPROM: ;R196 ;R208 stc ;R208 ret ;R208 ;R196 - start ;R208 Check_SGS_TOMSON_EEPROM: ;R208 cmp al,SGS_THOMSON_MANU ;SGS_THOMSON Manufacturer Code ;R208 jne short Not_SGS_TOMSON_EEPROM ;R208 mov al,byte ptr es:[1] ;R208 cmp al,ST_M29F002T ;R208 jne short Not_SGS_TOMSON_EEPROM ;R208 jmp short IS_SGS_THOMSON_EEPROM ;R196 ;R208 ;R196 - end ;R208 ;R208 ;R95 Check_AM29F002T endp ;R208 Check_AMD_EEPROM endp ;R95 ;R208 endif; AMD_ID_Check_Routine ;R95 ;R208 ;R208 ifdef ATMEL_ID_Check_Routine ;R95 ;R208 Check_ATMEL_EEPROM proc near ;R95 ;R208 ;R95 Check_ATMEL_29C020 proc near ;R208 ;R208 ; ;; Enable Software Data Protection ;R208 ; mov byte ptr es:[5555h],0aah ;R208 ; mov byte ptr es:[2AAAh],055h ;R208 ; mov byte ptr es:[5555h],0a0h ;R208 ;R208 ;; Set ATMEL Read ID Command ;R208 mov byte ptr es:[5555h],0aah ;R208 mov byte ptr es:[2AAAh],055h ;R208 mov byte ptr es:[5555h],090h ;R208 xor cx,cx ;R208 loop $ ;R208 ;R208 mov al,byte ptr es:[0] ;R208 cmp al,ATMEL_ID ;R208 ;R95 jne short Not_ATMEL_29C020_EEPROM ;ATMEL Manufacturer Code ;R208 jne short Not_ATMEL_EEPROM ;R95 ;R208 ;R208 mov al,byte ptr es:[1] ;R208 ifdef Flash_2M_support ;R95 ;R208 mov di,ATMEL_2M_TYPE_EEPROM ;R95 Set ATMEL 29C020 EEPROM Type ;R208 cmp al,ATMEL_29C020_DEVICE ;R208 ;R95 jne short Not_ATMEL_29C020_EEPROM ;ATMEL 29C020 Device ID ;R208 jne short Not_ATMEL_EEPROM ;R95 ;R208 ;R208 ;R95 - start ;R208 else; Flash_2M_support ;R208 mov di,ATMEL_1M_TYPE_EEPROM ;Set ATMEL 29C010 EEPROM Type ;R208 cmp al,ATMEL_29C010_DEVICE ;ATMEL 29C010 Device ID ;R208 jne short Not_ATMEL_EEPROM ;R208 endif; Flash_2M_support ;R208 ;R95 - end ;R208 ;R208 Is_ATMEL_EEPROM: ;R95 ;R208 mov byte ptr es:[5555h],0aah ;ATMEL Reset Command ;R208 mov byte ptr es:[2AAAh],055h ;ATMEL Reset Command ;R208 mov byte ptr es:[5555h],0f0h ;ATMEL Reset Command ;R208 ;R208 ;R95 mov di,ATMEL_2M_TYPE_EEPROM ;Set ATMEL 29C020 EEPROM Type ;R208 clc ;R208 ret ;R208 ;R208 ;R95 Not_ATMEL_29C020_EEPROM: ;R208 Not_ATMEL_EEPROM: ;R95 ;R208 stc ;R208 ret ;R208 ;R95 Check_ATMEL_29C020 endp ;R208 Check_ATMEL_EEPROM endp ;R95 ;R208 endif; ATMEL_ID_Check_Routine ;R95 ;R208 ;R208 ;R178- start ;R208 ifdef IMT_ID_Check_Routine ; ;R208 Check_IMT_EEPROM proc near ; ;R208 mov byte ptr es:[5555h],0AAh ;R208 mov byte ptr es:[2AAAh],055h ;R208 mov byte ptr es:[5555h],0f0h ;R208 xor cx,cx ;R208 loop $ ;R208 ;R208 mov byte ptr es:[5555h],0AAh ;R208 mov byte ptr es:[2AAAh],055h ;R208 mov byte ptr es:[5555h],090h ;R208 mov eax,dword ptr es:[0h] ;R208 ;R205 - start ;R208 mov di,IMT_2M_TYPE_EEPROM ;Set IMT 29F002T EEPROM Type ;R208 cmp al,MOSEL_MANU ;R208 jne short Not_MOSEL ;R208 cmp ah,MOSEL_V29C51002T_DEVICE ;R208 je short IS_IMT_Series ;R208 Not_MOSEL: ;R208 ;R205 - end ;R208 ;R207 - start ;R208 ifdef PMC_ID_Check_Routine ;R208 mov di,PMC_2M_TYPE_EEPROM ;R208 cmp al,PMC_MANU ;PMC Manufacturer Code ;R208 jne short Not_PMC_EEPROM ;R208 cmp ah,PMC_PM29F002C ;R208 je short IS_IMT_Series ;R208 Not_PMC_EEPROM: ;R208 endif; PMC_ID_Check_Routine ;R208 ;R207 - end ;R208 ;R208 rol eax,8 ;R208 cmp ax,(IMT_MANU_ID_1 shl 8) + IMT_MANU_ID_2 ;R208 jne short Not_IM29F002 ;R208 shr eax,16 ;R208 mov di,IMT_2M_TYPE_EEPROM ;Set IMT 29F002T EEPROM Type ;R208 cmp al,IMT_IM29F002T_DEVICE ;IMT 29F002T device code ;R208 jne short Not_IM29F002 ;R208 IS_IMT_Series: ;R205 ;R208 mov byte ptr es:[5555h],0AAh ; ;R208 mov byte ptr es:[2AAAh],055h ;Reset command ;R208 mov byte ptr es:[5555h],0f0h ;R208 ;R208 clc ;R208 ret ;R208 Not_IM29F002: ;R208 stc ;R208 ret ;R208 ;R208 Check_IMT_EEPROM endp ; ;R208 endif; IMT_ID_Check_Routine ; ;R208 ;R178- end ;R208 ;R208 ;R68 - start ;R208 ifdef INTEL_ID_Check_Routine ;R95 ;R208 Check_INTEL_EEPROM proc near ;R95 ;R208 ;R95 Check_INTEL_28F002T proc near ;R208 ;R208 ;; Set INTEL Reset Command ;R208 mov byte ptr es:[0],RESET_CMD ;R208 xor cx,cx ;R208 loop $ ;R208 ;R208 ;; Set INTEL Read ID Command ;R208 mov byte ptr es:[0],90h ;R208 xor cx,cx ;R208 loop $ ;R208 ;R208 mov al,byte ptr es:[0] ;R208 cmp al,INTEL_28F002T_ID ;INTEL Manufacturer Code ;R208 ;R95 jne short Not_INTEL_28F002T_EEPROM ;R208 jne short Not_INTEL_EEPROM ;R95 ;R208 ;R208 mov al,byte ptr es:[1] ;R208 ifdef Flash_2M_support ;R95 ;R208 cmp al,INTEL_28F020_DEVICE ;R184 ;R208 jne short Not_bulk_type ;R184 ;R208 mov byte ptr Bulk_Flash_type[bp],-1 ;R184 ;R208 Not_bulk_type: ;R184 ;R208 mov di,INTEL_2M_TYPE_EEPROM ;R95 ;R208 cmp al,INTEL_28F002T_DEVICE ;INTEL 28F002T Device ID ;R208 ;R95 jne short Not_INTEL_28F002T_EEPROM ;R208 ;R95B je short Not_INTEL_EEPROM ;R95 ;R208 jne short Not_INTEL_EEPROM ;R95B ;R208 ;R208 ;R95 - start ;R208 else; Flash_2M_support ;R208 mov di,INTEL_1M_TYPE_EEPROM ;R208 cmp al,INTEL_28F001T_DEVICE ;INTEL 28F001T Device ID ;R208 jne short Not_INTEL_EEPROM ;R208 endif; Flash_2M_support ;R208 ;R95 - end ;R208 ;R208 Is_INTEL_EEPROM: ;R95 ;R208 ;; Set INTEL Reset Command ;R208 mov byte ptr es:[0],RESET_CMD ;R208 xor cx,cx ;R208 loop $ ;R208 ;R208 ;R95 mov di,INTEL_2M_TYPE_EEPROM ;R208 clc ;R208 ret ;R208 ;R208 ;R95 Not_INTEL_28F002T_EEPROM: ;R208 Not_INTEL_EEPROM: ;R95 ;R208 ;R107 - start ;R208 cmp al,CSI_ID ;CSI Manufacturer Code ;R208 jne short Not_CSI_EEPROM ;R208 mov al,byte ptr es:[1] ;R208 mov di,CSI_1M_TYPE_EEPROM ;R113 ;R208 cmp al,CSI_CAT28F001P_DEVICE ;R113 CSI CAT28F001P Device ID ;R208 je short Is_CSI_EEPROM ;R113 ;R208 mov di,CSI_2M_TYPE_EEPROM ;R208 cmp al,CSI_CAT28F002T_DEVICE ;CSI CAT28F002T Device ID ;R208 jne short Not_CSI_EEPROM ;R208 ;R208 Is_CSI_EEPROM: ;R113 ;R208 ;; Set CSI Reset Command ;R208 mov byte ptr es:[0],RESET_CMD ;R208 xor cx,cx ;R208 loop $ ;R208 ;R208 clc ;R208 ret ;R208 ;R208 Not_CSI_EEPROM: ;R208 ;R107 - end ;R208 stc ;R208 ret ;R208 ;R95 Check_INTEL_28F002T endp ;R208 Check_INTEL_EEPROM endp ;R95 ;R208 endif; INTEL_ID_Check_Routine ;R95 ;R208 ;R68 - end ;R208 ;R208 ;R77 - start ;R208 ;R95 elseifdef Flash_4K_Unit ;R208 ifdef MXIC_ID_Check_Routine ;R95 ;R208 Check_MXIC_EEPROM proc near ;R95 ;R208 ;R95 Check_MXIC_28F2000PPC proc near ;R208 ;R208 ;; Set Clear Status Command ;R118 ;R208 mov byte ptr es:[0],50h ;R118 ;R208 ;R208 ;; Set MXIC Reset Command ;R208 mov byte ptr es:[0],RESET_CMD ;R208 xor cx,cx ;R208 loop $ ;R208 ;R208 ;; Set MXIC Read ID Command ;R208 mov byte ptr es:[0],90h ;R208 xor cx,cx ;R208 loop $ ;R208 ;R208 mov al,byte ptr es:[0] ;R208 cmp al,MXIC_ID ;MXIC Manufacturer Code ;R208 ;R95 jne short Not_MXIC_28F2000PPC_EEPROM ;R208 jne short Not_MXIC_EEPROM ;R95 ;R208 ;R208 ;; Set MXIC Read ID Command ;R208 mov byte ptr es:[0],90h ;R208 xor cx,cx ;R208 loop $ ;R208 ;R208 mov al,byte ptr es:[1] ;R208 ifdef Flash_2M_support ;R95 ;R208 mov di,MXIC_2M_TYPE_1_EEPROM ;R118 ;R208 cmp al,MXIC_28F002TTC_DEVICE ;R118 ;R208 je short Is_MXIC_EEPROM ;R118 ;R208 ;R208 mov di,MXIC_2M_TYPE_EEPROM ;R113 ;R208 cmp al,MXIC_28F2000TPC_DEVICE ;R113 ;R208 je short Is_MXIC_EEPROM ;R113 ;R208 ;R208 mov di,MXIC_2M_TYPE_EEPROM ;R95 ;R208 cmp al,MXIC_28F2000PPC_DEVICE ;MXIC 28F002T Device ID ;R208 ;R95 jne short Not_MXIC_28F2000PPC_EEPROM ;R208 jne short Not_MXIC_EEPROM ;R95 ;R208 ;R208 ;R95 - start ;R208 else; Flash_2M_support ;R208 ifdef Flash_4K_Unit ;R208 mov di,MXIC_1M_PPC_TYPE_EEPROM ;R208 cmp al,MXIC_28F1000PPC_DEVICE ;MXIC 28F001PPC Device ID ;R208 jne short Not_MXIC_EEPROM ;R208 ;R208 elseifdef Flash_16K_Unit ;R208 mov di,MXIC_1M_PL_TYPE_EEPROM ;R208 cmp al,MXIC_28F1000PL_DEVICE ;MXIC 28F001PL Device ID ;R208 jne short Not_MXIC_EEPROM ;R208 endif; Flash_4K_Unit ;R208 endif; Flash_2M_support ;R208 ;R95 - end ;R208 ;R208 Is_MXIC_EEPROM: ;R95 ;R208 ;; Set INTEL Reset Command ;R208 mov byte ptr es:[0],RESET_CMD ;R208 xor cx,cx ;R208 loop $ ;R208 ;R208 ;R95 mov di,MXIC_2M_TYPE_EEPROM ;R208 clc ;R208 ret ;R208 ;R208 ;R95 Not_MXIC_28F2000PPC_EEPROM: ;R208 Not_MXIC_EEPROM: ;R95 ;R208 stc ;R208 ret ;R208 ;R95 Check_MXIC_28F2000PPC endp ;R208 ;R95 endif; Flash_16K_8K_8K_Unit ;R208 Check_MXIC_EEPROM endp ;R95 ;R208 endif; MXIC_ID_Check_Routine ;R95 ;R208 ;R77 - end ;R208 ;R208 ;R95 - start ;R208 ifdef WINBOND_ID_Check_Routine ;R208 Check_WINBOND_EEPROM proc near ;R208 ;R208 ;; Set WINBOND Read ID Command ;R208 mov byte ptr es:[5555h],0aah ;R208 mov byte ptr es:[2AAAh],055h ;R208 mov byte ptr es:[5555h],080h ;R208 mov byte ptr es:[5555h],0aah ;R208 mov byte ptr es:[2AAAh],055h ;R208 mov byte ptr es:[5555h],060h ;R208 xor cx,cx ;R208 loop $ ;R208 ;R208 mov al,byte ptr es:[0] ;R208 cmp al,WINBOND_ID ;WINBOND Manufacturer Code ;R208 jne short Not_WINBOND_EEPROM ;R208 ;R208 mov al,byte ptr es:[1] ;R208 ifdef Flash_2M_support ;R101 ;R208 mov di,WINBOND_2M_TYPE_EEPROM ;R101 Set WINBOND 29C020 EEPROM Type ;R208 cmp al,WINBOND_29C020_DEVICE ;R101 WINBOND 29C020 Device ID ;R208 jne short Not_WINBOND_EEPROM ;R101 ;R208 else; Flash_2M_support ;R101 ;R208 mov di,WINBOND_1M_TYPE_EEPROM ;Set WINBOND 29EE011 EEPROM Type ;R208 cmp al,WINBOND_29EE011_DEVICE ;WINBOND 29EE011 Device ID ;R208 jne short Not_WINBOND_EEPROM ;R208 endif; Flash_2M_support ;R101 ;R208 ;R208 mov byte ptr es:[5555h],0aah ;WINBOND Reset Command ;R208 mov byte ptr es:[2AAAh],055h ;WINBOND Reset Command ;R208 mov byte ptr es:[5555h],0f0h ;WINBOND Reset Command ;R208 ;R208 clc ;R208 ret ;R208 ;R208 Not_WINBOND_EEPROM: ;R208 stc ;R208 ret ;R208 Check_WINBOND_EEPROM endp ;R208 endif; WINBOND_ID_Check_Routine ;R208 ;R95 - end ;R208 ;R190 - start ;R208 ifdef BM_ID_Check_Routine ;R208 Check_BM_EEPROM proc near ;R208 mov byte ptr es:[05555h],0aah ;R208 mov byte ptr es:[02AAAh],055h ;R208 mov byte ptr es:[05555h],0f0h ;BM Reset Command ;R208 ;; Set BM Read ID Command ;R208 mov byte ptr es:[05555h],0aah ;R208 mov byte ptr es:[02AAAh],055h ;R208 mov byte ptr es:[05555h],090h ;R208 mov di,BM_2M_TYPE_EEPROM ;Set BR 29FS020T EEPROM Type ;R208 ;R208 mov al,byte ptr es:[0] ;R208 ;R208 cmp al,BRIGHT_MANU_ID ; ;R208 jne short Not_BR_EEPROM ;R208 ;R208 mov al,byte ptr es:[1] ;R208 mov byte ptr es:[0555h],0aah ;BM Reset Command;;; ;R208 mov byte ptr es:[0AAAh],055h ;BM Reset Command;;; ;R208 mov byte ptr es:[0555h],0f0h ;BM Reset Command ;; ;R208 ;R208 cmp al,BM_29FS020T_DEVICE ;BR 29F002T Device ID ;R208 jne short Not_BR_EEPROM ;R208 ;R208 Is_BR_EEPROM: ;R208 clc ;R208 ret ;R208 Not_BR_EEPROM: ;R208 stc ;R208 ret ;R208 Check_BM_EEPROM endp ;R208 endif; BM_ID_Check_Routine ;R208 ;R190 - end ;R208 ;R208 EEPROM_Decode_End: ;R208 ;R95 endif; Flash_2M_support ;R208 endif; AUTO_DETECT_EEPROM_ID ;R95 ;R208 endif; FLASH_SUPPORT ;R59B ;R208 ;R59 - END ;[]==============================================================[] ; ; POST_7S: ; ; Use walking 1's algorithm to check out interface to ; CMOS circuitry. Also set real-time clock power status. ; Then check for override. ; ;Saves: NONE + NO STACK ; ;Entry: NONE ;Exit: C Set if fatal error ; ;[]==============================================================[] PUBLIC POST_7S POST_7S PROC NEAR ;R39A ;R39 - start ;R39A ifdef PCI_RESET_SUPPORT ;R39A ;R39A ;Clear warm boot flag stored in CMOS for next warm reset ;R39A mov ax,G_RAM ;R39A mov ds,ax ;R39A assume ds:G_RAM ;R39A mov al,0FH NMI_OFF ;R39A call F000_Get_Cmos ;R39A cmp al,0AAH ;R39A jne short Not_WarmBoot ;R39A ;R39A mov word ptr ds:USER_REBOOT, CTRL_ALT_DEL ; warm boot ;R39A ;R39A ;clear warm boot flag ;R39A mov al,0FH NMI_OFF ;R39A xor ah,ah ;R39A call F000_Set_Cmos ;R39A Not_WarmBoot: ;R39A endif; PCI_RESET_SUPPORT ;R39A ;R39 - end ;R198 ifdef Notebook_Power_Management ;R36 if STD_Function EQ 1 ;R198 mov al,0fh NMI_OFF ;R36 call F000_Get_Cmos ;R36 mov bh,al ;R36 endif ;STD_Function EQ 1 ;R198 ;R198 endif ;Notebook_Power_Management ;R36 mov ah,1 ; initial value mov bl,ah ; save pattern p7_shut1: mov al,0fh NMI_OFF call F000_Set_Cmos ; set shutdown in al,80h ; change bus state mov al,0fh NMI_OFF call F000_Get_Cmos cmp al,bl ; same as before? jne short p7_fail ; no, test failed or bl,bl ; done with test? jz short p7_shut2 ; no, not finished yet shl bl,1 mov ah,bl jmp short p7_shut1 ; ; If CMOS circuitry OK, reset CMOS_STATUS ; p7_shut2: ;R198 ifdef Notebook_Power_Management ;R36 if STD_Function EQ 1 ;R198 mov ah,bh ;R36 mov al,0fh NMI_OFF ;R36 call F000_Set_Cmos ;R36 endif ;STD_Function EQ 1 ;R198 ;R198 endif ;Notebook_Power_Management ;R36 ; ; If someone pressed a key, go into override ; mov al, CMOS_OVERRIDE NMI_OFF ; override location mov ah, NOT OVERRIDE_ENABLE F000_call ROM_AND_CMOS p7_key: ifdef Override_Key_Support in al, STAT8042 test al, OBF_8042 ; anything waiting from keyboard jz short p7_pass ; no... in al,DATA8042 ; read key pressed cmp al,KEY_OVERRIDE ; is it override key? jne short p7_key ; no, look for another key mov al, CMOS_OVERRIDE NMI_OFF ; override location mov ah, OVERRIDE_ENABLE ; turn on override F000_call ROM_OR_CMOS mov al, CMOS_ERROR NMI_OFF ; show as an error mov ah, EQUIP_STATUS F000_call ROM_OR_CMOS mov bl,1 ; beep on override call E000_Snd_Spkr ;R72 ;R72 F000_call Snd_Spkr endif ;No_Override_Key p7_pass: clc ret p7_fail: stc ; set carry flag ret POST_7S ENDP ;[]==============================================================[] ; ; POST_8S: ; ; Clear and check parity on first 64k or 256k of memory, if NOT ; warm boot. Also force the user-reboot. ; ;Saves: NONE ; ;Entry: NONE ;Exit: C Set if fatal error ; ;[]==============================================================[] PUBLIC POST_8S POST_8S PROC NEAR cli cld POST_CODE 0BEh ifdef CUSTOM_LCD_OUTPUT ;R241 call LCD_Display_Msg ;R241 endif; CUSTOM_LCD_OUTPUT ;R241 ;R177 F000_call Prg_Chipset_Default ;set chipset's default call far ptr fProc_Prg_Chipset_Default ;R177 ifdef Early_Init_ClkGen ;R195 extrn Early_Init_Onboard_Generator:near ;R195 call Early_Init_Onboard_Generator ;R195 endif; Early_Init_ClkGen ;R195 ret POST_8S ENDP ;[]==============================================================[] ; ; POST_9S: ; ; Reserved ; ;ENTRY: NONE ;EXIT: NONE ; ;[]==============================================================[] ALIGN 4 PUBLIC POST_9S POST_9S PROC NEAR call Chk_Intel_S_CPU ;R94 ;R259 -starts ifdef CMOS_BACKUP_SUPPORT ifdef VSA_VGA call E000_Enter_Prot_mode ;enter CPU protected mode and dword ptr ds:[GX_BASE+800Ch], not 22220000h ;Disable F000 shadow call E000_Back_Real_mode ;enter CPU protected mode endif ;VSA_VGA endif ;CMOS_BACKUP_SUPPORT ;R259 -ends ifndef Not_Init_Cyrix ;R55 call Cyrix_Init endif ;Not_Init_Cyrix ;R55 F000_call Cache_Init ifndef NO_TOUCH_PORT_92H xor al,al out 92h,al ;A20 off endif; NO_TOUCH_PORT_92H ;R108 - start ifdef CMOS_BACKUP_SUPPORT call Check_Flash_CMOS endif ;CMOS_BACKUP_SUPPORT ;R108 - end ;R259 -starts ifdef CMOS_BACKUP_SUPPORT ifdef VSA_VGA call E000_Enter_Prot_mode ;enter CPU protected mode or dword ptr ds:[GX_BASE+800Ch], 22220000h ;Enable F000 shadow call E000_Back_Real_mode ;enter CPU protected mode endif ;VSA_VGA endif ;CMOS_BACKUP_SUPPORT ;R259 -ends clc ret POST_9S ENDP ;[]==============================================================[] ; ; POST_10S: ; ; Initialize int. vectors (0-77h) to the spurious interrupt ; handler. Then initialize 00h-1fh to their proper places. ; ; ;Saves: NONE ; ;Entry: NONE ;Exit: C Set if fatal error ; ;[]==============================================================[] ALIGN 4 PUBLIC POST_10S POST_10S PROC NEAR cli mov ax,0f000h mov ds,ax cld ; ; Initialize vectors 0-78h to the spurious interrupt handler ; p10_1: xor di,di ; di = start of segment mov es,di ; es = first segment mov ax,0f000h shl eax, 10h ;R215 mov ax, offset SPURIOUS_INT_HDLR mov ax, offset SPURIOUS_soft_HDLR ;R215 mov ecx,78h ; cx = number of vectors rep stosd ; store all vectors... ;R254 - start ;Set interrupt service vector of INT 50H to hardware spurious ;interrupt handler to patch NSTL spurious IRQ masking function. ;NSTL replace INT 8H interrupt vector with INT 50H. ;INT 50H is a software interrupt, our BIOS only set flag in G_RAM ;offset INT_OCCUR_FLG it cause the IRQ0 can not be masked. mov ax, offset SPURIOUS_INT_HDLR;spurious interrupt handler mov di, offset Int50 ; INT 50H interrupt vector stosd ;R254 - end ; ; Initialize vectors 00-1fh to the real handlers ; p10_2: mov cx,20h mov ax,0f000h mov si,offset Int_Tbl xor di,di ALIGN 4 p10_21: movsw ; load next offset stosw ; load segment in ax loop short p10_21 ; ; Check video table entry... ; cmp word ptr [si-2],0 ; if video table entry is 0? jne short p10_3 ; no, exit... mov word ptr es:[di-2],0 ; set segment to 0 to indicate ; no extended characters installed. ; ; Initialize vectors 70-77 ; p10_3: mov cx,8 mov si,offset Sec_Hrdwr_Ints mov di, offset Int70 ALIGN 4 p10_31: movsw stosw loop short p10_31 mov di,offset int60 mov ecx,8 xor eax,eax rep stosd ;R185ifndef EPA_LOGO_Use_Graphics ;R181 ;R185ifdef FULL_SCREEN_LOGO ifdef Graphics_Post ;R185 ;replace INT 9 with temporary handler lea di,INT09 lea ax,POST_INT9_Vect mov es:[di],ax mov es:[di+2],seg EGROUP endif; Graphics_Post ;R185 ;R185endif ;FULL_SCREEN_LOGO ;R185endif; EPA_LOGO_Use_Graphics ;R181 ;R94 call Chk_Intel_S_CPU call Prepare_CMOS_Stack ;R279 ifdef PM_SUPPORT ifdef MP_SUPPORT call If_MP_PLUGGED jnc short Two_Cpu_Plug endif; MP_SUPPORT CALL EARLY_PM_INIT Two_Cpu_Plug: endif ;PM_SUPPORT ifdef NEW_SUPERKBC_KERNEL ;R97 ifndef KeyMatrix_in_XGROUP ;R192 Call Load_Key_Matrix ;R97 else ;KeyMatrix_in_XGROUP ;R192 XCall Load_Key_Matrix ;R192 endif ;KeyMatrix_in_XGROUP ;R192 endif ;NEW_SUPERKBC_KERNEL ;R97 mov byte ptr Post_Temp_Byte[bp],0 ;R06 ;R103 start ;for run time decompress code ret mov bx,2000h mov es,bx mov byte ptr es:[0dfffh],0CBh mov si,Temp_VGA_Seg mov ds,si mov si,Temp_VGA_Off mov ax,ds:[si+4] ;get expand offset mov di,Temp_Exp_Seg mov es,di mov di,Temp_Exp_Off mov es:[di+4],ax cmp ax,0ffffh ;no full screen logo? je short @F ;Yes,skip mov ax,ds:[si] mov es:[di+4],ax mov ax,ds:[si+2] shr ax,12 ;R236 mov es:[di+6],ax @@: ;R103 end ;R176 - Start ifdef HPM_Support pushad call Init_HPM mov ah, 81h ;Initialization call call Post_init_hpm popad endif ;HPM_Support ;R176 - End clc ret POST_10S ENDP ;R279 - starts ;ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÂÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ;³ RTC ³ default ³low ³high ³descriptions ³ ;³ location ³ value ³limit³limit ³ ³ ;ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÁÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ RTC_Limits Label Byte db 00h NMI_OFF, 0 , 00h , 59h ;second db 02h NMI_OFF, 0 , 00h , 59h ;minute db 04h NMI_OFF, 0 , 00h , 23h ;hour db 07h NMI_OFF, 1 , 01h , 31h ;day of month db 08h NMI_OFF, 1 , 01h , 12h ;month db 09h NMI_OFF, 99h , 00h , 99h ;year db 32h NMI_OFF, 19h , 19h , 20h ;year RTC_Limits_End Label Byte NO_OF_RTC_BYTES EQU (($-(offset RTC_Limits))/4) ifdef Date_DEFAULT_IS_BIOS_MAKE_DAY ;[]==============================================================[] ; ; trans_to_byte: ; ; Let string of ASCII code into byte ; ; input : AX ; output : BL ; ;[]==============================================================[] trans_to_byte proc near and ax, 0f0fh mov bl, al shl bl, 4 add bl, ah ret trans_to_byte endp endif ;Date_DEFAULT_IS_BIOS_MAKE_DAY PUBLIC Prepare_CMOS_Stack Prepare_CMOS_Stack PROC NEAR PUBLIC Setup_CMOS Setup_CMOS LABEL NEAR ;-------------------------- ;Check date & time boundary ;-------------------------- push cs pop ds cli ifdef Date_DEFAULT_IS_BIOS_MAKE_DAY f000_call E000_64K_shadow_RW ;Enable E000 Shadow write mov di, offset RTC_Limits push es mov ax,0f000h mov es,ax mov si,offset DGROUP:BIOS_INFORM_STR mov ax, word ptr es:[si+1] ;String of month call trans_to_byte mov [di+17], bl mov ax, word ptr es:[si+4] ;String of day call trans_to_byte mov [di+13], bl mov ax, word ptr es:[si+9] ;String of year's call trans_to_byte ;last 2 digital mov [di+21], bl mov ax, word ptr es:[si+7] ;String of year's call trans_to_byte ;first 2 digital mov [di+25], bl pop es f000_call E000_64K_shadow_R ;;Disable E000 Shadow write endif ;Date_DEFAULT_IS_BIOS_MAKE_DAY mov si, offset RTC_Limits Check_Next_RTC_Loc: cmp si, offset RTC_Limits_End je short To_Check_Valid_Century mov al, ds:[si] ;AL=CMOS index call Get_Rtc_Byte jc short This_RTC_Byte_OK mov bx, ds:[si+2] cmp al, bl ;below low limit ? jb short Load_RTC_Defaults cmp al, bh ;above high limit ? ja short Load_RTC_Defaults and al,0fh ;low nibbble cmp al,09h ;max. BCD is 9 ja short Load_RTC_Defaults ;number valid This_RTC_Byte_OK: add si, 4 jmp short Check_Next_RTC_Loc Load_RTC_Defaults: mov si, offset RTC_Limits mov cx, NO_OF_RTC_BYTES @@: mov ax, ds:[si] call Set_Rtc_Byte add si, 4 loop short @B jmp short Finish_RTC To_Check_Valid_Century: call Valid_Century Finish_RTC: push ds push 0f000h pop ds ifdef Override_Key_Support mov al, CMOS_OVERRIDE NMI_OFF ; override location call F000_Get_Cmos test al,OVERRIDE_ENABLE ; override? jnz short Over_Yes in al, STAT8042 test al, OBF_8042 ; anything waiting from keyboard jz short @F ; no... in al,DATA8042 ; read key pressed cmp al,KEY_OVERRIDE ; is it override key? jne short @F ; no, look for another key Over_Yes: call Destroy_Cmos_Cksum ; destory CMOS mov al, CMOS_OVERRIDE NMI_OFF ; override location mov ah,al call F000_Get_Cmos or al,OVERRIDE_ENABLE ; override? xchg ah,al call F000_Set_Cmos @@: endif ;No_Override_Key ifndef NO_RTC_BATTERY_CHECK ;Destroy CMOS checksum if CMOS lose battery power mov al,0dh + 80h call F000_Get_Cmos test al,80H ;CMOS battery power ok? jnz short Cmos_PowerOk call Destroy_Cmos_Cksum mov al,CMOS_STATUS + 80h call F000_Get_Cmos or al,RTC_STATUS+EQUIP_STATUS mov ah,al mov al,CMOS_STATUS + 80h call F000_Set_Cmos Cmos_PowerOk: endif; NO_RTC_BATTERY_CHECK call Check_If_Cmos_All_Zeros ifdef JUMPER_CMOS_CLEAR_SUPPORT call Ct_Cmos_Jumper_Chk ;return jumper status jnc short NoClearCmos ;clear CMOS ? ;yes call Destroy_Cmos_Cksum ;destroy CMOS checksum ;no NoClearCmos: endif; JUMPER_CMOS_CLEAR_SUPPORT ;Set initial value of CPU_CLOCK to prevent system hang in routine ;"Read_Cmos_To_Stack" mov ax,G_RAM mov ds,ax assume ds:G_RAM mov al, CPU66 cmp byte ptr CPU_LEVEL[bp], LEVEL_686 jae short _ijhytse mov al, CPU33 cmp byte ptr CPU_LEVEL[bp], LEVEL_486 jbe short _ijhytse mov al, CPU50 _ijhytse: mov ds:[CPU_CLOCK],al mov byte ptr CALLTYPE[bp],0AAh F000_call Read_Cmos_To_Stack call Reset_Drive_CMOS_If_Hidden ifndef DATE_ALARM_SUPPORT ifdef ALi514x DATE_ALARM_SUPPORT EQU 1 endif; ALi514x endif; DATE_ALARM_SUPPORT ifdef DATE_ALARM_SUPPORT mov al,CMOS_STATUS[bp] test al,CKSM_STATUS ; CMOS checksum bad? jnz Clear_Alarm_Date_Yes ; Yes! mov al,0bh + 80h call F000_Get_Cmos test al,00100000b ;alarm interrupt enabled? jnz short No_Clear_Alarm_Date Clear_Alarm_Date_Yes: mov al,BATTERY_POWER + 80h call F000_Get_Cmos and al,0c0h ;clear date alarm mov ah,al mov al,BATTERY_POWER + 80h call F000_Set_Cmos No_Clear_Alarm_Date: endif; DATE_ALARM_SUPPORT ifdef Support_1_FDD mov al,CMOS10[bp] and al,0F0h ;Clear Drive B mov CMOS10[bp],al endif ;Support_1_FDD mov al,CMOS10 mov ah,CMOS10[bp] call F000_Set_Cmos pop ds ret Prepare_CMOS_Stack ENDP ;R279 - ends ;[]==============================================================[] ; ; POST_11S: ; ; Check normal ISA CMOS checksum and battery. If it fails, ; we load the manufacturing defaults. ; ; ;Saves: NONE ; ;Entry: NONE ;Exit: C Set if fatal error ; ;[]==============================================================[] ;R279 ;R81High_Limit: ;R279 ;R81 db 00h NMI_OFF,59h ;second ;R279 ;R81 db 02h NMI_OFF,59h ;minute ;R279 ;R81 db 04h NMI_OFF,23h ;hour ;R279 ;R81 db 07h NMI_OFF,31h ;day of month ;R279 ;R81 db 08h NMI_OFF,12h ;month ;R279 ;R81 db 09h NMI_OFF,99h ;year ;R279 ;R81High_Limit_End: ;R279 ;R81 db 00h ;default second ;R279 ;R81 db 00h ;default minute ;R279 ;R81 db 00h ;default hour ;R279 ;R81 db 01h ;default day of month ;R279 ;R81 db 01h ;default month ;R279 ;R81 db 00h ;default year ;R76A ;R279 ;R76 db 00h ;default year ;R279 ;R76A db 96h ;default year ;R76 ;R279 ;R279 ;R81 - starts ;R279 ;ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÂÄÄÄÄÄÂÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ;R279 ;³ RTC ³ default ³low ³high ³descriptions ³ ;R279 ;³ location ³ value ³limit³limit ³ ³ ;R279 ;ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÁÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ;R279 RTC_Limits Label Byte ;R279 db 00h NMI_OFF, 0 , 00h , 59h ;second ;R279 db 02h NMI_OFF, 0 , 00h , 59h ;minute ;R279 db 04h NMI_OFF, 0 , 00h , 23h ;hour ;R279 db 07h NMI_OFF, 1 , 01h , 31h ;day of month ;R279 db 08h NMI_OFF, 1 , 01h , 12h ;month ;R279 ;R127 db 09h NMI_OFF, 96h , 00h , 99h ;year ;R279 ;R127B db 09h NMI_OFF, 98h , 00h , 99h ;year ;R127;R127A ;R279 db 09h NMI_OFF, 99h , 00h , 99h ;year ;R127B ;R279 db 32h NMI_OFF, 19h , 19h , 20h ;year ;R279 RTC_Limits_End Label Byte ;R279 NO_OF_RTC_BYTES EQU (($-(offset RTC_Limits))/4) ;R279 ;R81 - ends ;R279 ;R257 - start ;R279 ifdef Date_DEFAULT_IS_BIOS_MAKE_DAY ;R279 ;R279 ;[]==============================================================[] ;R279 ; ;R279 ; trans_to_byte: ;R279 ; ;R279 ; Let string of ASCII code into byte ;R279 ; ;R279 ; input : AX ;R279 ; output : BL ;R279 ; ;R279 ;[]==============================================================[] ;R279 ;R279 trans_to_byte proc near ;R279 and ax, 0f0fh ;R279 mov bl, al ;R279 shl bl, 4 ;R279 add bl, ah ;R279 ret ;R279 trans_to_byte endp ;R279 ;R279 endif ;Date_DEFAULT_IS_BIOS_MAKE_DAY ;R279 ;R257 - end ;R279 ;R279 ;R279 ALIGN 4 ;R279 PUBLIC POST_11S ;R279 POST_11S PROC NEAR ;R279 ;R279 PUBLIC SETUP_CMOS ;R279 SETUP_CMOS LABEL NEAR ;R279 ;R279 ;-------------------------- ;R279 ;Check date & time boundary ;R279 ;-------------------------- ;R279 push cs ;R279 pop ds ;R279 ;R279 cli ;R279 ;R257 - start ;R279 ifdef Date_DEFAULT_IS_BIOS_MAKE_DAY ;R279 ;R279 f000_call E000_64K_shadow_RW ;Enable E000 Shadow write ;R279 ;R279 mov di, offset RTC_Limits ;R279 push es ;R279 mov ax,0f000h ;R279 mov es,ax ;R279 mov si,offset DGROUP:BIOS_INFORM_STR ;R279 ;R279 mov ax, word ptr es:[si+1] ;String of month ;R279 call trans_to_byte ;R279 mov [di+17], bl ;R279 ;R279 mov ax, word ptr es:[si+4] ;String of day ;R279 call trans_to_byte ;R279 mov [di+13], bl ;R279 ;R279 mov ax, word ptr es:[si+9] ;String of year's ;R279 call trans_to_byte ;last 2 digital ;R279 mov [di+21], bl ;R279 ;R279 mov ax, word ptr es:[si+7] ;String of year's ;R279 call trans_to_byte ;first 2 digital ;R279 mov [di+25], bl ;R279 ;R279 pop es ;R279 ;R279 f000_call E000_64K_shadow_R ;;Disable E000 Shadow write ;R279 ;R279 endif ;Date_DEFAULT_IS_BIOS_MAKE_DAY ;R279 ;R257 - end ;R279 ;R279 ;R81 - starts ;R279 mov si, offset RTC_Limits ;R279 ;R279 Check_Next_RTC_Loc: ;R279 ;R279 cmp si, offset RTC_Limits_End ;R279 je short To_Check_Valid_Century ;R279 ;R279 mov al, ds:[si] ;AL=CMOS index ;R279 call Get_Rtc_Byte ;R279 jc short This_RTC_Byte_OK ;R279 mov bx, ds:[si+2] ;R279 cmp al, bl ;below low limit ? ;R279 jb short Load_RTC_Defaults ;R279 cmp al, bh ;above high limit ? ;R279 ja short Load_RTC_Defaults ;R279 ;R279 and al,0fh ;low nibbble ;R279 cmp al,09h ;max. BCD is 9 ;R279 ja short Load_RTC_Defaults ;number valid ;R279 ;R279 This_RTC_Byte_OK: ;R279 ;R279 add si, 4 ;R279 jmp short Check_Next_RTC_Loc ;R279 ;R279 Load_RTC_Defaults: ;R279 ;R279 mov si, offset RTC_Limits ;R279 mov cx, NO_OF_RTC_BYTES ;R279 @@: ;R279 mov ax, ds:[si] ;R279 call Set_Rtc_Byte ;R279 add si, 4 ;R279 loop short @B ;R279 jmp short Finish_RTC ;R279 ;R279 To_Check_Valid_Century: ;R279 ;R279 call Valid_Century ;R279 ;R279 Finish_RTC: ;R279 ;R81 - ends ;R279 ;R279 ;R76 mov al,32h ;Get Century ;R279 ;R76 call F000_Get_Cmos ;R279 ;R76 cmp al,19h ;R279 ;R76 je short Valid_Century ;R279 ;R76 cmp al,20h ;R279 ;R76 je short Valid_Century ;R279 ;R76 mov ax,1932h ;Century 19 ;R279 ;R76 call F000_Set_Cmos ;R279 ;R76 mov ax,9609h ;'96 year ;R279 ;R76 ;R32 call F000_Set_Cmos ;R279 ;R76 call Set_Rtc_Byte ;R32 ;R279 ;R76 ;R279 ;R76 Valid_Century: ;R279 ;R76 mov al,09h ;Is year >= 80 ? ;R279 ;R76 ;R32 call F000_Get_Cmos ;R279 ;R76 call Get_Rtc_Byte ;R32 ;R279 ;R76 jc short Year19xx ;R32 ;R279 ;R76 cmp al,80h ;R279 ;R76 jae short Year19xx ;R279 ;R76 mov ax,2032h ;No, Set century = 2000 ! ;R279 ;R76 call F000_Set_Cmos ;R279 ;R76 Year19xx: ;R279 ;R279 ;R81 call Valid_Century ;R76 ;R279 ;R81 ;R279 ;R81 mov si,offset High_Limit ;R279 ;R81 mov di,offset High_Limit_End ;R279 ;R81 Check_N_Loc: ;R279 ;R81 cmp si,offset High_Limit_End ;R279 ;R81 je short Finish_Rtc ;R279 ;R81 ;R279 ;R81 ;R32ifndef NO_CHECK_UPDATE_BIT ;R279 ;R81 ;R32 call Check_Upd ;R279 ;R81 ;R32 jc short N_Cmos ;update in progress ;R279 ;R81 ;R32endif ;NO_CHECK_UPDATE_BIT ;R279 ;R81 ;R32 mov ax,ds:[si] ;AH=high limit, AL=CMOS index ;R279 ;R81 ;R32 call F000_Get_Cmos ;R279 ;R81 ;R279 ;R81 ;R32 - starts ;R279 ;R81 mov ax,ds:[si] ;AH=high limit, AL=CMOS index ;R279 ;R81 call Get_Rtc_Byte ;R279 ;R81 jc short N_Cmos ;update in progress ;R279 ;R81 ;R32 - ends ;R279 ;R81 cmp al,ah ;exceed upper limit ? ;R279 ;R81 ja short Write_Cmos ;yes, go load default ! ;R279 ;R81 ;R279 ;R81 cmp al,ds:[di] ;below RTC low limit ? ;R279 ;R81 jb short Write_Cmos ; ;R279 ;R81 ;R279 ;R81 and al,0fh ;low nibbble ;R279 ;R81 cmp al,09h ;max. BCD is 9 ;R279 ;R81 jbe short N_Cmos ;number valid ;R279 ;R81 Write_Cmos: ;R279 ;R81 ;R32ifndef NO_CHECK_UPDATE_BIT ;R279 ;R81 ;R32 call Check_Upd ;R279 ;R81 ;R32 jc short N_Cmos ;R279 ;R81 ;R32endif ;NO_CHECK_UPDATE_BIT ;R279 ;R81 mov al,ds:[si] ;R279 ;R81 mov ah,ds:[di] ;R279 ;R81 call Set_Rtc_Byte ;R32 ;R279 ;R81 ;R32 call F000_Set_Cmos ;R279 ;R81 N_Cmos: ;R279 ;R81 add si,2 ;R279 ;R81 inc di ;R279 ;R81 jmp Check_N_Loc ;R279 ;R81 Finish_Rtc: ;R279 ;R279 push ds ;R279 push 0f000h ;R279 pop ds ;R279 ;R279 ifdef Override_Key_Support ;R279 mov al, CMOS_OVERRIDE NMI_OFF ; override location ;R279 call F000_Get_Cmos ;R279 test al,OVERRIDE_ENABLE ; override? ;R279 jnz short Over_Yes ;R279 ;R279 in al, STAT8042 ;R279 test al, OBF_8042 ; anything waiting from keyboard ;R279 jz short @F ; no... ;R279 ;R279 in al,DATA8042 ; read key pressed ;R279 cmp al,KEY_OVERRIDE ; is it override key? ;R279 jne short @F ; no, look for another key ;R279 ;R279 Over_Yes: ;R279 call Destroy_Cmos_Cksum ; destory CMOS ;R279 ;R279 mov al, CMOS_OVERRIDE NMI_OFF ; override location ;R279 mov ah,al ;R279 call F000_Get_Cmos ;R279 or al,OVERRIDE_ENABLE ; override? ;R279 xchg ah,al ;R279 call F000_Set_Cmos ;R279 @@: ;R279 endif ;No_Override_Key ;R279 ;R279 ifndef NO_RTC_BATTERY_CHECK ;R279 ;Destroy CMOS checksum if CMOS lose battery power ;R279 mov al,0dh + 80h ;R279 call F000_Get_Cmos ;R279 ;R279 test al,80H ;CMOS battery power ok? ;R279 jnz short Cmos_PowerOk ;R279 call Destroy_Cmos_Cksum ;R279 ;R279 mov al,CMOS_STATUS + 80h ;R279 call F000_Get_Cmos ;R279 or al,RTC_STATUS+EQUIP_STATUS ;R279 mov ah,al ;R279 mov al,CMOS_STATUS + 80h ;R279 call F000_Set_Cmos ;R279 ;R279 Cmos_PowerOk: ;R279 endif; NO_RTC_BATTERY_CHECK ;R279 ;R279 call Check_If_Cmos_All_Zeros ;R279 ;R279 ;R149 - start ;R279 ifdef JUMPER_CMOS_CLEAR_SUPPORT ;R279 call Ct_Cmos_Jumper_Chk ;return jumper status ;R279 jnc short NoClearCmos ;clear CMOS ? ;R279 ;yes ;R279 call Destroy_Cmos_Cksum ;destroy CMOS checksum ;R279 ;no ;R279 NoClearCmos: ;R279 endif; JUMPER_CMOS_CLEAR_SUPPORT ;R279 ;R149 - end ;R279 ;R279 ;Set initial value of CPU_CLOCK to prevent system hang in routine ;R279 ;"Read_Cmos_To_Stack" ;R279 mov ax,G_RAM ;R279 mov ds,ax ;R279 assume ds:G_RAM ;R279 ;R84 mov byte ptr ds:[CPU_CLOCK],CPU16 ;R279 ;R84 - starts ;R279 ;R279 mov al, CPU66 ;R170 ;R279 cmp byte ptr CPU_LEVEL[bp], LEVEL_686 ;R170 ;R279 jae short _ijhytse ;R170 ;R279 ;R279 mov al, CPU33 ;R279 cmp byte ptr CPU_LEVEL[bp], LEVEL_486 ;R279 jbe short _ijhytse ;R279 mov al, CPU50 ;R84A ;R279 ;R84A mov al, CPU40 ;R279 _ijhytse: ;R279 mov ds:[CPU_CLOCK],al ;R279 ;R84 - ends ;R279 ;R279 mov byte ptr CALLTYPE[bp],0AAh ;R279 F000_call Read_Cmos_To_Stack ;R279 ;R279 call Reset_Drive_CMOS_If_Hidden ;R279 ;R102 - start ;R279 ifndef DATE_ALARM_SUPPORT ;R279 ifdef ALi514x ;R279 DATE_ALARM_SUPPORT EQU 1 ;R279 endif; ALi514x ;R279 endif; DATE_ALARM_SUPPORT ;R279 ;R102 - end ;R279 ;R83 - start ;R279 ifdef DATE_ALARM_SUPPORT ;R279 mov al,CMOS_STATUS[bp] ;R279 test al,CKSM_STATUS ; CMOS checksum bad? ;R279 jnz Clear_Alarm_Date_Yes ; Yes! ;R279 ;R279 mov al,0bh + 80h ;R279 call F000_Get_Cmos ;R279 test al,00100000b ;alarm interrupt enabled? ;R279 jnz short No_Clear_Alarm_Date ;R279 ;R279 Clear_Alarm_Date_Yes: ;R279 ;R279 mov al,BATTERY_POWER + 80h ;R279 call F000_Get_Cmos ;R279 and al,0c0h ;clear date alarm ;R279 mov ah,al ;R279 mov al,BATTERY_POWER + 80h ;R279 call F000_Set_Cmos ;R279 ;R279 No_Clear_Alarm_Date: ;R279 endif; DATE_ALARM_SUPPORT ;R279 ;R83 - end ;R279 ;R279 ifdef Support_1_FDD ;R279 mov al,CMOS10[bp] ;R279 and al,0F0h ;Clear Drive B ;R279 mov CMOS10[bp],al ;R279 endif ;Support_1_FDD ;R279 ;R279 mov al,CMOS10 ;R279 mov ah,CMOS10[bp] ;R279 call F000_Set_Cmos ;R279 ;R279 ; Set checksum error PUBLIC POST_11S ;R279 POST_11S PROC NEAR ;R279 push ds ;R279 and byte ptr FIXED_DISK_STEP[bp],Not 01h call CPU_LATE_Detect ;detect coprocessor mov ax,G_RAM mov ds,ax assume ds:G_RAM mov al,byte ptr FIXED_DISK_STEP[bp] mov ds:CPU_TYPE_FLAG,al ;R168 - start ifdef LAN_BOOT_SUPPORT mov si,offset LanBoot_Item call F000_GetItem_Value ;check CMOS value or al,al ;boot from LAN ROM jz short NotBootLan ;yes boot from LAN first or byte ptr ds:SYSTEM_FLAG,BOOT_LAN NotBootLan: endif; LAN_BOOT_SUPPORT ;R168 - end ifndef NO_FAST_A20 ;R75 ;Set Fast Gate A20 flag mov si,offset GateA20_Item call F000_GetItem_Value or al,al jz short @F or byte ptr ds:FDD_VERIFY_CMD_FLAG,10h @@: endif; NO_FAST_A20 ;R75 ifndef Support_1_FDD ;R140 ;If user set drive B only , the equipment byte should set to 2 drives ifNdef New_Swap_Fdd_Method ;R217 test byte ptr FLOPPY_TYPE[bp],00001111b jz short One_Drive or byte ptr EQUIPMENT[bp],01000000b;set 2 drives ;R217 -start else ;New_Swap_Fdd_Method test byte ptr FLOPPY_TYPE[bp],11110000b jz short No_2_Drives_Exist test byte ptr FLOPPY_TYPE[bp],00001111b jz short No_2_Drives_Exist ;Set 2 Drives or byte ptr EQUIPMENT[bp],01000000b No_2_Drives_Exist: mov si,offset Fdd_Item call F000_GetItem_Value ;AL: 0=On, 1=Off or al,al ;FDC enabled ? jnz short FDC_Disable ;no cmp byte ptr FLOPPY_TYPE[bp],0 je short Not_Drive endif ;New_Swap_Fdd_Method ;R217 -end mov si,offset SwapFloppy_Item call F000_GetItem_Value or al,al jz short @F or byte ptr ds:FDD_VERIFY_CMD_FLAG,SWAP_DRIVE @@: FDC_Disable: ;R217 Not_Drive: ;R217 One_Drive: endif ;Support_1_FDD ;R140 ifdef PM_SUPPORT mov di,3 ;di=3 --> early PM init ;R177 F000_call PRG_CHIPSET call far ptr fProc_Prg_Chipset ;R177 endif ;PM_SUPPORT ifdef P6_BIOS_ONLY call P6_BiosUpdate endif; P6_BIOS_ONLY ifdef PNP_BIOS call Kill_Onboard_PnP_IO ;R157 call PNP_Early_Init call PNP_System_Resource endif ;PNP_BIOS ;R268 F000_call Ct_Early_Shadow extrn Init_Onboard_Generator:near ;R166 ;R275 ifndef Init_Clkgen_At_POST13 ;R220 ;R275 call Init_Onboard_Generator ;R166 ;R275 endif; Init_Clkgen_At_POST13 ;R220 F000_call Ct_Early_Shadow ;R268 ifndef Init_Clkgen_At_POST13 ;R275 call Init_Onboard_Generator ;R275 endif; Init_Clkgen_At_POST13 ;R275 call Init_Onboard_Sensor ;R144A pop ds clc ret POST_11S ENDP ;R32 - starts ;R76 ;------------------------------------------------ ;R76 ;Input : AL = CMOS index to get ;R76 ;Output : CF : RTC is under update process ;R76 ; NC : AL = RTC value ;R76 ;------------------------------------------------ ;R76 Public Get_Rtc_Byte ;R76 Get_Rtc_Byte Proc Near ;R76 ifndef NO_CHECK_UPDATE_BIT ;R76 pusha ;R76 call Check_Upd ;R76 popa ;R76 jc short @F ;R76 endif ;NO_CHECK_UPDATE_BIT ;R76 call F000_Get_Cmos ;R76 clc ;R76 @@: ;R76 ret ;R76 Get_Rtc_Byte Endp ;R76 ;R76 ;------------------------------------------------ ;R76 ;Input : AL = CMOS index to set ;R76 ; AH = Value to set to RTC ;R76 ;Output : None ;R76 ;------------------------------------------------ ;R76 Public Set_Rtc_Byte ;R76 Set_Rtc_Byte Proc Near ;R76 ;R76 ifndef NO_CHECK_UPDATE_BIT ;R76 pusha ;R76 call Check_Upd ;R76 popa ;R76 jc short @F ;R76 endif ;NO_CHECK_UPDATE_BIT ;R76 call F000_Set_Cmos ;R76 @@: ;R76 ret ;R76 Set_Rtc_Byte Endp ;R76 ;R32 - ends ;R76 ;R76Check_Upd: ;R76 xor cx,cx ;R76 @@: ;R76 mov al,0ah NMI_OFF ;R76 call F000_Get_Cmos ;R76 test al,80h ;in update? ;R76 jz short @F ;R76 loop short @B ;R76 stc ;R76 ret ;R76 @@: ;R76 clc ;R76 ret Destroy_Cmos_Cksum proc near mov ah,2eh + 80h mov al,ah call F000_Get_Cmos xchg ah,al inc ah ; destroy CMOS call F000_Set_Cmos ret Destroy_Cmos_Cksum endp Check_If_Cmos_All_Zeros Proc Near push bx push ds push 0f000h pop ds mov bx, 1516h call Chk_Zero_Cmos pop ds pop bx ret ;Input : bl - start CMOS addr. to check ; bh - end CMOS addr. to check Chk_Zero_Cmos: mov al, bl or al, 80h call F000_Get_Cmos or al, al jnz short Cmos_Not_All_Zeros inc bl cmp bl, bh jbe short Chk_Zero_Cmos call Destroy_Cmos_Cksum Cmos_Not_All_Zeros: ret Check_IF_Cmos_All_Zeros Endp Reset_Drive_CMOS_If_Hidden Proc Near push ds pusha push 0F000h pop ds mov di, offset Drv_Item_List mov cx, Drv_List_No CkNextDrv: mov si, cs:[di] test word ptr ds:[si].ITEMSTAT, ITEMDISABLE jz short DrvItemNotHidden mov ah, byte ptr ds:[si].CmosMask ;R171 not ah mov al,byte ptr ds:[si].SetupDef ;R171 movzx si, byte ptr ds:[si].CmosLoc ;R171 and [bp+si], ah and al,ah ;R171 not ah ;R171A and [bp+si],ah ;R171A or [bp+si],al ;R171A ;R171A mov [bp+si], al ;R171 or al,al ;R171 jnz short DrvItemNotHidden ;R171 cmp si, 19h jne short @F and byte ptr CMOS12[bp], 00Fh @@: cmp si, 1Ah jne short @F and byte ptr CMOS12[bp], 0F0h @@: DrvItemNotHidden: ifdef Support_1_FDD ;R140 and byte ptr CMOS10[bp], 0F0h ;R140 endif ;Support_1_FDD ;R140 inc di inc di loop short CkNextDrv popa pop ds ret Reset_Drive_CMOS_If_Hidden Endp Drv_Item_List: dw offset DRIVE_A_ITEM ifndef Support_1_FDD ;R140 dw offset DRIVE_B_ITEM endif ;Support_1_FDD ;R140 dw offset HDDC_ITEM dw offset HDDD_ITEM ifndef No_Support_4_IDE dw offset HDDE_ITEM dw offset HDDF_ITEM endif ;No_Support_4_IDE Drv_List_No EQU ($ - offset Drv_Item_List)/2 CPU_LATE_DETECT PROC NEAR ;============================================================================= ; ; Detect whether a math coprocessor is installed. If so then set the low ; bit of the CPU type flag, which indicates a math coprocessor. ; ;============================================================================= cd_2: call Ck_Coprocessor or al,al ; coprocessor present? jz short cd_3 ; no... or byte ptr FIXED_DISK_STEP[bp],1 ; math coprocessor present cd_3: clc ret CPU_LATE_DETECT ENDP CK_COPROCESSOR PROC NEAR ; RETURNS AL ; AL - 0 NO COPROCESSOR ; AL - 1 287 ; AL - 2 387 F000_call Ct_Math_Detect jc short @F ;No special detection C6_Exist: ret @@: call CyrixC6_Detect jnc short C6_Exist ; ASSUMES THAT USER_REBOOT IS ZERO! ; DESTROYS SI,DS,AX push ds push di MOV AX,G_RAM MOV DS,AX ASSUME DS:G_RAM mov di,G_RAM:[USER_REBOOT] FNINIT ; MUST USE NO WAIT FORM ; Reset the BUSY line otherwise math cop. may halt on the next ; math instruction push ax mov al, 00 out 0F0h, al pop ax MOV SI,OFFSET G_RAM:[USER_REBOOT] MOV WORD PTR [SI],5A5AH ; INITIALIZE TO NON ZERO FNSTSW [SI] ; MUST USE NO WAIT FORM. ; IT IS NOT NECESSARY TO USE A WAIT ; AFTER FNSTSW, OR FNSTCW, SO DON'T. CMP BYTE PTR [SI],0 ; SEE OF CORRECT STATUS WITH ZEROS JNE SHORT CK_COPRO_NO FNSTCW [SI] ; LOOK AT THE CONTROL WORD NO WAIT MOV AX,[SI] ; SEE IF ONES CAN BE WRITTEN BY NPX AND AX,103FH ; SEE IF PARTS OF CONTROL WORD OK CMP AX,3FH ; CHECK THAT ONES AND ZEROS CORRECT JNE SHORT CK_COPRO_NO ; NO NPX ; SOME KIND OF NUMERICS CHIP IS INSTALLED, NPX AND WAIT ARE NOW SAFE. FLD1 ; MUST USE DEFAULT CONTROL FROM FNINIT FLDZ ; FORM INFINITY FDIV ; 8087/287 SAYS +INF=-INF FLD ST ; FORM NEGATIVE INFINITY FCHS ; 80387 SAYS +INF<>-INF FCOMPP ; SEE IF THEY ARE THE SAME AND REMOVE FSTSW AX ; LOOK AT STATUS FROM FCOMPP SAHF ; SEE IF THE INFINITIES MATCHED JE SHORT CK_FOUND_287 MOV AL,2 ; 387 return JMP SHORT CK_COPRO_RET CK_FOUND_287: MOV AL,1 ; 287/8087 return JMP SHORT CK_COPRO_RET CK_COPRO_NO: XOR AL,AL CK_COPRO_RET: mov G_RAM:[USER_REBOOT],di pop di pop ds RET CK_COPROCESSOR ENDP ;Input : none ;Output : carry set - not CYRIX CPU ; carry clear - ; AL - 2 --> Cyrix C6 coprocessor existed ; AL - 0 --> No C6 CyrixC6_Detect proc near ifndef P6_BIOS_ONLY ;R71 ifndef CPU_586_ONLY mov al,FIXED_DISK_STEP[bp] and al,CPU_TYPE_MASK and al,NOT (CPUCACHE + COPROCESSOR) cmp al,TYPE_CX486S je short Cyrix_cpu_1 cmp al,TYPE_CX486S2 jne short @F Cyrix_cpu_1: .387 mov ax,0C2C2h out 22h,al in al,23h or al,01h xchg al,ah out 22h,al xchg al,ah out 23h,al fninit mov ax,5a5ah fnstsw ax cmp ax,0 mov al,2 ;C6 existed je short C6_Plugged mov ax,0C2C2h out 22h,al in al,23h and al,Not 01h ;disable coprocessor bit xchg al,ah out 22h,al xchg al,ah out 23h,al xor al,al ;no C6 C6_Plugged: clc ret @@: endif; CPU_586_ONLY endif; P6_BIOS_ONLY ;R71 stc ret CyrixC6_Detect endp ;[]==============================================================[] ; ; POST_12S: ; ; Check checksum checksum. Initialize the keyboard controller ; and set up all of the 40: area data. ; ;Saves: NONE ; ;Entry: NONE ;Exit: C Set if fatal error ; ;[]==============================================================[] ALIGN 4 PUBLIC POST_12S POST_12S PROC NEAR mov byte ptr IDE_Detect_Counter[bp],0 mov byte ptr CDROM_Exist_Flag[bp],0 ;R35 ; ; Set up 40: area (16-character buffer, etc.) ; p12_7: mov ax,G_RAM mov ds,ax ASSUME DS:G_RAM mov ax,word ptr CPU_BRAND[bp] cmp al,CPU_BRAND_CYRIX jne short Not_Cyrix or byte ptr ds:[SYSTEM_FLAG],Cyrix_CPU Not_Cyrix: cli mov word ptr ds:[Ptr_Kbd_Buf_Hd],offset Buf_For_Kbd-400h mov word ptr ds:[Ptr_Kbd_Buf_Tl],offset Buf_For_Kbd-400h mov word ptr ds:[Kbd_Buf_Locn],offset Buf_For_Kbd-400h mov word ptr ds:[Kbd_BufEnd_Locn], offset Buf_For_Kbd+32-400h mov word ptr ds:[Shft_Stat],0 mov byte ptr ds:[Init_Err_Flg+1],0 ; select usa keyboard ; ; Force NUM-LOCK on 101-key keyboard. ; sti clc ret ; ; Return w/error ; p12_9: or byte ptr CMOS_STATUS[bp], KBD_STATUS + EQUIP_STATUS ; set keyboard error jmp short p12_7 ; attempt to set up 40: anyway POST_12S ENDP ; ; Here lies the scattered dust and bits of previous keyboard ; routines. RIP. ; ;[]==============================================================[] ; ;POST_13S: ; ; Initialize the video, whether mono, color or EGA/VGA. ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ; Note: 1. If this POST is moved, then the EARLY_TRY_SHADOW ; section in ATBASE will also need to be moved. ; ;[]==============================================================[] ALIGN 4 PUBLIC POST_13S POST_13S PROC NEAR ;M01 - starts ifdef RPB_ENABLED extrn rpb_set_bios_error:near xor cx,cx call rpb_set_bios_error ; clear error bits endif ;RPB_ENABLED ;M01 - ends xor al,al ;program address for 0-640k call Set_Cpu_MtRR ;R29 - start ifdef PCI_BUS call Before_PciVGARomInit endif; PCI_BUS ;R29 - end ifdef IDE_PRIMARY_ONLY and byte ptr FIXED_TYPE[bp],0F0h mov byte ptr EXT_FIXED_1[bp],0 ifdef Support_4_IDE mov byte ptr CMOS_HDDF[bp],0 endif ;Support_4_IDE endif ;IDE_PRIMARY_ONLY ;R26B ifndef P6_BIOS_ONLY ;R26B ;R126 F000_call Init_Apic ;R26B call Init_Apic ;R126 endif; P6_BIOS_ONLY ;Program chipset register if these registers need set earlier POST_CODE 0BFh ifdef CUSTOM_LCD_OUTPUT ;R241 call LCD_Display_Msg ;R241 endif; CUSTOM_LCD_OUTPUT ;R241 mov di,1 ;earyly programming ;R177 F000_call PRG_CHIPSET call far ptr fProc_Prg_Chipset ;R177 POST_CODE 13 ifdef CUSTOM_LCD_OUTPUT ;R241 call LCD_Display_Msg ;R241 endif; CUSTOM_LCD_OUTPUT ;R241 ;Set system to high speed before CPU clock detection ;turn on CPU cache mov al,TRUE call F000_Cpu_Cache F000_call Set_High_Speed call Measure_CPU_Speed F000_call Load_Auto_Cfg_D4 ;Restore system speed after CPU clock detection if needed F000_call Restore_Speed ;R220 - start ifdef Init_Clkgen_At_POST13 call Init_Onboard_Generator endif; Init_Clkgen_At_POST13 ;R220 - end ;Turn off L2 cache ifndef VSA_VGA ;R119A mov al,FALSE call F000_Cpu_Cache endif ;VSA_VGA ;R119A push es mov ax,G_RAM mov es,ax assume es:G_RAM mov al,byte ptr OVERRIDE[bp] shr al,6 and es:CPU_CLOCK,CPU_CLOCK_MASK or es:CPU_CLOCK,al pop es F000_call Get_CPU_Speed ;in chipset.asm ; ; Here lies the Award modular video table initialization. ; ; ; If we have a bad checksum then we try and auto-determine the ; video type. Otherwise we try and trust CMOS. ; mov ax,G_RAM mov es,ax ; es = low memory ifndef PCI_BUS ;For Tiga high resolution display card to show logo message or es:[Hardware],30h ; assume mono mov ax,7 ; set mode int 10h mov dx,03b8h mov al,29h ; control byte out dx,al ; enable video output ;blank out video push es mov ax,0b000h mov es,ax xor di,di mov cx,8000h mov ax,0720h rep stosw pop es endif; PCI_BUS and es:[Hardware],NOT DISPLAY_TYPE ; assume no video type ; ; Trying to be good, we are going to listen to what CMOS tells us. ; p13_1: mov al,byte ptr EQUIPMENT[bp] and al,DISPLAY_TYPE shr al,4 ; Check EGA/VGA... cmp al,03h ; MONO? je P13_13 ;128k call Look_V_ROM ; option ROM? jnz p13_2 p13_10: and byte ptr EQUIPMENT[bp],NOT DISPLAY_TYPE ; set EGA/VGA p13_101: lea ax,IRET_Vect mov word ptr es:[Int10],ax ifndef PCI_BUS ;Check if scan onboard E000H video ROM or not push ds push 0f000h pop ds lea di,SYSTEM4_BYTE test byte ptr [di],ONBOARD_E_VIDEO pop ds jz short No_Onboard_E000h_2 mov dx,bx ; bx = seg returned from Look_V_ROM add dx,800h ; dx = seg + 800h No_Onboard_E000h_2: endif; PCI_BUS push bp ;Save warm boot flag, Because some VGA hang while warm booting push word ptr es:USER_REBOOT ;save flag push es mov word ptr es:USER_REBOOT,0 ;reset flag ifdef ENABLE_L1_CACHE_BEFORE_INIT_VGA mov al,TRUE call F000_Cpu_Cache endif ;ENABLE_L1_CACHE_BEFORE_INIT_VGA ifdef NO_CHECKSUM_VGA_BIOS ;R125 push ds ;R125 mov ax, 0C000h ;R125 mov ds, ax ;R125 cmp word ptr ds:[0],0AA55h ;R125 jne short No_V_BIOS ;R125 FAR_CALL 3, 0C000h ;R125 No_V_BIOS: ;R125 pop ds ;R125 else ;NO_CHECKSUM_VGA_BIOS ;R125 ;R141 - start ifdef Flash_2M_support pushad push es push ds mov ax, 4000h push ax pop es mov ax, 8000h push ax pop ds xor di, di xor si, si mov cx, 400h rep movsb ;move 8000:0 to 4000:0 lenght 1k mov ax, ds:[0] ;save 8000:0 push ax endif; Flash_2M_support ;R141 - end F000_call R_Mod_Ck ; initialize it if found ;R176 - Start ifdef HPM_Support pushad mov ah, 82h ;Screen enable call call Post_init_hpm popad endif ;HPM_Support ;R176 - End ;R141 - start ifdef Flash_2M_support mov ax, 8000h push ax pop es pop ax mov bx, es:[0] cmp ax, bx ;complar 8000:0 is modify je short @f ;no mov ax, 4000h push ax pop ds xor di, di xor si, si mov cx, 400h rep movsb ;remove 4000:0 to 8000:0 lenght 1k @@: pop ds pop es popad endif; Flash_2M_support ;R141 - end endif ;NO_CHECKSUM_VGA_BIOS ;R125 ifdef ENABLE_L1_CACHE_BEFORE_INIT_VGA mov al,FALSE call F000_Cpu_Cache endif ;ENABLE_L1_CACHE_BEFORE_INIT_VGA ifdef PCI_BUS ;R33A cmp byte ptr PCI_VGA_FOUND[bp],0AAH ;VGA found? ;R33A jne short Not_PciVga ;R33A call F_C000_Shadow_R ;R33 Not_PciVga: ;R33A endif; PCI_BUS ;R33A ifdef PCI_BUS call Release_Shadow_From_PCI_VGA ;R08A endif ;PCI_BUS ;Restore warm boot flag pop es pop word ptr es:USER_REBOOT ;restore flag pop bp ;R09ifdef FULL_SCREEN_LOGO ;R09 mov ax,12h ;R09else ;FULL_SCREEN_LOGO mov ax,3 ;R09endif ;FULL_SCREEN_LOGO jmp short p13_3 ; Check color 40... p13_11: dec al ; Color 40 jnz short p13_12 ; no... mov ah,DT_CGA40 ; set 40 col. info jmp short p13_121 ; but use 80 cols. until boot ; Check color 80 p13_12: dec al jnz short p13_13 mov ah,DT_CGA80 p13_121: ; 40/80 column initialization call Ck_For_Vid ; check type of memory present (saves AX) test ch,10b ; bit 1: 1 = color memory/6845 found jz short p13_2 ; auto-determine if no memory/6845 found. p13_122: or byte ptr es:[Hardware],ah ; set display type to 80 cols. call Get_Switch test al,40h ; display switch set to mono? ;R09ifdef FULL_SCREEN_LOGO ;R09 mov ax,12h ;R09else ;FULL_SCREEN_LOGO mov ax,3 ; get correct mode. ;R09endif ;FULL_SCREEN_LOGO jnz short p13_4 ; yes, set switch error. jmp short p13_3 ; set mode and exit. ; Check monochrome p13_13: call Ck_For_Vid ; check type of memory present test ch,01b ; bit 0: 1 = mono memory/6845 present jz short p13_2 ; auto-determine if no memory/6845 found p13_131: or byte ptr es:[Hardware],DT_MONO ; set display type to monochrome call Get_Switch ; get display switch test al,40h ; display switch set to mono? mov ax,7 ; get correct display mode. jz short p13_4 ; no, set switch error jmp short p13_3 ; set mode and exit ; Attempt to auto-determine the type of video adapter present. ; First, though, we set the video changed bit in CMOS. p13_2: and byte ptr es:[Hardware],NOT DISPLAY_TYPE ; assume no video type and byte ptr EQUIPMENT[bp],NOT DISPLAY_TYPE ; assume EGA/VGA ; Find out if we have an option ROM... call Look_V_ROM ; do we have an option ROM? jnz short p13_22 ; no, try CGA/MONO jmp p13_101 ; initialize it. ; Check the type of memory present... p13_22: call Ck_For_Vid ; out: ch: bit 0: 1 = mono present, ; bit 1: 1 = color present xchg cl,ch and cx,3 ; cx: 0 = no video ; 1 = mono only ; 2 = color only ; 3 = mono and color jcxz short p13_5 ; if no video... loop short p13_24 ; mono only... (cl = 1) ; Force to monochrome... p13_23: or byte ptr EQUIPMENT[bp],DT_MONO jmp short p13_131 ; Force to CGA p13_24: loop short p13_25 ; color only... (cl = 2) p13_241: mov ah,DT_CGA80 or byte ptr EQUIPMENT[bp],ah jmp short p13_122 ; Use switch to chose between mono and color... p13_25: call Get_Switch test al,40h ; color or mono? jz short p13_241 ; color... jmp short p13_23 ; Set mode and exit p13_3: int 10h ; ax = 00mmh, mm= mode mov ax,G_RAM mov es,ax ASSUME ES:G_RAM mov esi,es:[int10] mov dword ptr es:[TEMP_BP+2],esi clc ret ; Set invalid display switch error p13_4: ifndef NO_DISPLAY_SWITCH or byte ptr CMOS_STATUS[bp],SWITCH_STATUS+EQUIP_STATUS endif ;NO_DISPLAY_SWITCH jmp short p13_3 ; set mode... ; No video found at all, beep speaker. p13_5: ;R157ifdef PNP_BIOS ;R157 call PNP_Video_Init ;R157 jnc p13_10 ;R157endif ;PNP_BIOS ;R105 lea ax,IRET_Vect ;R105 mov word ptr es:[Int10],ax mov dx,102h ; report video error ;R65A F000_call Report_Err_WSpkr ;R134-start ifdef Special_for_GIANTEC mov al,EQUIPMENT NMI_OFF call F000_Get_Cmos and al,0F0h cmp al,10h ; VGA : Absent ? je short @f endif ;Special_for_GIANTEC ;R134-end ifndef NO_VIDEO_ABSENT_BEEP ;R146 call Report_Err_WSpkr ;R65A endif ;NO_VIDEO_ABSENT_BEEP ;R146 @@: ;R134 ;r143 start ifdef RPB_ENABLED ifndef RPB_NOVIDEO extrn rpb_register_error:proc mov dx,RPB_NO_VIDEO call rpb_register_error ; save error in BDA for RPB endif ; RPB_NOVIDEO endif ; RPB_ENABLED ;r143 end ;R09ifdef FULL_SCREEN_LOGO ;R09 mov ax,12h ;R09else ;FULL_SCREEN_LOGO mov ax,3 ;R09endif ;FULL_SCREEN_LOGO ;R20 - starts and byte ptr es:[Hardware],NOT DISPLAY_TYPE ; assume no video type or byte ptr es:[Hardware],DT_MONO ; set display type to monochrome mov byte ptr es:[CON_MODE], 07h ;R20 - ends jmp short p13_3 POST_13S ENDP ;R191 start ;--------------------------------------------- ;input : BL = color plane. ; DH = Red register ; CH = Green register ; CL = Blue register ;output: NONE, just set color palette ;destroy: NONE ;NOTE : this rotine only for VGA. ;--------------------------------------------- ALIGN 4 Set_Creg PROC NEAR push ax push bx ;input : BL = color plane mov ax,1007h ;read one palette register and int 10h ;return value in BH mov bl,bh ;get palette register xor bh,bh ;input - BX = color register mov ax,1010h ;set one color register int 10h ;with RGB value in DH,CH & CL pop bx pop ax ret Set_Creg ENDP ;R191 end ;R185ifndef FULL_SCREEN_LOGO ifndef Graphics_Post ;R185 ;R174ifdef PM_SUPPORT if EPA_LOGO_Switch ;R174 ;R174C;--------------------------------------------- ;R174C;input : BL = color plane ;R174C;output: NONE, just change draw pattern plane ;R174C;destroy: NONE ;R174C;NOTE : this rotine only for VGA. ;R174C;--------------------------------------------- ;R174C ALIGN 4 ;R174CSet_Color_Plane PROC NEAR ;R174C push ax ;R174C push dx ;R174C ;R174C ;enable display memory plane. ;R174C mov dx,3c4h ;index port 3c4h ;R174C mov al,2 ;write plane mask register ;R174C out dx,al ;R174C jmp short $+2 ;R174C inc dx ;data port 3c5h ;R174C mov al,bl ;bit 0-3 = display memory ;R174C out dx,al ; plane 0-3 ;R174C jmp short $+2 ;R174C ;R174C pop dx ;R174C pop ax ;R174C ret ;R174CSet_Color_Plane ENDP ; ;--------------------------------------------- ;input : BL = color plane. ;output: DH = Red register ; CH = Green register ; CL = Blue register ;destroy: NONE ;NOTE : this rotine only for VGA. ;--------------------------------------------- ALIGN 4 Get_Creg PROC NEAR push ax push bx ;input : BL = color plane mov ax,1007h ;read one palette register and int 10h ;return value in BH mov bl,bh ;get palette register xor bh,bh ;input - BX = color register mov ax,1015h ;read single DAC color register int 10h ;return RGB value in DH,CH & CL pop bx pop ax ret Get_Creg ENDP ; ;R191;--------------------------------------------- ;R191;input : BL = color plane. ;R191; DH = Red register ;R191; CH = Green register ;R191; CL = Blue register ;R191;output: NONE, just set color palette ;R191;destroy: NONE ;R191;NOTE : this rotine only for VGA. ;R191;--------------------------------------------- ;R191 ALIGN 4 ;R191Set_Creg PROC NEAR ;R191 push ax ;R191 push bx ;R191 ;R191 mov ax,1007h ;R191 int 10h ;R191 mov bl,bh ;R191 xor bh,bh ;R191 ;R191 mov ax,1010h ;R191 int 10h ;R191 ;R191 pop bx ;R191 pop ax ;R191 ret ;R191Set_Creg ENDP ; ; ;R139 - start ifdef AMITECH_LOGO NOT_DO_LIGHT_DARK EQU 1 NOT_USE_CBROM_EPALOGO EQU 1 endif; AMITECH_LOGO ;R139 - end ;R203 start ifndef NO_EPA_LOGO ;R203D public Clear_EPA_Area ;R280 Clear_EPA_Area: pushad mov al, ' ' ;empty char mov dh,EPA_Y ;row row_loop0: mov dl,EPA_X ;column mov cx,17 ;row number Next_char0: push bx push cx xor bl,bl ;black color call draw_EPA_logo inc dl pop cx pop bx loop short Next_char0 inc dh cmp dh,10 ;last line? jb short row_loop0 ;No,continue popad ret endif ;NO_EPA_LOGO ;R203D ;R203 end ifndef NO_EPA_LOGO ifdef NOT_USE_CBROM_EPALOGO ;R137 ifndef NOT_DO_LIGHT_DARK ;R139 ;--------------------------------------------- ;Function : From light to dark. ;input : NONE ;output: NONE ;destroy: AX ;NOTE : this rotine only for VGA. ;--------------------------------------------- LD_ADD_COLOR EQU 4 TOP_RED EQU byte ptr [bp] TOP_GREEN EQU byte ptr [bp+1] TOP_BLUE EQU byte ptr [bp+2] BOTTOM_RED EQU byte ptr [bp+3] BOTTOM_GREEN EQU byte ptr [bp+4] BOTTOM_BLUE EQU byte ptr [bp+5] ifdef TMC_AS_LOGO ;R128 Tiger_Logo EQU 1 ;R128 big_logo EQU 1 ;R128 EXTEND_LOGO_COLOR EQU 9 ;R128 BACKGROUND_COLOR EQU 12 ;R128 endif; TMC_AS_LOGO ;R128 ;R52B - start EPA_COLOR_BUFFER = 6 ifdef EXTEND_LOGO_COLOR EXT_LOGO_RED EQU byte ptr [bp+6] EXT_LOGO_GREEN EQU byte ptr [bp+7] EXT_LOGO_BLUE EQU byte ptr [bp+8] EPA_COLOR_BUFFER = 9 ;R52F - start IF EXTEND_LOGO_COLOR EQ 7 CHANGE_COLOR EQU 7 ENDIF ;EXTEND_LOGO_COLOR IF EXTEND_LOGO_COLOR EQ 15 CHANGE_COLOR EQU 15 ENDIF ;EXTEND_LOGO_COLOR IF EXTEND_LOGO_COLOR EQ LIGHTBLUE CHANGE_COLOR EQU LIGHTBLUE ENDIF ;EXTEND_LOGO_COLOR IF EXTEND_LOGO_COLOR EQ LIGHTGREEN CHANGE_COLOR EQU LIGHTGREEN ENDIF ;EXTEND_LOGO_COLOR IF EXTEND_LOGO_COLOR EQ YELLOW CHANGE_COLOR EQU YELLOW ENDIF ;EXTEND_LOGO_COLOR ;R52F - end endif ;EXTEND_LOGO_COLOR ;R52B - ned ;R60 - start ifdef BACKGROUND_COLOR BACKGROUND_RED EQU byte ptr [bp+9] BACKGROUND_GREEN EQU byte ptr [bp+10] BACKGROUND_BLUE EQU byte ptr [bp+11] EPA_COLOR_BUFFER = 12 endif ;BACKGROUND_COLOR ;R60 - ned ifdef KCI_LOGO ;R117 Tiger_Logo EQU 1 ;R117 endif; KCI_LOGO ;R117 endif; NOT_DO_LIGHT_DARK ;R139 endif; NOT_USE_CBROM_EPALOGO ;R137 ALIGN 4 Show_light_dark PROC NEAR test byte ptr EQUIPMENT[bp],DT_MONO jz short @F ret @@: ;R137 - start ifndef NOT_USE_CBROM_EPALOGO ;R203 pushad ;R203 ;R203 mov bh, EPALOGO_HIGH[bp] ;R137B ;R203 inc bh ;R137B ;R203 mov al, ' ' ;R203 mov dh, EPA_Y ;row ;R203row_loop0: ;R203 mov dl, EPA_X ;column ;R203 ;R203 mov cx, 17 ;R203Next_char0: ;R203 push bx ;R137B ;R203 push cx ;R203 mov bl, 0 ;R203 call draw_EPA_logo ;R203 inc dl ;R203 pop cx ;R203 pop bx ;R137B ;R203 loop short Next_char0 ;R203 inc dh ;R203;R137B cmp dh, 10 ;R203 cmp dh, bh ;R137B ;R203 jb short row_loop0 ;R203 ;R203 popad call Clear_EPA_Area ;R203 ret else; NOT_USE_CBROM_EPALOGO ;R139 - start ifdef NOT_DO_LIGHT_DARK ;R203 pushad ;R203 mov al, ' ' ;R203 mov dh, EPA_Y ;row ;R203row_loop0: ;R203 mov dl, EPA_X ;column ;R203 ;R203 mov cx, 17 ;R203Next_char0: ;R203 push cx ;R203 mov bl, 0 ;R203 call draw_EPA_logo ;R203 inc dl ;R203 pop cx ;R203 loop short Next_char0 ;R203 inc dh ;R203 cmp dh, 7 ;R203 jb short row_loop0 ;R203 ;R203 popad call Clear_EPA_Area ;R203 ret else; NOT_DO_LIGHT_DARK ;R139 - end ;R137 - end push ax push bx push cx push dx mov bx,ds shl ebx,16 mov ax,G_RAM mov ds,ax mov al,G_RAM:CON_MODE shl eax,16 mov byte ptr G_RAM:CON_MODE,10h push bp ;R52B sub sp,6 sub sp,EPA_COLOR_BUFFER ;R52B mov bp,sp ifndef PHILIPS_LOGO ;R70 mov bl,TOP_COLOR call Get_Creg mov TOP_RED,dh mov TOP_GREEN,ch mov TOP_BLUE,cl mov bl,BOTTOM_COLOR call Get_Creg mov BOTTOM_RED,dh mov BOTTOM_GREEN,ch mov BOTTOM_BLUE,cl ;R52B - start ifdef EXTEND_LOGO_COLOR ifndef CHANGE_COLOR ;R52FIFE EXTEND_LOGO_COLOR EQ 7 mov bl,EXTEND_LOGO_COLOR call Get_Creg mov EXT_LOGO_RED,dh mov EXT_LOGO_GREEN,ch mov EXT_LOGO_BLUE,cl ;R52Fendif ;EXTEND_LOGO_COLOR EQ 7 endif; CHANGE_COLOR endif ;EXTEND_LOGO_COLOR ;R52B - ends ;R60 - start ifdef BACKGROUND_COLOR mov bl,BACKGROUND_COLOR call Get_Creg mov BACKGROUND_RED,dh mov BACKGROUND_GREEN,ch mov BACKGROUND_BLUE,cl endif ;BACKGROUND_COLOR ;R60 - ends endif ;PHILIPS_LOGO ;R70 mov al,11h mov dl,16 Dec_Inten_Loop: push dx ifndef PHILIPS_LOGO ;R70 ;decrease the intensity of YELLOW color mov dl,01h call Decrease_Intensity ;decrease the intensity of LIGHTGREEN color mov dl,10h call Decrease_Intensity ;R52B - start ifdef EXTEND_LOGO_COLOR ;decrease the intensity of EXTEND_LOGO color mov dl,11h call Decrease_Intensity endif ;EXTEND_LOGO_COLOR ;R52B - end ;R52B - start ifdef BACKGROUND_COLOR ;decrease the intensity of EXTEND_LOGO color mov dl,12h call Decrease_Intensity endif ;BACKGROUND_COLOR ;R52B - end ;R70 - start else ;PHILIPS_LOGO ;R70 ;decrease the intensity of C1 color mov dl,01h call Decrease_Intensity ;decrease the intensity of C2 color mov dl,02h call Decrease_Intensity ;decrease the intensity of C3 color mov dl,03h call Decrease_Intensity ;decrease the intensity of C4 color mov dl,04h call Decrease_Intensity ;decrease the intensity of C5 color mov dl,05h call Decrease_Intensity ;decrease the intensity of C6 color mov dl,06h call Decrease_Intensity ;decrease the intensity of C7 color mov dl,07h call Decrease_Intensity endif ;PHILIPS_LOGO ;R70 ;R70 - end pop dx dec dl jz short @F or al,al jnz short Dec_Inten_Loop @@: shr eax,16 mov G_RAM:CON_MODE,al shr ebx,16 mov ds,bx ;R203 mov al,' ' ;R203 mov dh,EPA_Y ;row ;R203row_loop0: ;R203 mov dl,EPA_X ;column ;R203 mov cl,byte ptr cs:[EPA_pattern+3] ;R203ifndef BIG_LOGO ;R52B ;R203 ifndef PHILIPS_LOGO ;R70 ;R203 mov cx,17 ;R203 else ;PHILIPS_LOGO ;R70 ;R203 mov cx,15 ;R70 ;R203 endif ;PHILIPS_LOGO ;R70 ;R203else ;BIG_LOGO ;R52B ;R203 ifndef Tiger_Logo ;R109 ;R203 ifdef Super_Korea_Logo ;R52D ;R203 mov cx,17 ;R52D ;R203 else ;Super_Korea_Logo ;R52D ;R203 mov cx,16 ;R52B ;R203 endif ;Super_Korea_Logo ;R52D ;R203 else; Tiger_Logo ;R109 ;R203 mov cx,17 ;R109 ;R203 endif; Tiger_Logo ;R109 ;R203endif ;BIG_LOGO ;R52B ;R203Next_char0: ;R203 push cx ;R203 call draw_EPA_logo ;R203 inc dl ;R203 pop cx ;R203 loop short Next_char0 ;R203 inc dh ;R203ifndef BIG_LOGO ;R52B ;R203 ifndef PHILIPS_LOGO ;R70 ;R203 cmp dh,7 ;R203 else ;PHILIPS_LOGO ;R70 ;R203 cmp dh,10 ;R70 ;R203 endif ;PHILIPS_LOGO ;R70 ;R203else ;BIG_LOGO ;R52B ;R203 ifndef Tiger_Logo ;R109 ;R203 ifdef Super_Korea_Logo ;R52D ;R203 cmp dh,10 ;R52D ;R203 else ;Super_Korea_Logo ;R52D ;R203 cmp dh,9 ;R52B ;R203 endif ;Super_Korea_Logo ;R52D ;R203 else; Tiger_Logo ;R109 ;R203 cmp dh,10 ;R109 ;R203 endif; Tiger_Logo ;R109 ;R203endif ;BIG_LOGO ;R52B ;R203 jb short row_loop0 call Clear_EPA_Area ;R203 ifndef PHILIPS_LOGO ;R70 mov dh,TOP_RED mov ch,TOP_GREEN mov cl,TOP_BLUE mov bl,TOP_COLOR call Set_Creg mov dh,BOTTOM_RED mov ch,BOTTOM_GREEN mov cl,BOTTOM_BLUE mov bl,BOTTOM_COLOR call Set_Creg ;R52B - start ifdef EXTEND_LOGO_COLOR ;R52F IF EXTEND_LOGO_COLOR EQ 7 ifdef CHANGE_COLOR mov bl,2 ;R52F ELSE ;EXTEND_LOGO_COLOR EQ 7 else; CHANGE_COLOR mov bl,EXTEND_LOGO_COLOR ;R52F ENDIF ;EXTEND_LOGO_COLOR EQ 7 endif; CHANGE_COLOR mov EXT_LOGO_RED,dh mov EXT_LOGO_GREEN,ch mov EXT_LOGO_BLUE,cl call Set_Creg endif ;EXTEND_LOGO_COLOR ;R52B - end ;R60 - start ifdef BACKGROUND_COLOR mov bl,BACKGROUND_COLOR mov BACKGROUND_RED,dh mov BACKGROUND_GREEN,ch mov BACKGROUND_BLUE,cl call Set_Creg endif ;BACKGROUND_COLOR ;R60 - ends ;R70 - start else ;PHILIPS_LOGO mov dh,0 mov cx,3f3fh mov bl,11 call Set_Creg mov dh,15h mov cx,3f15h mov bl,10 call Set_Creg mov dh,0 mov cx,2a00h mov bl,2 call Set_Creg mov dh,0 mov cx,2a2ah mov bl,3 call Set_Creg mov dh,15h mov cx,1515h mov bl,8 call Set_Creg mov dh,2ah mov cx,0 mov bl,4 call Set_Creg mov dh,3fh mov cx,3f15h mov bl,14 call Set_Creg endif ;PHILIPS_LOGO ;R70 - end ;R52B add sp,6 add sp,EPA_COLOR_BUFFER ;R52B pop bp pop dx pop cx pop bx pop ax ret endif; NOT_DO_LIGHT_DARK ;R139 endif; NOT_USE_CBROM_EPALOGO ;R137 Show_light_dark ENDP ifdef NOT_USE_CBROM_EPALOGO ;R137 ifndef NOT_DO_LIGHT_DARK ;R139 ;[]=============================================================[] ;Input : DL = 01h : To Decrease YELLOW's intensity ; 10h : To Decrease LIGHTGREEN's intensity ; ; AL = current color Intensity status (see output) ; ;Output : if input = 01h ; AL b3-0 : TOP_COLOR's intensity ; 0 = lowest intensity ; i.e. that color has been turned off ; ELSE = not yet turned off ; ; if input = 10h, AL in b7-4 the same meaning of b3-0 ;[]=============================================================[] ALIGN 4 Decrease_Intensity Proc Near test al,dl jz short Dec_Intensity_Exit ifndef PHILIPS_LOGO ;R70 mov bl,TOP_COLOR cmp dl,01h je short @F mov bl,BOTTOM_COLOR ;R52B - start ifdef EXTEND_LOGO_COLOR cmp dl,10h je short @F ;R52F IF EXTEND_LOGO_COLOR EQ 7 ifdef CHANGE_COLOR mov bl,2 ;R52F ELSE ;EXTEND_LOGO_COLOR EQ 7 else; CHANGE_COLOR mov bl,EXTEND_LOGO_COLOR ;R52F ENDIF ;EXTEND_LOGO_COLOR EQ 7 endif; CHANGE_COLOR endif ;EXTEND_LOGO_COLOR ;R52B - end ;R60 - start ifdef BACKGROUND_COLOR cmp dl,11h je short @F mov bl,BACKGROUND_COLOR endif ;BACKGROUND_COLOR ;R60 - end ;R70 - start else ;PHILIPS_LOGO mov bl,11 cmp dl,01h je short @F mov bl,10 cmp dl,02h je short @F mov bl,3 cmp dl,03h je short @F mov bl,8 cmp dl,04h je short @F mov bl,2 cmp dl,05h je short @F mov bl,4 cmp dl,06h je short @F mov bl,14 endif ;PHILIPS_LOGO ;R70 - end @@: mov ah,dl push ax call Get_Creg pop ax mov dl,ah not dl and al,dl not dl or cl,cl jz short @F or al,dl sub cl,LD_ADD_COLOR jnc short @F xor cl,cl @@: or ch,ch jz short @F or al,dl sub ch,LD_ADD_COLOR jnc short @F xor ch,ch @@: or dh,dh jz short @F or al,dl sub dh,LD_ADD_COLOR jnc short @F xor dh,dh @@: call Set_Creg Dec_Intensity_Exit: ret Decrease_Intensity Endp endif; NOT_DO_LIGHT_DARK ;R139 endif; NOT_USE_CBROM_EPALOGO ;R137 draw_EPA_logo: cmp al, 10h jne short @F add al,2 @@: mov ah,2 xor bh,bh ;set page 0 push ax push bx ;R137 int 10h pop bx ;R137 pop ax mov ah, 9 ;R137 - start ifndef NOT_USE_CBROM_EPALOGO push ax mov cx, 1 int 10h pop ax ret else; NOT_USE_CBROM_EPALOGO ;R137 - end ;R52A mov cx,1 ;R52A mov bl,TOP_COLOR ;R52 cmp dh,6 ;R52 jne short @F ;R52A start ifndef AMITECH_LOGO ;R139 ifndef TMC_AS_LOGO ;R128 ifndef BIG_LOGO ;R52B ifndef PHILIPS_LOGO ;R70 mov bl,BOTTOM_COLOR mov cl,byte ptr cs:[EPA_pattern+3] mov ch,cl and cl,0fh shr ch,4 cmp dh,cl je short @F cmp dh,ch je short @F mov bl,TOP_COLOR ;R70 - start else ;PHILIPS_LOGO cmp dh,1 jne short @F mov bl,14 jmp short SET_COLOR_OK @@: cmp dh,2 jne short @F mov bl,8 cmp dl,64 je short SET_COLOR_OK mov bl,4 jmp short SET_COLOR_OK @@: cmp dh,3 jne short @F mov bl,3 cmp dl,67 ja short SET_COLOR_OK mov bl,2 cmp dl,64 ja short SET_COLOR_OK mov bl,8 jmp short SET_COLOR_OK @@: cmp dh,4 jne short @F mov bl,3 jmp short SET_COLOR_OK @@: mov bl,10 cmp dh,5 jne short @F cmp dl,65 jb short SET_COLOR_OK cmp dl,67 ja short SET_COLOR_OK mov bl,3 jmp short SET_COLOR_OK @@: cmp dh,6 je short SET_COLOR_OK cmp dh,7 je short SET_COLOR_OK @@: mov bl,11 SET_COLOR_OK: endif ;PHILIPS_LOGO ;R70 - end ;R52B - start else ;BIG_LOGO ifndef Tiger_Logo ;R109 ifndef SUPER_KOREA_LOGO ;R52F mov bl,TOP_COLOR mov cl,byte ptr cs:[EPA_pattern+3] shr cl,4 cmp dh,cl jb short @F mov bl,BOTTOM_COLOR mov cl,byte ptr cs:[EPA_pattern+3] and cl,0fh cmp dh,cl jb short @F ifndef BACKGROUND_COLOR ;R60 IF EXTEND_LOGO_COLOR EQ 7 mov bl,2 ELSE ;EXTEND_LOGO_COLOR EQ 7 mov bl,EXTEND_LOGO_COLOR ENDIF ;EXTEND_LOGO_COLOR EQ 7 else ;BACKGROUND_COLOR ;R60 cmp al,' ' je short @F cmp dl,65 je short BLACK_COLOR cmp dl,70 je short BLACK_COLOR IF EXTEND_LOGO_COLOR EQ 7 mov bl,(BACKGROUND_COLOR SHL 4) + 2 ELSE ;EXTEND_LOGO_COLOR EQ 7 mov bl,(BACKGROUND_COLOR SHL 4) + EXTEND_LOGO_COLOR ENDIF ;EXTEND_LOGO_COLOR EQ 7 jmp short @F BLACK_COLOR: mov bl,(BACKGROUND_COLOR SHL 4) jmp short @F endif ;BACKGROUND_COLOR ;R60 ;R52F - start else; SUPER_KOREA_LOGO mov bl,2 cmp dh,1 je short @F cmp dh,2 je short @F cmp dh,3 je short @F jmp short SET_COLOR_OK @@: mov bl,12 cmp dl,69 jb short SET_COLOR_OK mov bl,9 cmp dl,69 ja short SET_COLOR_OK mov bl,14 Set_Color_OK: endif; SUPER_KOREA_LOGO ;R52F - end else; Tiger_Logo ;R109 mov bl,EXTEND_LOGO_COLOR ;R109 endif; Tiger_Logo ;R109 endif ;BIG_LOGO ;R128 - start else; TMC_AS_LOGO mov bl, EXTEND_LOGO_COLOR cmp dh, 5 jb short SET_COLOR_OK cmp dl, 67 jb short SET_COLOR_OK mov bl, BACKGROUND_COLOR Set_Color_OK: endif; TMC_AS_LOGO ;R139 - start else; AMITECH_LOGO mov bl, 0 cmp al, ' ' je short SET_COLOR_OK mov bl, 8 cmp dh, 1 je short SET_COLOR_OK cmp dh, 6 je short SET_COLOR_OK mov bl, 078h cmp dl, 60 je short SET_COLOR_OK cmp dl, 76 je short SET_COLOR_OK mov bl, 070h cmp dl, 73 je short SET_COLOR_OK mov bl, 071h cmp dh, 2 je short SET_COLOR_OK cmp dh, 4 je short SET_COLOR_OK mov bl, 070h cmp dh, 5 je short SET_COLOR_OK mov bl, 071h cmp dl, 67 jb short SET_COLOR_OK cmp dl, 68 ja short SET_COLOR_OK mov bl, 074h SET_COLOR_OK: endif; AMITECH_LOGO ;R139 - end ;R128 - end ;R52B - end ;R52A end ;R52A cmp dh,byte ptr cs:[EPA_pattern+3] ;R52 ;R52A jb short @F ;R52 ;R52A mov bl,BOTTOM_COLOR @@: mov cx,1 ;R52A push ax int 10h pop ax ret endif; NOT_USE_CBROM_EPALOGO ;R137 endif ;NO_EPA_LOGO endif; ;R174EPA_LOGO_Switch endif; Graphics_Post ;R185 ;R185endif ;FULL_SCREEN_LOGO ;R200 - starts ifdef Quiet_Post_Support Public Ck_Quiet_Post Ck_Quiet_Post Proc near pusha extrn Quiet_POST_Item:near mov si, offset DGROUP:Quiet_POST_Item call F000_GetItem_Value clc or al, al jz short @f stc @@: popa ret Ck_Quiet_Post Endp endif ;Quiet_Post_Support ;R200 - ends ;[]==============================================================[] ; ;LOOK_V_ROM: ; ; Check to see if a video ROM is present. ; ;Saves: ES ;Destroys: AX,BX,CX,DX,SI ; ;Entry: NONE ;Exit: Z 0 = No video ROM found, 1 = Video ROM found ; BX returne Video Seg ; ;[]==============================================================[] ALIGN 4 PUBLIC LOOK_V_ROM LOOK_V_ROM PROC NEAR push es mov cx,0aa55h ; pattern to check for - v2.09 ;Scan slot video ROM mov bx,0C000h ; 1st: check at C000 area mov dx,0C800h call Look_V_RomA ; video ROM at C000h? jz lvr_91 ; yes... ;---- Scan onboard VGA rom push ds mov ax,CompressVga_Seg mov ds,ax cmp word ptr ds:[0],0aa55h ;have onboard VGA jne short @F public CompressVga_Seg CompressVga_Seg EQU 7000h ;R07 - starts ifdef PCI_BUS push ds mov si, CompressVga_Seg call Move_VGA_BIOS_To_C000 pop ds else ;PCI_BUS ;R07 - ends ;R33 F000_call C000_Shadow_RW ;enable C000 shadow writeable call F_C000_Shadow_RW ;C000 shadow writeable ;R33 mov si,CompressVga_Seg ;source area mov di,0c000h ;destination area mov cl,ds:[2] shl cx,8 call E000_Move_Codes ;R72 ;R72 F000_call Move_Codes call F_C000_Shadow_R ;C000 shadow Read-only ;R33 ;R33 F000_call C000_Shadow_R ;enable C000 shadow readonly endif ;PCI_BUS ;R07 pop ds mov bx,0c000h ; returne Video Seg mov dx,0c800h ; end VGA rom seg xor al,al ; Set ZF = 1, Video found jmp short lvr_91 ; yes... @@: pop ds ;------------------------------ or bx,bx jmp short lvr_91 Look_V_ROMa LABEL NEAR push es xor si,si lvr_1: mov es,bx mov ax,es:[si] IODELAY ; bus settle cmp ax,cx ; check for pattern - v2.09 je short lvr_91 add bx,80h cmp bx,dx jb short lvr_1 or bx,bx ; set zf = 0 lvr_91: ; set zf = 1 from je above pop es ret LOOK_V_ROM ENDP ;R106 ;R07 - starts ;R106 ifdef PCI_BUS ;R106 ;[]---------------------------------------------------------------[] ;R106 ; Input : si = segment contain the VGA BIOS ;R106 ;[]---------------------------------------------------------------[] ;R106 Public Move_VGA_BIOS_To_C000 ;R106 Move_VGA_BIOS_To_C000 Proc Near ;R106 ;R106 push si ;R106 ;R08 F000_call C000_Shadow_W ;R106 ;R33 F000_call C000_Shadow_RW ;R08 ;R106 call F_C000_Shadow_RW ;R33 ;R106 mov di,0C000h ;R106 mov cx,4000h ;32k to move ;R106 call E000_Move_Codes ;R72 ;R106 ;R72 F000_call Move_Codes ;R106 ;R08 F000_call C000_Shadow_R ;R106 ;R106 ; Do not write protect C000 segment to meet the PCI spec. ;R33 ;R106 ;R106 ;R33 F000_call C000_Shadow_R ;R08A ;R106 pop si ;R106 ;R106 mov ds, si ;R106 ;R106 mov al,byte ptr ds:[2] ;R08A ;R106 mov byte ptr VGA_BIOS_LENGTH[bp],al ;R08A ;R106 ;R106 cmp byte ptr ds:[2], 40h ;VGA BIOS size =< 32k ;R106 jbe VgaBios32k ;yes, skip the following ! ;R106 ;R106 ;----- Copy the rest of the VGA codes other than 32k ----- ;R106 ;R106 push si ;R106 ;R33 F000_call C000_Shadow_RW ;R08A ;R106 call F_C000_Shadow_RW ;R33 ;R106 F000_call Ct_C8_To_DF_RW ;enable shadow R/W ;R106 mov cl, ds:[2] ;get code size to copy ;R106 sub cl, 40h ;code size other than 32k ;R106 xor ch, ch ;R106 shl cx, 8 ;in terms of word ;R106 add si, 800h ;starting from 32k ;R106 mov di, 0C800h ;copy to C800:0 ;R106 call E000_Move_Codes ;R72 ;R106 ;R72 F000_call Move_Codes ;go copy code ! ;R106 pop si ;R106 ;R106 call Record_Resource_For_Big_VGA ;R106 ;R106 ;--- trying to disable the shadow not used for VGA bios ----- ;R106 ;R106 shr cx, 4 ;R106 ;R106 KeepDisShd: ;R106 ;R106 pusha ;R106 F000_call Ct_Disable_Shadow ;R106 popa ;R106 add dh, ch ;R106 cmp dh, 0E0h ;R106 jne short KeepDisShd ;R106 ;R106 ;----------------------- ;R106 ;R106 VgaBios32k: ;R106 ;R106 ret ;R106 ;R106 Move_VGA_BIOS_To_C000 Endp ;R106 ;R106 ;----------------------------------------------------- ;R106 ;input : si : VGA ROM image location ;R106 ;output : dx : upper boundary addr for VGA ;R106 ; cx : shadow unit = 8000h/4000h ;R106 ;----------------------------------------------------- ;R106 Public Record_Resource_For_Big_VGA ;R106 Record_Resource_For_Big_VGA Proc Near ;R106 ;R106 mov ds, si ;R106 mov bl, ds:[2] ;VGA BIOS size ;R106 cmp bl, 40h ;VGA BIOS size =< 32k ;R106 jbe short _JBRDE ;no ! ;R106 ;R106 F000_call Ct_Shadow_Unit ;check chipset for shadow unit size ;R106 mov dx, 0D000h ;disable shadow: starting from D000 ;R106 cmp ch, 80h ;shadow unit 32k ? ;R106 je short @F ;yes ! ;R106 cmp bl, 60h ;VGA BIOS >= 48k ? ;R106 ja short @F ;yes ! ;R106 mov dh, 0CCh ;disable shadow: starting from CC00 ;R106 @@: ;R106 ;----------------------- ;R106 ;R106 mov eax, 0Fh ;assume C800-CBFF used ;R106 cmp dh, 0CCh ;really the case ? ;R106 je short @F ;yes ! ;R106 mov al, 0FFh ;CC00-CFFF also used ! ;R106 @@: ;R106 or LMEM_RESOURCE[bp], eax ;update resources ;R106 _JBRDE: ;R106 ret ;R106 ;R106 Record_Resource_For_Big_VGA Endp ;R106 ;R106 ;R08A - start ;R106 ;[]================================================================[] ;R106 ;Release_Shadow_From_PCI_VGA: ;R106 ; This routine is used to check if VGA BIOS has been condensed ;R106 ; after VGA BIOS had been initialed. And reprepare LMEM_RESOURCE[bp] ;R106 ;[]================================================================[] ;R106 ALIGN 4 ;R106 public Release_Shadow_From_PCI_VGA ;R106 Release_Shadow_From_PCI_VGA proc near ;R106 ;R106 pushad ;R106 push ds ;R106 push dword ptr LMEM_BEFORE_ROM[bp] ;R106 ;R106 mov cl,byte ptr VGA_BIOS_LENGTH[bp] ;R106 ;R106 cmp cl,40h ;R106 jbe RePrepare_Exit ;R106 ;R106 mov ax,0C000H ;R106 push ax ;R106 pop ds ;R106 ;R106 mov ch,ds:[2] ;R106 cmp ch,40h ;R106 jae short @f ;R106 mov ch,40h ;R106 @@: ;R106 sub cl,ch ;R106 test cl,07 ;R106 jz short @f ;R106 add cl,8 ;R106 @@: ;R106 shr cl,3 ;R106 mov eax, 0FFFFFFFFh ;R106 shl eax, cl ;R106 sub ch, 40h ;R106 test ch, 07 ;R106 jz short @f ;R106 add ch, 08 ;R106 @@: ;R106 shr ch, 3 ;R106 mov cl, ch ;R106 rol eax, cl ;R106 and LMEM_RESOURCE[bp], eax ;R106 and LMEM_BEFORE_ROM[bp], eax ;R106 xor si, si ;R106 ;R106 F000_call Disable_Unused_Shadow ;R106 ;R106 RePrepare_Exit: ;R106 pop dword ptr LMEM_BEFORE_ROM[bp] ;R106 mov eax, LMEM_BEFORE_ROM[bp] ;R106 or LMEM_RESOURCE[bp], eax ;R106 pop ds ;R106 popad ;R106 ret ;R106 Release_Shadow_From_PCI_VGA endp ;R106 ;R08A - end ;R106 ;R106 endif ;PCI_BUS ;R106 ;R07 - ends ;[]==============================================================[] ; ;CK_FOR_VID: ; ; Check to see what type of video memory is present. ; ;Saves: AX,BX,ES ; ;Entry: NONE ;Exit: CH bit 0 = indicates mono memory and 6845 found (B000h/3b4h) ; bit 1 = indicates color memory and 6845 found (B800h/3d4h) ; ;[]==============================================================[] ALIGN 4 PUBLIC CK_FOR_VID CK_FOR_VID PROC NEAR push ax push bx push es mov dx,3d4h ; color index reg mov ax,0b800h ; do color video ram address 1st mov bx,4000 ; decimal offset into color memory mov cx,02 ; clear ch and set cl for 2 iteration ; loop count chk_vid_lp: mov es,ax mov word ptr es:[bx],0a5a5h ; verify data at non-display mov word ptr es:[bx+2],0 ; video ram, change bus state cmp word ptr es:[bx],0a5a5h ; data correct? mov word ptr es:[bx],720h ; space it out jne short no_vid ; video ram not exist vid_mem: mov al,0fh ; see if 6845 is around out dx,al ; set vid index to cursor reg inc dx NEWIODELAY in al,dx xchg al,ah ; save current cursor value mov al,0a5h out dx,al NEWIODELAY in al,dx cmp al,0a5h ; see if reg exists xchg al,ah out dx,al ; restore old value jne short no_vid ; no reg found or ch,cl ; mem and cursor reg ; exists so set approp bit no_vid: mov ax,0b000h ; set ax to 0b000 mono mem address mov dl,0b4h ; mono index reg address mov bh,20 ; decimal mono offset into memory dec cl jnz short chk_vid_lp ; go check for mono ck_for_vid_end: pop es pop bx pop ax ret CK_FOR_VID ENDP ;[]==============================================================[] ; ;GET_SWITCH: ; ; Read input port from keyboard to get switch settings. ; ;Saves: NONE ;Destroys: AX,BX,CX ; ;Entry: NONE ;Exit: C Set if fails/timeout ; AL Switch value (bit 7 = Inhibit (1 = Not inhibited) ; 6 = Display switch (0=Color/1=Mono) ; 5 = Manufacture jumper (0=Manufacture/1=Normal) ; 4 = RAM size (?) ; 3 = Reserved ; 2 = Reserved ; 1 = Auxiliary Data Input (4.0) ; 0 = Keyboard Data Input (4.0)) ; ;Note: 1. This routine flushes all keys from output buffer. ; ;[]==============================================================[] ALIGN 4 PUBLIC GET_SWITCH GET_SWITCH PROC NEAR cli ; ; Clear output buffer ; xor cx,cx ; clear output buffer first mov bx,0ff0fh ; re-tries for compaq, bh=ff ALIGN 4 gswt_s1: NEWIODELAY in al,STAT8042 ; flush keystrokes test al,OBF_8042 ; output buffer empty? jz short gswt_s2 ; jump if so NEWIODELAY in al,DATA8042 ; clear buffer loop short gswt_s1 jmp short gswt_s5 ; time out, buffer not clear ; ; Read 8042 input port ; gswt_s2: mov al,0c0h ; read input port call F000_Out_8042 call F000_Out_8042_Full ; data ready? gswt_s4: in al,DATA8042 ; read input port data cmp al,bh ; should force one retry je short gswt_s6 mov bh,al ; two tries at least xor cx,cx loop short $ ; delay between commands dec bl jnz short gswt_s2 ; retry... gswt_s5: stc ; too many re-tries gswt_s6: sti ret GET_SWITCH ENDP ;[]==============================================================[] ; ;POST_14S: ; ; If CGA or Mono, test the video memory. ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ; Note: 1. If this POST is moved, then the EARLY_TRY_SHADOW ; section in ATBASE will also need to be moved. ; ;[]==============================================================[] PUBLIC POST_14S ALIGN 4 POST_14S PROC NEAR ifdef PCI_BUS ;R240 xcall Patch_LanBoot ;R240 endif; PCI_BUS ;R240 ;M01 ;r143 start ;M01 ifdef RPB_ENABLED ;M01 extrn rpb_access:near ;M01 call rpb_access ; Initialize RPB interface ;M01 endif ; RPB_ENABLED ;M01 ;r143 end ;R26B ifndef P6_BIOS_ONLY ;R26B F000_call Init_Apic ;R26B endif; P6_BIOS_ONLY ifdef Special_for_Weitek ;R01 f000_call Weitek_Share_Vga_GCLK ;R01 endif ;Special_for_Weitek ;R01 mov ax,G_RAM mov ds,ax cmp word ptr ds:USER_REBOOT, CTRL_ALT_DEL ; if warm boot, skip test and je short p14_41 ; display sign on message mov al,EQUIPMENT[bp] and al,DISPLAY_TYPE ; EGA/VGA in CMOS? shr al,4 jz short p14_4 ; yes, skip test... ; ; Find which memory to test ; call Ck_For_Vid or ch,ch jz p14_8 ; no video, skip all p14_1: test ch,1 ; test mono memory? jz short p14_2 ; no, color mov ax,0b000h ; mono RAM mov dx,3b8h ; mono I/O call Test_Video_RAM jnc short p14_2 ; mono memory is OK. and ch,00000010b ; monochrome memory error... p14_2: test ch,2 ; test color memory? jz short p14_3 ; no, check for errors mov ax,0b800h ; color RAM mov dx,3d8h ; color I/O call Test_Video_RAM jnc short p14_4 ; display POST logo... p14_3: test ch,1 ; no color, do we have monochrome? jnz short p14_4 ; yes, show POST logo mov dx,0102h ; video error if no good memory ;R65A F000_call Report_Err_WSpkr call Report_Err_WSpkr ;R65A ;r143 start ifdef RPB_ENABLED ifndef RPB_NOVIDEO extrn rpb_register_error:proc mov dx,RPB_BAD_VID_MEM ; video card has bad memory call rpb_register_error ; save error in BDA for RPB endif ; RPB_NOVIDEO endif ; RPB_ENABLED ;r143 end p14_31: jmp Post14_Exit ; ; Beep speaker and display POST logo ; p14_4: ifndef Beep_Before_Boot ;R45 mov bl,1 ;R133AIF BIOS_SUPPORT_586 ;R133 ;R133A call Check_K6_CPU ;R133 ;R133A jne short Short_Beep_Sure ;R133 ;R133A mov bl,30h ;R133 ;R133AShort_Beep_Sure: ;R133 ;R133AENDIF ;BIOS_SUPPORT_586 ;R133 ifndef NO_POST_BEEP call E000_Snd_Spkr ;R72 endif; NO_POST_BEEP ;R72 F000_call Snd_Spkr endif ;Beep_Before_Boot ;R45 p14_41: ifdef LCD_CRT_OPTION ;R24 ifdef ONBOARD_PCI_VGA ;R163 cmp byte ptr PCI_VGA_INFO[bp],(ONBOARD_PCI_VGA) SHL 3 ;R163 jne short @f ;R163 endif ;ONBOARD_PCI_VGA ;R163 Call Set_SimulScan ;R24 @@: ;R163 endif ;LCD_CRT_OPTION ;R24 ifdef PM_SUPPORT F000_call Cfg_Video_Mode endif; PM_SUPPORT ;M01 - starts ;moved rpb_access call to here ifdef RPB_ENABLED extrn rpb_access:near call rpb_access ; Initialize RPB interface endif ;RPB_ENABLED ;M01 - ends ifdef VSA_VGA ;R119 mov al,TRUE ;R119 call F000_Cpu_Cache ;R119 ifndef No_TV_Output_Support ;R119B extrn Early_TV_Init:near ;R119B call Early_TV_Init ;R119B endif ;No_TV_Output_Support ;R119B ifdef DSTN_9210_Support ;R233 call far ptr New_DSTN_Panel ;R233 ;set DSTN timing endif ;DSTN_9210_Support ;R233 endif ;VSA_VGA ;R119 F000_call User_Begin ; set up user-interface routines ;R243 - start ifdef CUSTOM_POST_MSG_SUPPORT ;R243A - start ifdef MSG_CMOS mov si,offset PostMsgSelectItem ;get CMOS value call F000_GetItem_Value or al,al ;Normal POST ? jnz short NormalPostMsg endif; MSG_CMOS ;R243A - end ;Display custom entering setup message lea si, EnterSetup_Msg call Disp_Str_In_BIOS1 ;replace INT 10H vector with dummy IRET to bypass all display mov ax,G_RAM mov es,ax ASSUME ES:G_RAM lea ax,IRET_Vect ;offset address mov word ptr es:[Int10],ax mov ax, 0F000H ;segment address mov word ptr es:[Int10+2],ax NormalPostMsg: ;R243A endif; CUSTOM_POST_MSG_SUPPORT ;R243 - end mov ax,0f000h mov ds,ax ; ds = DGROUP ;R174A ifdef PM_SUPPORT if EPA_LOGO_Switch ;R174A ;r143 start ifdef RPB_ENABLED extrn rpb_block:near call rpb_block ; signal RPB to turn off for logo endif ; RPB_ENABLED ;r143 end call show_color_logo ifdef Graphics_Post ;R185E call Show_Graphics_Award ;R185E endif ;Graphics_Post ;R185E ;r143 start ifdef RPB_ENABLED extrn rpb_unblock:near call rpb_unblock ; signal RPB to turn back on endif ; RPB_ENABLED ;r143 end endif; R174A EPA_LOGO_Switch ifndef PCCHIP ;R185ifdef EPA_LOGO_Use_Graphics ;R181 mov dx,1800h ;R185C ifdef Graphics_Post ;R185 ;R185C mov dx,1d00h ;R181 test byte ptr Monochrome[bp],1;R181color? ;R185C jnz short @F ;R181no. jz short @F ;R185Cno. cmp byte ptr EPALOGO_FLAG[bp], 055h ;R185C;change msg for show str je short @f ;R185C mov dx,1d00h ;R185C endif; Graphics_Post ;R185 ;R185endif; EPA_LOGO_Use_Graphics ;R181 ;R185C mov dx,1800h @@: ;R181 call F000_Cursor_Set ifdef NO_BIOS_DATE_CODE_DISPLAY ;R262 mov si, offset Bios_Inform_Str+12 ;skip BIOS date code ;R262 call F000_Display_String ;display ;R262 else; NO_BIOS_DATE_CODE_DISPLAY ;R262 mov si,offset Bios_Inform_Str+1 ;chipset info. call Disp_Str_In_BIOS endif; NO_BIOS_DATE_CODE_DISPLAY ;R262 endif ;PCCHIP mov dx,0100h ;start from line 1 ;R181ifndef FULL_SCREEN_LOGO ;R174B ifdef PM_SUPPORT ;R181if EPA_LOGO_Switch ;R174B ;R185if Mono_Card_support ;R181 test byte ptr Monochrome[bp],1 ;color? jz short @F ;no. mov dl,3 ;start column 3 @@: ;R181endif; ;R174B EPA_LOGO_Switch ;R181endif ;FULL_SCREEN_LOGO ;R185endif; Mono_Card_support ;R181 push dx call F000_Cursor_Set mov si,offset Sign_On_Msg+1 call Disp_Str_In_BIOS ifdef PM_SUPPORT ifndef NO_EPA_LOGO mov si,offset PM_Sign_On_Msg call Disp_Str_In_POST endif ;NO_EPA_LOGO endif; PM_SUPPORT pop dx inc dh call F000_Cursor_Set mov si,offset Copyright_Msg+1 call Disp_Str_In_BIOS call F000_Vcrlf call F000_Vcrlf mov si,offset Eval_Msg+1 call Disp_Str_In_BIOS call F000_Vcrlf ifdef New_Swap_Fdd_Method ;R217 mov si,offset Eval_Msg+1 ;R217 call Disp_Str_In_BIOS ;R217 call F000_Vcrlf ;R217 endif ;New_Swap_Fdd_Method ;R217 ;R181 - start ;R185ifdef EPA_LOGO_Use_Graphics ;R185Eifdef Graphics_Post ;R185 ;R185E ;Check Full screen or EPA logo ;R185 ;R185E cmp byte ptr EPALOGO_FLAG[bp], 0aah ;R185;check is not EPALOGO ;R185E jne short @f ;R185 ;R185E push ds ;R185Eifndef FPINSTALL_IN_XGROUP ;R185E mov ax, 0e000h ;E000 Segment ;R185Eelse; FPINSTALL_IN_XGROUP ;R185E mov ax, Xgroup_Segment ;XGROUP Segment ;R185Eendif; FPINSTALL_IN_XGROUP ;R185E mov ds, ax ;R185E mov si, offset Award_Mark_Font ;R185E mov bl,ATTRIBUTE[bp] ;R185E push bx ;R185E mov byte ptr ATTRIBUTE[bp],AWARDLOGO_COLOR ;R185E mov dx, 101h ;R185E call Show_Graphics_Font ;R185E call Show_Graphics_Font ;R185E mov dx,200h ;R185E call Show_Graphics_Font ;R185E call Show_Graphics_Font ;R185E call Show_Graphics_Font ;R185E pop bx ;R185E mov ATTRIBUTE[bp],bl ;R185E pop ds ;R185E @@: ;R185 ;R185Eendif; Graphics_Post ;R185 ;R185endif; EPA_LOGO_Use_Graphics ;R181 - end ;R70B - start ifdef PHILIPS_LOGO jmp short SHOW_PHILIPS_LOGO wait_1sec: mov ah,86h mov cx, 200000 / 65535 mov dx, 200000 mod 65535 int 15h ret SHOW_PHILIPS_LOGO: call wait_1sec mov bl,10 mov dh,0h mov cx,2a00h call Set_Creg call wait_1sec mov bl,3 mov dh,0 mov cx,2A2Ah call Set_Creg mov bl,8 mov dh,0h mov cx,2a00h call Set_Creg mov bl,4 mov dh,2ah mov cx,0 call Set_Creg call wait_1sec mov bx,2 mov dh,3fh mov cx,3f15h call Set_Creg call wait_1sec mov bl,14 mov dh,3fh mov cx,3f15h call Set_Creg call wait_1sec mov bl,14 mov dh,0 mov cx,0 call Set_Creg call wait_1sec mov bl,14 mov dh,3fh mov cx,3f15h call Set_Creg call wait_1sec mov bl,14 mov dh,0 mov cx,0 call Set_Creg call wait_1sec mov bl,14 mov dh,3fh mov cx,3f15h call Set_Creg ;R93A ifndef ALWAUS_SHOW_CPU_TYPE ;R93 ;R93A ALWAUS_SHOW_CPU_TYPE EQU 1 ;R93 ;R93A endif; ALWAUS_SHOW_CPU_TYPE ;R93 ifndef ALWAYS_SHOW_CPU_TYPE ;R93A ALWAYS_SHOW_CPU_TYPE EQU 1 ;R93A endif; ALWAYS_SHOW_CPU_TYPE ;R93A endif ;PHILIPS_LOGO ;R70B - end ;R137 - start ifndef Graphics_Post ;R185 ifndef NOT_USE_CBROM_EPALOGO ifndef NO_SHOW_CPU_TYPE_IF_NO_EPA_LOGO ;R260 push es mov ax, 4000h push ax pop es mov al, es:[1] mov EPALOGO_HIGH[bp], al ;R137B cmp al, 8 pop es ja short alway_show_cpu_type endif; NO_SHOW_CPU_TYPE_IF_NO_EPA_LOGO ;R260 endif; NOT_USE_CBROM_EPALOGO endif; Graphics_Post ;R185 ;R137 - end ;R93A ifndef ALWAUS_SHOW_CPU_TYPE ;R93 ifndef ALWAYS_SHOW_CPU_TYPE ;R93A call Check_Warm_Boot je short @F endif; ALWAYS_SHOW_CPU_TYPE ;R93A ;R93A endif; ALWAUS_SHOW_CPU_TYPE ;R93 alway_show_cpu_type: ;R137 ifdef Quiet_Post_Support ;R200 call Ck_Quiet_Post ;R200 jc short _JNAEq ;R200 F000_Call Cursor_Off ;R200 jmp short @F ;R200 _JNAEq: ;R200 endif ;Quiet_Post_Support ;R200 call F000_Vcrlf call CPU_Display call Disp_Str_In_POST ;R89 - starts call Disp_Extra_CPU_Info ifndef NO_CPU_CLOCK_DISPLAY ;R273 IF BIOS_SUPPORT_586 ;R89A cmp byte ptr CPU_LEVEL[bp], LEVEL_586 ;R89A jne short _OLK ;R89A cmp byte ptr CPU_BRAND[bp], CPU_BRAND_INTEL ;R89A je short _OLK ;R89A call Check_K6_CPU ;R90 ;R89A je short _OLK ;R90 ;R89A mov al,"-" ;R89A call F000_Display_Char ;R89A call Try_Show_PRating ;R89A - starts mov di, 1 ;show '-' call Try_Show_PRating ;show p-rating for K5 & M1 jc short _OLK ;show p-rating not successful ;R89A - ends ifndef DISP_MHZ_FOR_AMD_CYRIX mov si, offset CPU_Type_Clk1 call Disp_Str_In_POST jmp short PPP_OLK endif ;DISP_MHZ_FOR_AMD_CYRIX _OLK: ENDIF ;BIOS_SUPPORT_586 ifdef Elan400 ;R250 mov si, offset Elan_CPU ;R250 call Disp_Str_In_POST ;R250 endif ;Elan400 ;R250 mov si, offset CPU_Type_Clk call Disp_Str_In_POST ;R145 call SysCfg_CPU_Clock1 Xcall SysCfg_CPU_Clock1 ;R145 PPP_OLK: endif; NO_CPU_CLOCK_DISPLAY ;R273 call F000_Vcrlf @@: ;R89 - ends ;R89 call Disp_Intel_S_CPU ;R89 ifdef NO_CPU_CLOCK_DISPLAY ;R89 mov si,offset CPU_Type_Clk1 ;R89 call Disp_Str_In_POST ;R89 ;R89 else; NO_CPU_CLOCK_DISPLAY ;R89 ;R89 ifdef NO_CPU_CLOCK_FOR_6X86 ;R51 ;R89 call Check_M1_Cpu ;R51 ;R89 jne short Not_CyM1Cpu ;R51 ;R89 mov si,offset CPU_Type_Clk1 ;R51 ;R89 call Disp_Str_In_POST ;R51 ;R89 jmp short CpuClock_Exit ;R51 ;R89 Not_CyM1Cpu: ;R51 ;R89 endif; NO_CPU_CLOCK_FOR_6X86 ;R51 ;R89 mov si,offset CPU_Type_Clk ;R89 call Disp_Str_In_POST ;R89 call SysCfg_CPU_Clock1 ;R89 CpuClock_Exit: ;R51 ;R89 endif; NO_CPU_CLOCK_DISPLAY ;R89 call F000_Vcrlf ;R89 ;R89 @@: p14_8: ;R198 IFDEF NoteBook_Power_Management if STD_Function EQ 1 ;R198 ;R31 F000_Call Check_0V_Resume Call F000_Check_0V_Resume ;R31 jnz short Post14_Exit endif ;STD_Function EQ 1 ;R198 ;R198 ENDIF ;NoteBook_Power_Management ;R218 start ifdef VSA_VGA ifdef S2D_SUPPORT call FCheck_VSA_resume jnz short Post14_Exit endif ;S2D_SUPPORT endif ;VSA_VGA ;R218 end ifdef HPM_Support ;R176A call FCheck_HPM_Resume ;R176A jnz short Post14_Exit ;R176A endif ;HPM_Support ;R176A ;M01 - starts ifdef RPB_USE_VT100_KEYS_FOR_PS ; extrn rpb_display_continue_msg:near ; call rpb_display_continue_msg ; jnc Post14_Exit ; endif ; RPB_USE_VT100_KEYS_FOR_PS ; ;M01 - ends ifdef Graphics_Post ;R185B mov si,offset To_Enter_Setup1 ;R185B test byte ptr EQUIPMENT[bp],DT_MONO ;R185B jnz short @F ;R185B cmp byte ptr EPALOGO_FLAG[bp], 055h ;R185C;change msg for show str je short @f ;R185C endif; Graphics_Post ;R185B mov si,offset To_Enter_Setup @@: ;R185B call Disp_Str_In_BIOS1 Post14_Exit: ;R270 ifdef CLEAR_PASSWORD_SUPPORT ;R270 F000_call Ck_Password_Switch ;R270 endif; CLEAR_PASSWORD_SUPPORT call Try_Shadow ; if no shadow, just RET ;--------------------------------------------------------------------------- ;Clean any unexpected data in keyboard's output buffer ;so that: 1. the KB200 works properly with a PS2 mouse attached ; (ESC key fail to skip memory testing) ; 2. any DEL key pressed before screen comes up will not cause the ; BIOS to enter CMOS Setup ;--------------------------------------------------------------------------- mov ax,G_RAM mov ds,ax ASSUME DS:G_RAM pushf sti xor cx,cx Cln_KB_Buf: in al,60h NEWIODELAY loop short Cln_KB_Buf and INIT_ERR_FLG,NOT (IEF_SETUP_OK+IEF_TO_ENTER_SETUP) ifdef Bootblock_16K_Support ;R188 ifdef Automatic_Load_Awdflash ;R188 ifNdef No_Automatic_Load_Awdflash_InPOST ;R225 and INIT_ERR_FLG,NOT IEF_AWDFLASH_OK ;R188 endif ;No_Automatic_Load_Awdflash_InPOST ;R225 endif ;Automatic_Load_Awdflash ;R188 endif ;Bootblock_16K_Support ;R188 mov dword ptr PTR_KBD_BUF_HD,01e001eh popf clc ret POST_14S ENDP ;R243 - start ifdef CUSTOM_POST_MSG_SUPPORT ;R234A - start EnterSetup_Msg: ifdef MSG_LOCATION ;R243B POS <,0,MSG_LOCATION> ;cursor position;R243B else; MSG_LOCATION ;R243B POS <,0,0> ;cursor position endif; MSG_LOCATION ;R243B ;R243C db V_NORMAL,'System Initialization, Please Wait.....' ;R243C - start ifndef CUSTOM_POST_MSG CUSTOM_POST_MSG EQU 'System Initialization, Please Wait.....' endif; CUSTOM_POST_MSG db V_NORMAL,CUSTOM_POST_MSG ;R243C - end db 0 ;R234A - end endif; CUSTOM_POST_MSG_SUPPORT ;R243 - end ;R174ifdef PM_SUPPORT if EPA_LOGO_Switch ;R174 ;[]==============================================================[] ; ; SHOW_COLOR_LOGO: ; ; Display Award Logo & "Award software inc." string ; ;Entry: NONE ; ;Exit: NONE ; ;Destroys: ALL ; ;Author: Award ;Date: 06/17/93 ; ; Name | Date | Description ; --------------------------------------------------------------- ; DNL | 17-Jun-93 | Initial revision ; ;[]==============================================================[] ;R185ifndef FULL_SCREEN_LOGO ;R185ifndef Graphics_Post ;R185 EPA_X EQU 60 EPA_Y EQU 1 CHAR_Buff_size EQU 16 CHAR_START_BYTE EQU 0 CHAR_SIZE EQU 13 TOP_COLOR EQU YELLOW ifdef EPA_BOTTOM_COLOR ;R52 BOTTOM_COLOR EQU EPA_BOTTOM_COLOR ;R52 else ;EPA_BOTTOM_COLOR ;R52 BOTTOM_COLOR EQU LIGHTGREEN endif ;EPA_BOTTOM_COLOR ;R52 AWARDLOGO_COLOR EQU LIGHTBLUE ;R185endif; Graphics_Post ;R185 ;R185endif ;FULL_SCREEN_LOGO ALIGN 4 SHOW_COLOR_LOGO PROC NEAR or byte ptr Post_Temp_Byte[bp],Text_POST test byte ptr EQUIPMENT[bp],DT_MONO jz short @F ret @@: ;R249 - Starts ifdef Three_FullLogo_CMOS test byte ptr CMOS_status[bp],RTC_STATUS+CKSM_STATUS+EQUIP_STATUS jz short CMOSchkgood xor ah,ah mov al,Three_FullLogo_CMOS NMI_OFF call F000_Set_CMOS mov bx,offset ShowLOGO_selectable_Item xor dx, dx F000_CALL Write_Item_Value CMOSchkgood: endif ;Three_FullLogo_CMOS ;R249 - End push es push ds pusha ;R185ifdef FULL_SCREEN_LOGO ifdef Graphics_Post ;R185 SCREEN_WIDTH EQU 640 SCREEN_HIGH EQU 464 ;R57 start ;R103 mov bx,2000h ;R103 mov es,bx ;R103 mov byte ptr es:[0dfffh],0CBh ;retf OP code ;R57 end ;R142A start mov si,Xgroup_Segment mov di,3a00h mov cx,6000h/2 call E000_Move_Codes ;R142A end ;R09 start ;----- push data and offset for decompress request ;R103 mov bx,Temp_VGA_Seg ;R152 mov bx,Temp_EXP_Seg ;R103 ;R152 mov es,bx ;R103 mov di,es:[Temp_VGA_Off+4] ;R103 cmp di,0ffffh ;R103A mov bx,es:[Temp_EXP_Off+4] ;R103 ;R103A or bx,bx ;R103 ;R152 mov ebx,es:[Temp_EXP_Off+4] ;R103A ;R152 or ebx,ebx ;R103A ;R152 je short @F ;R152 mov di,es:[Temp_EXP_Off] ;R103 ;R103 mov bx,es:[Temp_VGA_Off] ;R103 push es:[Temp_VGA_Off+2] ;R152 push es:[Temp_EXP_Off+6] ;R103 ;R152 pop es ;R152 push cs ;R152 push offset @F ;R09A start ;R57 mov byte ptr es:[0dfffh],0CBh ;retf OP code ;R152 push 0dfffh ;R09A end ;----------------------------------------------- ;----- Execute decompress ;R152 mov al,TRUE ;R103 ;R152 call F000_Cpu_Cache ;R103 ;R152 mov dx,Exp_Data_Seg ;R22 ;R152 push 2000h ;R152 push di ;R152 retf ;R152@@: ;R152 mov al,FALSE ;R103 ;R152 call F000_Cpu_Cache ;R103 ;R185ifndef EPA_LOGO_Use_Graphics ;R181 ;R185 mov di,4 ;R152 ;R185else; EPA_LOGO_Use_Graphics ;R181 ;R185 mov ax,12h ;R181 ;R185 int 10h ;R181 ;R185 mov di,0ch ;R181 ;R185endif; EPA_LOGO_Use_Graphics ;R181 ;R185 call POST_decompress ;R152 ;R185;R09 end ;R185;R103 mov ax,LOGO_Segment ;Logo data segment ;R185 mov ax,Temp_CBROM_Segment ;R103 ;R185 mov ds,ax ;store in DS ;R185 cmp dword ptr ds:[0],'MBWA' ;compare is Award BMP file signature? ;R185;R121 jne short show_logo_ok ;No,skip ;R185 jne show_logo_ok ;R121 ;R185ifndef EPA_LOGO_Use_Graphics ;R181 ;R185 mov ax,12h ;R09 ;R185 int 10h ;R09 ;R185endif; EPA_LOGO_Use_Graphics ;R181 ;R185 - start mov byte ptr EPALOGO_FLAG[bp], 055h ;set is full screen logo mov ax,12h ;Set Screen to Graphics mode int 10h ;Use mode 12h ;R258 - start ;--------- Clear temp screen buffer -------------- cld mov ax,Temp_VGA_Seg mov es,ax mov di,Temp_VGA_Off mov ax,720h mov cx,Temp_Scrn_Size rep stosw ;------------------------------------------------- ;R258 - end ;R212 -start ifdef LOGO_Show_Selectable extrn Full_Screen_LOGO_Item:near mov si,offset DGROUP:Full_Screen_LOGO_Item call F000_GetItem_Value or al, al ; 0 : Disable jz short Skip_Full_LOGO endif; LOGO_Show_Selectable ;R212 -end ;R249 - Starts ifdef Three_FullLogo_CMOS mov al,Three_FullLogo_CMOS NMI_OFF call F000_Get_CMOS and al,Three_FullLogo_CMOS_Bits cmp al,0 jz short Skip_Full_LOGO ;R249A -start mov cx,8 _Shift_Bits_Right: test al,00000001b jnz short _Shift_Bits_Right_OK shr al,1 loop short _Shift_Bits_Right _Shift_Bits_Right_OK: ;R249A -end mov di,(OEM0_Expand_Address+1)*4 ; /OEM0 ;R249A cmp al,01000000b cmp al,00000001b ;R249A je short Ready_Decompress mov di,(OEM1_Expand_Address+1)*4 ; /OEM1 ;R249A cmp al,10000000b cmp al,00000010b ;R249A je short Ready_Decompress mov di,(OEM2_Expand_Address+1)*4 ; /OEM2 Ready_Decompress: else ;Three_FullLogo_CMOS mov di,(LOGO_Expand_Address+1)*4;;;;; 4 endif ;Three_FullLogo_CMOS ;R249 - End ;R249 mov di, 4 call POST_decompress mov ax, Temp_CBROM_Segment mov ds, ax ;store in DS cmp dword ptr ds:[0], 'MBWA' ;compare is Award BMP file signature? je short Is_Full_Screen_Logo Skip_Full_LOGO: ;R212 mov byte ptr EPALOGO_FLAG[bp], 0h ;set flag to Null data ;R230 start ifdef NO_EPA_LOGO jmp show_logo_ok else ;NO_EPA_LOGO ;R230 end mov di,(EPA_Expand_Address+1)*4;;;;; 0ch call POST_decompress mov ax, Temp_CBROM_Segment mov ds, ax ;store in DS cmp dword ptr ds:[0], 'MBWA' ;compare is Award BMP file signature? jne show_logo_ok mov byte ptr EPALOGO_FLAG[bp], 0aah ;set flag to Graphics EPA endif ;NO_EPA_LOGO ;R230 Is_Full_Screen_Logo: ;R185 - end ;--------- Disable screen -------------- mov ax,1201h mov bl,36h int 10h ;--------------------------------------- ;R135 - start ifdef Temp_init_LCD_expand_Full_logo extrn LCD_expand_Full_logo:near call LCD_expand_Full_logo endif ;Temp_init_LCD_expand_Full_logo ;R135 - end ;R203F call Graphics_Post_proc ;R203B ;R203F jmp Graphics_Post_Exit ;R203B ;R203FGraphics_Post_proc: ;R203B ;R258;--------- Clear temp screen buffer -------------- ;R258 cld ;R258 mov ax,Temp_VGA_Seg ;R258 mov es,ax ;R258 mov di,Temp_VGA_Off ;R258 mov ax,720h ;R258 mov cx,Temp_Scrn_Size ;R258 rep stosw ;R258;------------------------------------------------- ifdef CENTER_SHOW_LOGO ;R121 mov bh, 0Fh ;R121 start mov bh,CENTER_SHOW_LOGO ;get customer background color cmp bh,15 ;over 16 color? jbe short @F ;No,set it xor bh,bh ;default black @@: ;R121 end CALL Set_Write_Plane mov ax, 0a000h mov es, ax xor di, di mov cx, (SCREEN_WIDTH+7)/8*SCREEN_HIGH mov ax,-1 cld rep stosb endif ;CENTER_SHOW_LOGO ;R121ifndef CENTER_SHOW_LOGO ;R185ifndef EPA_LOGO_Use_Graphics ;R181 xor dx,dx ;R121else ;CENTER_SHOW_LOGO ;R121 mov dx, 116 ;R121 start ifdef CENTER_SHOW_LOGO cmp ds:[6],SCREEN_HIGH jae short @F mov dx,SCREEN_HIGH sub dx,ds:[6] ;BP = Pattern high shr dx,1 @@: ;R121 end endif ;CENTER_SHOW_LOGO ;R185else; EPA_LOGO_Use_Graphics ;R181 ;R185 mov dx, 1*16 ;R181EPA_X position ;R185endif; EPA_LOGO_Use_Graphics ;R181 cmp byte ptr EPALOGO_FLAG[bp], 0aah ;R185;check is not EPALOGO jne short @f ;R185 mov dx, EPA_Y*16 ;R185;EPA_Y position @@: ;R185 S_High_Loop: ;R121ifndef CENTER_SHOW_LOGO xor cx,cx ;R121else ;CENTER_SHOW_LOGO ;R121 mov cx, 160 ;R121 start ;R185ifndef EPA_LOGO_Use_Graphics ;R181 ifdef CENTER_SHOW_LOGO cmp ds:[4],SCREEN_WIDTH jae short @F mov cx,SCREEN_WIDTH sub cx,ds:[4] ;BP = Pattern width shr cx,1 @@: ;R121 end endif ;CENTER_SHOW_LOGO ;R185else; EPA_LOGO_Use_Graphics ;R181 ;R185 mov cx, 60*8 ;R181EPA_Y position ;R185endif; EPA_LOGO_Use_Graphics ;R181 cmp byte ptr EPALOGO_FLAG[bp], 0aah ;R185;check is not EPALOGO jne short @f ;R185 mov cx, EPA_X*8 ;R185;EPA_X position @@: ;R185 S_Width_Loop: call Draw_LOGO_Pattern ifdef SHOW_LOGO_ONE_TIME jmp short @F endif ;SHOW_LOGO_ONE_TIME ifdef CENTER_SHOW_LOGO jmp short @F endif ;CENTER_SHOW_LOGO cmp byte ptr EPALOGO_FLAG[bp], 0aah ;R185;check is not EPALOGO je short @f ;R185 add cx,ds:[4] cmp cx,SCREEN_WIDTH jb short S_Width_Loop add dx,ds:[6] cmp dx,SCREEN_HIGH jb short S_High_Loop @@: call Set_RGB ;R203F ;R203F xor ah,ah ;R203F xor bl,bl ;R203F call Set_RC_Mask_Reg ;R203F ;R203F;R191 start ;R203F mov ax,ds:[4] ;BP = Pattern width ;R203F add ax,7 ;R203F shr ax,3 ;get width bytes ;R203F mul word ptr ds:[6] ;BP = Pattern high ;R203F rol eax,16 ;R203F mov ax,dx ;R203F rol eax,16 ;EAX = pattern bytes of 1 plane ;R203F shl eax,2 ;4 plane ;R203F add eax,8 ;header ;R203F mov si,ax ;R203F shr eax,4 ;R203F and ax,0f000h ;R203F mov bx,ds ;R203F add ax,bx ;R203F mov ds,ax ;R203F ;R203F cmp dword ptr ds:[si],' BGR' ;R203F jne short No_RGB_plane ;R203F mov ax,ds ;R203F mov es,ax ;R203F add si,4 ;R203F mov dx,si ;R203F ;R203F xor bl,bl ;R203F@@: ;R203F lodsw ;R203F mov cx,ax ;R203F lodsb ;R203F mov dh,al ;R203F call Set_Creg ;R203F inc bl ;R203F;R191A cmp bl,10h ;R203F cmp bl,15 ;R191A ;R203F jb short @B ;R203F mov cx,3f3fh ;R191A ;R203F mov dh,3fh ;R191A ;R203F call Set_Creg ;R191A ;R203FNo_RGB_plane: ;R203F;R191 end ;R203F ;R203F ret ;R203B ;R203F Graphics_Post_Exit: ;R203B ;R221E start ifdef ACER_OEM_POST_Error xor bx,bx mov cx,8000 ; wait 33333*30 microseconds = 1 second call wait_refresh1 endif ;ACER_OEM_POST_Error ;R221E end mov ax,1200h mov bl,36h int 10h cmp byte ptr EPALOGO_FLAG[bp], 0aah ;R185;check is not EPALOGO je short @f ;R185 mov byte ptr EPALOGO_FLAG[bp], 0aah ;R185;Set this for show ifndef No_Show_Graphic_POST_MSG ;R114 mov si,offset Graphic_POST_MSG ;R198 ifdef Notebook_Power_Management ;R69 if STD_Function EQ 1 ;R198 Call F000_Check_0V_Resume ;R69 jz short Normal_Post ;R69 mov si,offset Resume_POST_MSG ;R69 Normal_Post: ;R69 endif ;STD_Function EQ 1 ;R198 ;R198 endif ;Notebook_Power_Management ;R69 call Disp_Str_In_BIOS1 endif; No_Show_Graphic_POST_MSG ;R114 mov byte ptr EPALOGO_FLAG[bp], 055h ;R185;recover this flag @@: ;R185 ;R258 and byte ptr Post_Temp_Byte[bp],not Text_POST show_logo_ok: and byte ptr Post_Temp_Byte[bp],not Text_POST ;R258 ;R142A start mov si,3a00h mov di,Xgroup_Segment mov cx,6000h/2 call E000_Move_Codes ;R142A end else; Graphics_Post ;R185 ;R185else ;FULL_SCREEN_LOGO ;R137 - start ifndef NOT_USE_CBROM_EPALOGO ;R152 mov bx,Temp_EXP_Seg ;R152 mov es, bx ;R152 mov ebx,es:[Temp_EXP_Off+12] ;R152 or ebx, ebx ;R152 je short @F ;R152 mov di, es:[Temp_EXP_Off] ;R152 push es:[Temp_EXP_Off+14] ;R152 pop es ;R152 push cs ;R152 push offset @F ;R152 push 0dfffh ;----------------------------------------------- ;----- Execute decompress ;R152 mov al,TRUE ;R152 call F000_Cpu_Cache ;R152 mov dx,Exp_Data_Seg ;R152 push 2000h ;R152 push di ;R152 retf ;R152@@: ;R152 mov al, FALSE ;R152 call F000_Cpu_Cache ;R269 start mov ax,4000h ;POST_Decompress_Seg mov ds, ax mov word ptr ds:[0],0edafh ;set a sign for check EPA ;decompress successful or not ;R269 end mov di,(EPA_Expand_Address+1)*4;;;;;0ch ;R152 call POST_decompress ;R152 ;R269 start cmp word ptr ds:[0],0edafh ;check sign for decide show EPA je show_logo_ok ;If not decompress then skip ;R269 end endif; NOT_USE_CBROM_EPALOGO ;R137 - end mov ax,1130h mov bh,2 push bp int 10h mov bx,bp pop bp mov ax,es mov STND_FONT_SEG[bp],ax mov STND_FONT_OFF[bp],bx ifdef NOT_USE_CBROM_EPALOGO ;R137 cld ;compress mov ax,0f000h mov ax,0e000h ;compress mov ds,ax mov ax,MOV_SHAD_SEG mov es,ax ifndef NO_EPA_LOGO lea si,EPA_pattern xor di,di mov cx,[si] ;pattern wide add cx,7 shr cx,3 ;clear character top pattern push cx xor al,al Clear_loop: mov dl,CHAR_START_BYTE @@: or dl,dl jz short @F stosb dec dl jmp short @B @@: add di,CHAR_Buff_size sub di,CHAR_START_BYTE loop short Clear_loop pop cx ;R52B mov di,CHAR_START_BYTE mov di,5*CHAR_Buff_size ;R52B ;------ ;R52 mov dx,[si+2] ;pattern high mov dl,[si+2] ;R52 pattern high xor dh,dh ;R52 add si,4 xor ah,ah ;clear zero count high_loop: push cx wide_loop: or ah,ah jz short @F dec ah store_byte: stosb add di,CHAR_Buff_size-1 jmp short Next_byte @@: lodsb or al,al jnz short store_byte lodsb mov ah,al xor al,al jmp short Wide_loop Next_byte: loop Wide_loop pop cx push ax mov ax,di and al,1111b cmp al,CHAR_SIZE jb short @F sub di,CHAR_SIZE jmp short Next_line @@: mov ax,cx push dx mov dx,CHAR_Buff_size mul dx pop dx sub di,ax inc di Next_line: pop ax dec dx jnz short high_loop ;clear character bottom pattern xor al,al Clear_next_line: mov dx,di and dl,1111b cmp dl,CHAR_SIZE jae short Clear_over push cx @@: stosb add di,CHAR_Buff_size-1 loop @B pop cx push ax mov ax,cx mov dx,CHAR_Buff_size mul dx sub di,dx pop ax inc di jmp short Clear_next_line Clear_over: ;------ endif ;NO_EPA_LOGO ;load award logo character ;R52B mov di,122*CHAR_Buff_size xor di,di ;R52B lea si,Award_Mark_Font mov bl,5 @@: ;R11 mov cx,CHAR_SIZE mov cx,14 ;R11 rep movsb add di,CHAR_Buff_size ;R11 sub di,CHAR_SIZE sub di,14 ;R11 dec bl jnz short @B ;------ ;R137A - start else; NOT_USE_CBROM_EPALOGO mov ax, 4000h mov ds, ax mov ax,MOV_SHAD_SEG mov es, ax cld ifdef NO_EPA_LOGO ;R203E mov bl,5 ;R203E xor si,si ;R203E else ;NO_EPA_LOGO ;R203E mov al, ds:[0] ;row mov bl, ds:[1] ;column mul bl mov bl, al add bl, 5 ;add Award_Mark_Font add ax, 2 mov si, ax endif ;NO_EPA_LOGO ;R203E xor di, di @@: mov cx, 14 rep movsb xor ax, ax stosw dec bl jnz short @B ;R137A - end endif; NOT_USE_CBROM_EPALOGO ;R137 ifndef Special_Patch_for_CH7001 ;R165 mov ax,1201h mov bl,30h int 10h mov ax,3 int 10h endif ;Special_Patch_for_CH7001 ;R165 ;R05 start ;R05B mov ax,600h ;R05B;R05A xor bh,bh ;R05B mov bh,7 ;R05A ;R05B xor cx,cx ;R05B mov dx,184fh ;R05B int 10h ;R05 end ;R137Aifdef NOT_USE_CBROM_EPALOGO ;R137 ; Enable character generator writeable mov dx,03c4h ; Sequence register index port mov al,2 call get_vga_reg push ax ; Save sequence index 2 register mov ah,03h ; Enable plane 2 will loaded font. call set_vga_reg mov al,4 call get_vga_reg push ax ; Save sequence index 4 register mov ah,3 call set_vga_reg mov dx,03ceh ; Graphic control register index port mov al,5 call get_vga_reg push ax ; Save Graphic control index 5 register mov ah,00h ; Write mode 0 call set_vga_reg mov al,6 call get_vga_reg push ax ; Save Graphic control index 6 register mov ah,04h ; memory mapping select to a000h,64k. call set_vga_reg mov al,4 call get_vga_reg push ax ; Save Graphic control index 4 register mov ah,02h ; Set plane 2 for access call set_vga_reg ; Write character font to character generator push es pop ds ifdef NO_EPA_LOGO ;R203E mov di,251*32 ;R203E else ;NO_EPA_LOGO ;R203E mov di,128*32 ; Start address of character generator endif ;NO_EPA_LOGO ;R203E mov ax,0a000h ; Segment of character generator mov es,ax xor si,si ifdef NO_EPA_LOGO ;R203E mov cx,5*32 ;R203E else ;NO_EPA_LOGO ;R203E mov cx,128*32 ; 128 character font endif ;NO_EPA_LOGO ;R203E cld rep movsw ; Move character font now .... ;R52B mov di,250*32 ; Start address of AWARD LOGO mov di,123*32 ;R52B mov bx,es:[di] ; Get AWARD logo for compare ; Restore VGA registers mov dx,03ceh ; Graphic control register index port pop ax ; Restore Graphic control index 4 register call set_vga_reg pop ax ; Restore Graphic control index 6 register call set_vga_reg pop ax ; Restore Graphic control index 5 register call set_vga_reg mov dx,03c4h ; Sequence register index port pop ax ; Restore sequence index 4 register call set_vga_reg pop ax ; Restore sequence index 2 register call set_vga_reg ifdef NOT_USE_CBROM_EPALOGO ;R137A; ;R52B mov si,122*CHAR_Buff_size mov si,0 ;R52B cmp ds:[si],bx je short @F push ds pop es push bp ;R52C - start mov ax,1100h mov bh,CHAR_Buff_size xor bl,bl mov cx,5 ;R213 mov dx,1bh mov dx,251 ;R213 put award logo to ASCII 251-255 xor bp,bp int 10h ;R52C - end mov ax,1100h mov bh,CHAR_Buff_size xor bl,bl ;R52B mov cx,80h ;R52B mov dx,80h ;R52C mov cx,85h ;R52B ;R52C mov dx,7bh ;R52B ;R213 mov cx,80h mov cx,80h-5 ;R213 reserve 5 char for award logo mov dx,80h ;R52C xor bp,bp mov bp,5 * CHAR_Buff_size ;R52C int 10h ;R52D - start ifdef Super_Korea_Logo ;R52E mov ax,1100h mov bh,CHAR_Buff_size xor bl,bl ;R52E mov cx,25 mov cx,16 ;R213 mov dx,0h ;R213 mov bp,85h * CHAR_Buff_size xor dx,dx ;R213 start from ASCII 0 mov bp,80h * CHAR_Buff_size ;R213 buffer start offset int 10h ;R52E - R52E mov ax,1100h mov bh,CHAR_Buff_size xor bl,bl ;R213 mov cx,9 mov dx,18 ;R213 mov bp,95h * CHAR_Buff_size mov cx,14 ;R213 remain extend char of EPA mov bp,90h * CHAR_Buff_size ;R213 buffer start offset int 10h endif ;Super_Korea_Logo ;R52E - R52E ;R52D - end ;R70 - start ifdef PHILIPS_LOGO mov ax,1100h mov bh,CHAR_Buff_size xor bl,bl ;R213 mov cx,7 ;R213 mov dx,0h ;R213 mov bp,85h * CHAR_Buff_size mov cx,12 ;R213 extend char number of EPA xor dx,dx ;R213 ASCII 0 mov bp,80h * CHAR_Buff_size ;R213 buffer start offset int 10h endif ;PHILIPS_LOGO ;R70 - end ifdef Tiger_Logo ;R109 mov ax,1100h mov bh,CHAR_Buff_size xor bl,bl mov cx,16 ;R213 mov dx,0h ;R213 mov bp,85h * CHAR_Buff_size xor dx,dx ;R213 start from ASCII 0 mov bp,80h * CHAR_Buff_size ;R213 buffer start offset int 10h mov ax,1100h mov bh,CHAR_Buff_size xor bl,bl ;R213 mov cx,9 mov dx,18 ;R213 mov bp,95h * CHAR_Buff_size mov cx,14 ;R213 remain extend char of EPA mov bp,90h * CHAR_Buff_size ;R213 buffer start offset int 10h endif ;Tiger_Logo ;R109 - end ;R137 - start else; NOT_USE_CBROM_EPALOGO push ds ;R137A pop es ;R137A push bp ifndef NO_EPA_LOGO ;R203E ;R137A mov ax, 4000h ;R137A mov es, ax ;R137A mov al, es:[0] ;row ;R137A mov bl, es:[1] ;column ;R137A mul bl ;R137A push ax ;R137A add ax, 2 ;R137A mov bp, ax xor bp, bp ;R137A mov ax, 1100h ;R137A mov bx, 0e00h ;bh - CHAR_Buff_size mov bx, 1000h ;R137Abh - CHAR_Buff_size ;R213 mov cx, 80h mov cx, 80h-5 ;R213 reserved 5 char for award logo mov dx, 80h int 10h mov ax, 1100h ;R137A mov bx, 0e00h ;bh - CHAR_Buff_size mov bx, 1000h ;R137Abh - CHAR_Buff_size mov cx, 16 mov dx, 0 ;R137A add bp, 14 * 128 ;R213 mov bp, 80h * 16 ;R137A mov bp, (80h-5) * 16 ;R213 load first font of EPA to ASCII 128-250(EPA font offset) int 10h mov ax, 1100h ;R137A mov bx, 0e00h ;bh - CHAR_Buff_size mov bx, 1000h ;R137Abh - CHAR_Buff_size ;R213 mov cx, 9 mov cx,14 ;R213 load last font of EPA to ASCII 18-31 mov dx, 18 ;R137A add bp, 14 * 16 ;R213 mov bp, 90h * 16 ;R137A mov bp,(90h-5) * 16 ;R213 EPA font offset int 10h endif ;NO_EPA_LOGO ;R203E ;R137A pop ax mov ax, 4000h ;R137A mov ds, ax ;R137A ifdef NO_EPA_LOGO ;R203E xor bp,bp ;R203E else ;NO_EPA_LOGO ;R203E mov al, ds:[0] ;R137Arow mov bl, ds:[1] ;R137Acolumn mul bl ;R137A mov bl, 16 ;R137A mul bl ;R137A mov bl, 15 ;R137A add ax, 2 mov bp, ax endif ;NO_EPA_LOGO ;R203E mov ax, 1100h ;R137A mov bx, 0e00h mov bx, 1000h ;R137A mov cx, 5 ;R213 mov dx, 1bh mov dx, 251 ;R213 award font start ASCII int 10h endif; NOT_USE_CBROM_EPALOGO ;R137 - end pop bp @@: ;R05 start ;R05B push bp ;R05B mov ax,1130h ;R05B mov bh,6 ;R05B int 10h ;R05B mov ax,1100h ;R05B mov bh,CHAR_Buff_size ;R05B xor bl,bl ;R05B mov cx,80h ;R05B xor dx,dx ;R05B int 10h ;R05B pop bp ;R05 end ifndef NO_EPA_LOGO ifdef NOT_USE_CBROM_EPALOGO ;R137 ;R70 - start ifdef PHILIPS_LOGO mov bl,10 mov dh,0 mov cx,0 call Set_Creg mov bl,8 mov dh,0 mov cx,0 call Set_Creg mov bl,4 mov dh,0 mov cx,0 call Set_Creg mov bl,3 mov dh,0 mov cx,0 call Set_Creg mov bl,14 mov dh,0 mov cx,0 call Set_Creg mov bl,2 mov dh,0 mov cx,0 call Set_Creg else ;PHILIPS_LOGO ;R70 - end ;R52B - start ifdef EXTEND_LOGO_COLOR ;R52F IF EXTEND_LOGO_COLOR EQ 7 ;R52F;R52D - START ;R52F CHANGE_COLOR EQU 7 ;R52F ENDIF ;EXTEND_LOGO_COLOR ;R52F IF EXTEND_LOGO_COLOR EQ 15 ;R52F CHANGE_COLOR EQU 15 ;R52F ENDIF ;EXTEND_LOGO_COLOR ;R52F IF EXTEND_LOGO_COLOR EQ LIGHTBLUE ;R52F CHANGE_COLOR EQU LIGHTBLUE ;R52F ENDIF ;EXTEND_LOGO_COLOR ;R52F IF EXTEND_LOGO_COLOR EQ LIGHTGREEN ;R52F CHANGE_COLOR EQU LIGHTGREEN ;R52F ENDIF ;EXTEND_LOGO_COLOR ;R52F IF EXTEND_LOGO_COLOR EQ YELLOW ;R52F CHANGE_COLOR EQU YELLOW ;R52F ENDIF ;EXTEND_LOGO_COLOR ;R52F;R52D - END ifdef CHANGE_COLOR mov bl,2 call Get_Creg mov EXT_LOGO_RED,dh mov EXT_LOGO_GREEN,ch mov EXT_LOGO_BLUE,cl ;R52D mov bl,7 mov bl,CHANGE_COLOR ;R52D call Get_Creg mov TOP_RED,dh mov TOP_GREEN,ch mov TOP_BLUE,cl mov bl,2 mov TOP_RED,dh mov TOP_GREEN,ch mov TOP_BLUE,cl call Set_Creg ;R52D ENDIF ;EXTEND_LOGO_COLOR endif ;CHANGE_COLOR ;R52D endif ;EXTEND_LOGO_COLOR endif ;PHILIPS_LOGO ;R70 ;R52B - end mov al,80h mov dh,EPA_Y ;row row_loop: mov dl,EPA_X ;column ifndef BIG_LOGO ;R52B ifndef PHILIPS_LOGO ;R70 mov cx,17 else ;PHILIPS_LOGO ;R70 mov cx,15 ;R70 endif ;PHILIPS_LOGO ;R70 else ;BIG_LOGO ;R52B ifndef Tiger_Logo ;R109 ifdef Super_Korea_Logo ;R52D mov cx,17 ;R52D else ;Super_Korea_Logo ;R52D mov cx,16 ;R52B endif ;Super_Korea_Logo ;R52D else; Tiger_Logo ;R109 mov cx,17 ;R109 endif; Tiger_Logo ;R109 endif ;BIG_LOGO ;R52B Next_char: push cx call draw_EPA_logo inc al ;R213 start cmp al,251 ;award font start jb short Not_AWARD_logo_area ;No,jump xor al,al ;skip it to next area Not_AWARD_logo_area: ;R213 end inc dl pop cx loop short Next_char inc dh ifndef BIG_LOGO ;R52B ifndef PHILIPS_LOGO ;R70 cmp dh,7 else ;PHILIPS_LOGO ;R70 cmp dh,10 ;R70 endif ;PHILIPS_LOGO ;R70 else ;BIG_LOGO ;R52B ifndef Tiger_Logo ;R109 ifdef Super_Korea_Logo ;R52D cmp dh,10 ;R52D else ;Super_Korea_Logo ;R52D cmp dh,9 ;R52B endif ;Super_Korea_Logo ;R52D else; Tiger_Logo ;R109 cmp dh,10 ;R109 endif; Tiger_Logo ;R109 endif ;BIG_LOGO ;R52B jb short row_loop ;R137 - start else; NOT_USE_CBROM_EPALOGO mov ax, 4000h mov es, ax mov di, 2 mov al, 80h mov dh, EPA_Y ;row row_loop: mov dl, EPA_X ;column mov cl, es:[0] xor ch, ch Next_char: push cx mov bl, es:[di] call draw_EPA_logo inc al ;R213 start cmp al,251 ;award font start jb short Not_AWARD_logo_area1 ;No,jump xor al,al ;skip it to next area Not_AWARD_logo_area1: ;R213 end inc di inc dl pop cx loop short Next_char inc dh cmp dh, es:[1] ja short @f jmp short row_loop @@: endif; NOT_USE_CBROM_EPALOGO ;R137 - end endif ;NO_EPA_LOGO mov bl,ATTRIBUTE[bp] push bx mov byte ptr ATTRIBUTE[bp],AWARDLOGO_COLOR mov dx,101h call F000_Cursor_Set ; set to top of screen ;R52B mov al,250 ;R52C mov al,123 ;R52B ;R213 mov al,27 ;R52C mov al,251 ;R213 top of award font call F000_Display_Char inc al call F000_Display_Char mov dx,200h call F000_Cursor_Set ; set to top of screen ;R52B mov al,252 ;R52C mov al,125 ;R52B ;R213 mov al,29 ;R52C mov al,253 ;R213 bottom of award font call F000_Display_Char inc al call F000_Display_Char inc al call F000_Display_Char pop bx mov ATTRIBUTE[bp],bl ; call Show_dark_light show_logo_ok: endif; Graphics_Post ;R185 ;R185endif ;FULL_SCREEN_LOGO mov ax,G_RAM mov ds,ax mov byte ptr ds:CURRENT_MEDIA,0 popa pop ds pop es ret SHOW_COLOR_LOGO ENDP ;R181 - start ;R185ifdef EPA_LOGO_Use_Graphics ifdef Graphics_Post ;R185 ;R185E start ;====================================================== ;Input : DS = pattern start segment (8bits x 16) ;====================================================== Show_Graphics_Award: ;Check Full screen or EPA logo ;R230 cmp byte ptr EPALOGO_FLAG[bp],0aah ;Graphics POST? ;R230 jne short Dont_Show_Award ;No,skip cmp byte ptr EPALOGO_FLAG[bp],55h ;R230 Graphics POST? je short Dont_Show_Award ;R230 No,skip push ds ifndef FPINSTALL_IN_XGROUP mov ax, 0e000h ;E000 Segment else; FPINSTALL_IN_XGROUP mov ax, Xgroup_Segment ;XGROUP Segment endif; FPINSTALL_IN_XGROUP mov ds, ax mov ax,0a000h ;VGA memory segment mov es,ax xor ah,ah xor bl,bl call Set_RC_Mask_Reg ;Set RC and Mask bits register mov bh,1 ;Draw plane 0 Show_Award_plane: mov bl,5 ;5 char for award logo mov di,SCREEN_WIDTH/8*CHAR_Buff_size+1 ;first char offset lea si,Award_Mark_Font Show_Award_High: push di call Set_Write_Plane ;Set plane register mov cx,10h ;high Show_Award_Loop: mov al,es:[di] ;Read will draw byte for mask bits function ;*** Must do this command *** lodsb test bh,AWARDLOGO_COLOR jnz short @F xor al,al @@: mov es:[di],al ;draw one byte add di,SCREEN_WIDTH/8 ;one line wide loop Show_Award_Loop pop di inc di cmp bl,4 jne short @F mov di,SCREEN_WIDTH/8*CHAR_Buff_size*2 ;third char offset @@: dec bl ;next char jnz short Show_Award_High shl bh,1 test bh,10h jz short Show_Award_plane mov bh,0fh ;R206 call Set_Write_Plane ;R206 Set plane register pop ds Dont_Show_Award: ret ;R185E end ;R185E;====================================================== ;R185E;Input : DL = screen column ;R185E; DH = screen row ;R185E; DS:SI = pattern start segment (8bits x 16) ;R185E; ATTRIBUTE[bp] = Font color ;R185E;====================================================== ;R185EShow_Graphics_Font: ;R185Eifndef Use_memory_Access_draw_award_font ;R185D ;R185E push dx ;R185E mov al, 8 ;R185E mul dl ;R185E mov cx, ax ;R185E ;R185E mov al, 16 ;R185E mul dh ;R185E mov dx, ax ;R185E ;R185E mov bx, 16 ;16 row ;R185E next_row: ;R185E push cx ;R185E push bx ;R185E lodsb ;R185E mov bx, 8 ;R185E next_point: ;R185E push bx ;R185E shl al, 1 ;R185E jnc short @f ;R185E push ax ;R185E push cx ;R185E push dx ;R185E mov ah, 0ch ;R185E mov al, ATTRIBUTE[bp] ;R185E int 10h ;R185E pop dx ;R185E pop cx ;R185E pop ax ;R185E @@: ;R185E inc cx ;R185E pop bx ;R185E dec bl ;R185E jnz short next_point ;R185E pop bx ;R185E pop cx ;R185E inc dx ;R185E dec bl ;R185E jnz short next_row ;R185E ;R185E pop dx ;R185E;R185D - start ;R185Eelse; Use_memory_Access_draw_award_font ;R185E ;R185E pushad ;R185E push es ;R185E mov ax, 0a000h ;R185E mov es, ax ;R185E xor bx, bx ;R185E neat_row: ;R185E or dh, dh ;R185E jz short add_column ;R185E add bx, 50h * 16 ;R185E dec dh ;R185E jmp short neat_row ;R185E add_column: ;R185E movzx dx, dl ;R185E add bx, dx ;R185E mov dx, 03ceh ;R185E mov ax, 5 ;R185E out dx, ax ;R185E newiodelay ;R185E mov al,3 ;R185E out dx, ax ;R185E newiodelay ;R185E mov ax, 0f01h ;R185E out dx, ax ;R185E mov cx, 16 ;R185E Next_byte: ;R185E xor al, al ;R185E mov ah, ATTRIBUTE[bp] ;R185E out dx, ax ;R185E mov ah, ds:[si] ;R185E mov al, es:[bx] ;R185E mov al, 08 ;R185E out dx, ax ;R185E mov es:[bx], al ;R185E add bx, 50h ;R185E inc si ;R185E loop short Next_byte ;R185E pop es ;R185E popad ;R185E add si, 16 ;R185Eendif; Use_memory_Access_draw_award_font ;R185E;R185D - end ;R185E inc dl ;R185E cmp dl, 80 ;R185E jne short @f ;R185E inc dh ;R185E xor dl, dl ;R185E @@: ;R185E ret ;R185E;R185endif; EPA_LOGO_Use_Graphics ;R181 - end ;R203F start Set_RGB: xor ah,ah xor bl,bl call Set_RC_Mask_Reg mov ax,ds:[4] ;BP = Pattern width add ax,7 shr ax,3 ;get width bytes mul word ptr ds:[6] ;BP = Pattern high rol eax,16 mov ax,dx rol eax,16 ;EAX = pattern bytes of 1 plane shl eax,2 ;4 plane add eax,8 ;header mov si,ax shr eax,4 and ax,0f000h mov bx,ds add ax,bx mov ds,ax cmp dword ptr ds:[si],' BGR' jne short No_RGB_plane mov ax,ds mov es,ax add si,4 mov dx,si ;R238 xor bl,bl ;R238@@: ;R238 lodsw ;R238 mov cx,ax ;R238 lodsb ;R238 mov dh,al ;R238 call Set_Creg ;R238 inc bl ;R238 cmp bl,15 ;R238 jb short @B ;R238 mov cx,3f3fh ;R238 mov dh,3fh ;R238 call Set_Creg ;R238 start push dx mov ax,1013h ;set color group to 16 color mov bx,100h int 10h pop dx ifdef No_Show_Graphic_POST_MSG ;R238A mov cx,16 ;R238A;set color of pattern to match else ;No_Show_Graphic_POST_MSG ;R238A mov cx,15 ;set color of pattern to match endif ;No_Show_Graphic_POST_MSG ;R238A @@: ;function call lodsb xchg al,ds:[si+1] mov ds:[si-1],al add si,2 loop @B ifndef No_Show_Graphic_POST_MSG ;R238A mov dword ptr ds:[si],03f3f3f3fh ;set 16th color palette endif ;No_Show_Graphic_POST_MSG ;R238A mov cx,16 mov ax,1012h ;set one color group of register xor bx,bx int 10h ;with RGB value in DH,CH & CL ;R238 end No_RGB_plane: ret ;R203F end ;R185ifdef FULL_SCREEN_LOGO ;====================================================== ;Input : CX = Start screen column ; DX = Start screen row ; DS = LOGO pattern start segment ;Output : None ;Destory : Flag ;====================================================== Draw_LOGO_Pattern: push es pusha mov ax,0a000h ;Screen data segment mov es,ax ;store in ES mov bp,ds:[4] ;BP = Pattern width add bp,7 shr bp,3 mov ax,dx mov dx,SCREEN_WIDTH/8 mul dx mov di,ax mov bl,cl and bl,7 ;BL = residual pixels of start byte shr cx,3 add di,cx mov bh,1 ;Draw plane 0 Plane_Loop: call Set_Write_Plane ;Set plane register xor ah,ah ;Clear residual pixel flag Residual_Pixel: push ds ;R09 push di ;Store will draw start address ;----- Calculate pattern start offset store in SI ----- mov si,8 mov al,bh @@: shr al,1 jc short @F add si,bp jmp short @B @@: ;------------------------------------------------------ push ax mov ax,di xor dx,dx mov cx,SCREEN_WIDTH/8 div cx pop ax mov cx,bp ;CX = Pattern one line width or ah,ah ;already draw residual pixel jz short @F ;Yes,skip inc dx ; cmp dx,SCREEN_WIDTH/8 jae short Skip_Residual_Pixel inc di ;draw next residual pixel offset @@: add dx,cx cmp dx,SCREEN_WIDTH/8 jbe short @F sub dx,SCREEN_WIDTH/8 sub cx,dx @@: mov dx,ds:[6] ;DX = Pattern high call Set_RC_Mask_Reg ;Set RC and Mask bits register Draw_line_Loop: push cx or bl,bl ;R238 jz short Draw_Byte_Loop ;R238 @@: mov al,es:[di] ;Read will draw byte for mask bits function ;*** Must do this command *** movsb ;draw one byte ;R09 start or si,si jnz short Next_Byte0 push ax mov ax,ds add ax,1000h mov ds,ax pop ax Next_Byte0: ;R09 end loop @B ;loop one line ;R09 mov cx,bp ;CX = Pattern one line width ;R09 shl cx,2 ;CX = Pattern one line total width (4 plane) ;R09 add si,cx ;SI = next line and same plane ;R238 start jmp short Draw_Byte_End Draw_Byte_Loop: push ax ;store AX mov ax,cx ;line number add ax,si ;have exceed 64k boundary jc short @F ;Yes,jump xor ax,ax ;No,don't move second block @@: sub cx,ax ;first block number rep movsb ;move first block mov cx,ax ;get second block number or si,si ;on boundary? jnz short @F ;No,skip mov ax,ds ;point to next segment add ah,10h mov ds,ax @@: or cx,cx ;have second block number? jz short @F ;No,dont move it rep movsb ;move secondary block @@: pop ax ;restore AX Draw_Byte_End: ;R238 end pop cx ;R09 start push ax mov ax,bp shl ax,2 sub ax,cx add si,ax jnc short Next_Byte1 mov ax,ds add ax,1000h mov ds,ax Next_Byte1: pop ax ;R09 end ;R09 sub si,cx ;pattern offset add di,SCREEN_WIDTH/8 ;DI = next line screen offset cmp di,((SCREEN_WIDTH+7)/8)*SCREEN_HIGH ja short Skip_Residual_Pixel sub di,cx ;---------------------------- dec dx ;decearse line value jnz short Draw_line_Loop ;Not zero then draw next line Skip_Residual_Pixel: pop di ;Restore original draw start address pop ds ;R09 or bl,bl ;Have any residual pixel? jz short Next_Plane ;No,draw next plane pattern or ah,ah ;already draw residual pixel jnz short Next_Plane ;Yes,skip inc ah ;Set residual pixel flag ;R09 jmp short Residual_Pixel ;jump and draw it jmp Residual_Pixel ;R09 Next_Plane: shl bh,1 ;Set next plane test bh,10h ;Is over plane? ;R09 jz short Plane_Loop ;No,draw else plane jz Plane_Loop ;R09 mov bh,0fh ;R206 call Set_Write_Plane ;R206 Set plane register popa pop es ret ;====================================== ;Input : BH = Write plane value ;Output : None ;Destory : AL, Flag ;====================================== Set_Write_Plane: push dx mov dx,3c4h ;Sequencer Register index port mov al,2 ;Set plane Register value out dx,al inc dx ;3C5h Sequencer Register data port mov al,bh out dx,al pop dx ret ;========================================================== ;Input : AH = Mask position (0=right / 1=left rotate) ; BL = Rotate bits number ;Output : None ;Destory : AL, Flag ;========================================================== Set_RC_Mask_Reg: push cx push dx mov dx,3ceh ;Graphics Controller Register index port mov al,3 ;Set RC register value out dx,al inc dx ;3CFh Graphics Controller Register data port mov al,bl out dx,al dec dx ;Graphics Controller Register index port mov al,8 ;Set Mask register value out dx,al inc dx ;3CFh Graphics Controller Register data port mov al,0ffh mov cl,bl or ah,ah jnz short @F shr al,cl @@: or ah,ah jz short @F xor cl,7 inc cl shl al,cl @@: out dx,al pop dx pop cx ret ;R185else ;FULL_SCREEN_LOGO else; Graphics_Post ;R185 ; ; Subroutine for read VGA register ; ALIGN 4 get_vga_reg proc near out dx,al xchg ah,al inc dl in al,dx xchg ah,al dec dl ret get_vga_reg endp ; ; Subroutine for write VGA register ; ALIGN 4 set_vga_reg proc near out dx,al inc dl xchg ah,al out dx,al dec dl xchg ah,al ret set_vga_reg endp ;R185endif ;FULL_SCREEN_LOGO endif; Graphics_Post ;R185 endif; ;R174EPA_LOGO_Switch ;[]==============================================================[] ; ;TEST_VIDEO_RAM: ; ; Test 800h bytes of video RAM. ; ;Saves: CX ;Destroys: ES ; ;Entry: AX Segment to test ; DX Video I/O control port ; ;Exit: NONE ; ;[]==============================================================[] PUBLIC TEST_VIDEO_RAM ALIGN 4 TEST_VIDEO_RAM PROC NEAR push cx mov es,ax mov al,21h out dx,al ; disable video before test mov cx,800h ; length of mono buffer mov ax,es cmp ax,0b000h ; mono card? je short tvr_1 ; yes... mov cx,2000h ; length of color buffer ; ; Fill buffer with test pattern ; tvr_1: mov bx,cx ; save word count mov ax,0a5a5h ; test pattern xor di,di rep stosw ; ; Verify RAM is same ; mov cx,bx ; restore word count shl cx,1 ; make it bytes xor di,di rep scasb ; any changes? jne short tvr_9 ; yes, error... ; ; Fill RAM with spaces... ; xor di,di mov cx,bx mov ax,0720h ; normal space rep stosw ; fill it mov al,29h ; control byte out dx,al ; re-enable video clc ; clear carry flag and tvr_8: pop cx ret ; return to caller tvr_9: stc ; video RAM error... jmp short tvr_8 TEST_VIDEO_RAM ENDP ;[]==============================================================[] ; ;DISP_ERR_MSG: ; ; Display a POST error message in compressed format. ; Uses COMPRESS. Will not be suppressed by warm boot. ; ;Saves: AX,DS ; ;Entry: CS:SI Compressed string to display for POST ;Exit: NONE ; ;[]==============================================================[] PUBLIC DISP_ERR_MSG ALIGN 4 DISP_ERR_MSG PROC NEAR jmp Disp_Str_In_POST DISP_ERR_MSG ENDP Public Disp_Str_In_BIOS1 Disp_Str_In_BIOS1: push word ptr CURSOR_X[bp] call Disp_Str_In_POST pop word ptr CURSOR_X[bp] pusha mov ah,2 xor bh,bh mov dx,CURSOR_X[bp] int 10h popa ret ; ; Various tables used by protected mode memory testing. ; PUBLIC GDT_LOC IDT_LOC equ 0e400h ; where idt going to be located IDT_LEN equ 80h ; size of idt vectors GDT_LOC equ 0e000h ; where gdt going to be located public gdtr GDTR: ; global descriptor table register dw offset END_OF_GDT - OFFSET GDT ; LIMIT dw GDT_LOC ;GDT Offset dw 02h ;GDT Segment IDTR: ; INTERRUPT DESCRIPTOR TABLE REGISTER dw IDT_LEN*8 ; LIMIT dw IDT_LOC ;IDT Offset dw 02h ;IDT Segment GDT: ; null descriptor dw 0 ; limit dw 0 ; base db 0 ; hibase db 0 ; access db 0 ; hilimit db 0 ; msbase CODE_DT: ; cs - prom code segment CODE_INDEX equ ((offset CODE_DT - offset GDT)/8) SHL 3 dw 0ffffh ; limit dw 0 ; base a15-a0 db 0eh ; hibase a23-a16, assume we have 64k prom db 9fh ; access db 0 ; hilimit db 0 ; msbase a31-a24 DATA_DT: ; ds - first 64k segment DATA_INDEX equ ((OFFSET DATA_DT - OFFSET GDT)/8) SHL 3 dw 0ffffh ; limit dw 0 ; base data segment points to db 0 ; hibase ; 00000000 db 93h ; access db 08fh ; hilimit=4GB db 0 ; msbase TEST_DT: ; es table point to segment to be tested TEST_INDEX = ((OFFSET TEST_DT - OFFSET GDT)/8) SHL 3 dw 0ffffh ; limit dw 0 ; base db 1 ; hibase ; from 2nd 64k memory db 93h ; access db 0 ; hilimit db 0 ; msbase ; 24 bits can handle up to 16Mb PUBLIC TEST_INDEX END_OF_GDT: PUBLIC DUMMY_IDTR EVEN ; table DUMMY_IDTR: dw IDT_LEN*8 ; limit dd 0 ; base ; ; **** ; The DEFAULT_MEMORY_SIZING flag should be turned off for all ; chipsets which have auto-memory detect.. ; ;[]==============================================================[] ; ;ENABLE_PROT_MODE: ; ; Enable protected mode. ; ;Saves: NONE ; ;Entry: NONE ;Exit: C Set if we didn't make protected mode... ; ;[]==============================================================[] ALIGN 4 PUBLIC ENABLE_PROT_MODE ENABLE_PROT_MODE PROC NEAR pushad ; ; First: Turn on GATE A20 ; call E000_A20_On ; turn on a20 gate ;R72 ;R72 F000_call A20_On ; turn on a20 gate jc short epm_9 ; jump if a20 is not working ; Second: Set up GDT in 1st 64k push cs ; setup gdt to enter protected mode pop ds ; setup ds:si point to gdtr mov cx,(offset END_OF_GDT - offset GDT) shl 1 ; word count mov si,offset cs:GDT ; source in prom mov ax,2000h ; es = 2000:0 mov es,ax ; es = 2000:0 assume es:g_ram mov di,GDT_LOC ; di = last 4k repz movsw ; copy gdt to 0000:f000h ; Third: Setup IDT in 1st 64k mov di,IDT_LOC ; setup idt at 0000:f400 - 0000:f800 mov cx,IDT_LEN ; we don't need all vectors setup mov si,offset CS:Spurious ; 386 only xor ax,ax epm_2: mov word ptr es:0[di],si mov word ptr es:2[di],CODE_INDEX mov word ptr es:4[di],8f00h ; 87h for 286 trap type ; 8fh for 386 trap type mov word ptr es:6[di],ax add di,8 loop short epm_2 ; Fourth: Load IDTR mov si,offset cs:IDTR ; load idtr to si lidt fword ptr [si] ; fword mov si,offset cs:GDTR ; load gdtr to si lgdt fword ptr [si] ; load global descriptor table ; ; Fifth: Enter protected mode ; mov eax,cr0 ; switch to protected or al,1 mov cr0,eax ; load msw to enter protected mode ; ; Sixth: Flush processor queue ; FAR_JMP $+4,CODE_INDEX ; flush instruction decode queue mov ax,DATA_INDEX ; ds and ss segment point to 1st mov ds,ax ; 64k of lower memory mov ss,ax ; 64k of lower memory mov gs,ax ; 386 only mov fs,ax ; 386 only mov ax,TEST_INDEX ; make es point to the segment in mov es,ax ; which test will be held MOV EAX,CR0 ; STORE MSW INTO AX REGISTER TO ; CHECK IF PE SET PROPERLY test al,1 ; look for pe bit jnz short epm_9 ; jump if set stc ; set carry to indicate error epm_9: popad ret ENABLE_PROT_MODE ENDP ;[]==============================================================[] ; ;SPURIOUS: ; ; Used for handling spurious interrupts from enabling ; protected mode. ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC SPURIOUS ALIGN 4 SPURIOUS PROC FAR push eax push dx POST_CODE 0B0H ; send out post code ifdef CUSTOM_LCD_OUTPUT ;R241 call LCD_Display_Msg ;R241 endif; CUSTOM_LCD_OUTPUT ;R241 mov eax,cr0 ; get machine word and eax,7fffffffh ; reset page mode mov cr0,eax ; tell processor pop dx pop eax iret SPURIOUS ENDP ;[]==============================================================[] ; ;SHUTDOWN_FROM_MEM_TEST: ; ; Exit protected mode after doing a memory test. ; ;Saves: ALL ; ;Entry: NONE ;Exit: C Set if we didn't make protected mode... ; ;[]==============================================================[] ALIGN 4 PUBLIC SHUTDOWN_FROM_MEM_TEST SHUTDOWN_FROM_MEM_TEST PROC NEAR push eax ; save original registers push esi mov ax,ds mov es,ax mov gs,ax mov fs,ax cli mov eax,cr0 ; get machine word and eax,7ffffffeh ; reset pe bit to real mode mov cr0,eax ; tell processor far_jmp $+4,0e000h ; flush instruction decode queue mov ax,cs mov ds,ax mov si,offset DUMMY_IDTR ; load dummy idtr to si lidt fword ptr [si] ; fword xor ax,ax ; g_ram mov ds,ax ; reset all segment register mov es,ax mov ss,ax F000_call A20_Off ; turn off a20 gate pop esi pop eax ret SHUTDOWN_FROM_MEM_TEST ENDP ;[]==============================================================[] ; ;POST_15S: ; ; Test DMA Channel 0 using AA, 55, FF and 00. ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_15S POST_15S PROC NEAR ;R120A if Desktop_Power_Management EQ 1 ;R120 ; BIOS must reset KB earlier if LANCE(LT38C41) + FUJITSU ; KB , otherwise system become very slow during memory ; test, But reset KB failure in this case for some ; combinations of KB and PS2 mouse. So reset KB earlier if no PS2 mouse ; support and reset KB later for PS2 M/B ifndef EARLY_RESET_KB call Check_PS2_Mouse_Support ;PS2 mosue support jnz short Suppport_Ps2_Mouse endif ;EARLY_RESET_KB call Reset_Kb ;*if system hang here, define 'DISABLE_PS2_AT_POST5' Suppport_Ps2_Mouse: ;R120A endif ;Desktop_Power_Management EQ 1 ;R120 ; ; Keyboard self-test ; xor dx,dx ; channel 0 addr register jmp short Dma_Test ; jump to common test routine POST_15S ENDP ;[]==============================================================[] ; ;POST_16S: ; ; Test DMA Channel 1 using AA, 55, FF and 00. ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_16S POST_16S PROC NEAR mov dx,0c0h ; channel 1 addr register ;[]==============================================================[] ; ;DMA_TEST: ; ; Test a DMA Channel. ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] DMA_TEST LABEL NEAR ifdef DMA_CHANNEL_TEST push si ; save msg pointer mov al,0aah ; first pattern dma_test1: mov ah,al ; get data pattern out dx,al ; write to port, lsb NEWIODELAY out dx,al ; write to port, msb NEWIODELAY in al,80h ; change bus state NEWIODELAY in al,dx ; read port, lsb NEWIODELAY cmp al,ah ; data comparison jne short dma_test_fail ; jump if fail in al,80h ; change bus state again NEWIODELAY in al,dx ; read port, msb NEWIODELAY cmp al,ah ; data comparison jne short dma_test_fail ; jump if fail or al,al ; last pattern test? jz short dma_test_ret ; jump if so cmp al,0aah ; first pattern test? je short dma_test2 ; jump if so cmp al,55h ; second pattern test? je short dma_test3 ; jump if so xor al,al ; must be 0ffh, now test jmp short dma_test1 ; pattern 0 dma_test2: mov al,55h ; second pattern jmp short dma_test1 ; continue test dma_test3: mov al,-1 ; third pattern jmp short dma_test1 ; continue test dma_test_fail: pop si ; restore msg stc ret dma_test_ret: pop si endif ;DMA_CHANNEL_TEST clc ret POST_16S ENDP ;[]==============================================================[] ; ;POST_17S: ; ; Test DMA page registers with patterns AA, 55, FF and 00. ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_17S POST_17S PROC NEAR ifdef DMA_CHANNEL_TEST push si ; save msg pointer mov ax,G_RAM mov ds,ax cmp word ptr ds:[User_Reboot],CTRL_ALT_DEL ; warm boot? je short page_ret mov dx,81h ; test dma page address lines ; ; Write data patterns out to each page register port ; page_test1: mov ax,dx ; data pattern to be written out dx,al ; write to port NEWIODELAY cmp ax,8eh ; are we finished? je short page_test2 ; jump to next cycle if so inc dx ; point to next port and go on jmp short page_test1 ; ; Verify data patterns in each page register port ; page_test2: in al,dx ; read page register back NEWIODELAY cmp al,dl ; data equals to lower port address? jne short page_fail ; jump if failed cmp dx,81h ; are we done? je short page_test3 ; jump if so dec dx ; point to next port to be jmp short page_test2 ; test and continue ; ; Test each port with AA, 55, FF and 00 ; page_test3: mov al,0aah ; test dma register data lines page_test4: mov ah,al ; save pattern out dx,al ; write to port NEWIODELAY in al,80h ; change bus state NEWIODELAY in al,dx ; read dma register back NEWIODELAY cmp al,ah ; data correct? jne short page_fail ; jump if fail cmp dx,8eh ; are we finished? 304 je short page_test5 ; jump if so inc dx ; point to next port jmp short page_test4 ; and continue page_test5: mov dx,81h ; point to first page register or al,al ; done with all data pattern? jz short page_ret ; return from here if so cmp al,0aah ; first pattern? je short page_test6 ; yes cmp al,55h ; second pattern? je short page_test7 ; yes xor al,al ; must be 0ffh, jmp short page_test4 ; continue with last pattern page_test6: mov al,55h ; test 55 pattern jmp short page_test4 page_test7: mov al,0ffh ; test 0ffh pattern jmp short page_test4 page_fail: pop si ; print message stc ret page_ret: pop si endif ;DMA_CHANNEL_TEST clc ret POST_17S ENDP ;[]==============================================================[] ; ;POST_18S: ; ; Test 8254 Channel 0. ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_18S POST_18S PROC NEAR clc ret POST_18S ENDP ;[]==============================================================[] ; ;POST_19S: ; ; Test 8254 Channel 1. ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_19S POST_19S PROC NEAR clc ret POST_19S ENDP ;[]==============================================================[] ; ;POST_20S: ; ; Test 8254 Channel 2. ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_20S POST_20S PROC NEAR ifndef Gx86_PCI_REG ;R119 ifndef No_Test_8254_Channel_2 ;R131 mov al,2 ; channel 2 call Test_8254 endif ;No_Test_8254_Channel_2 ;R131 ; ; Re-initialize to proper mode. ; mov al,0b6h ; init timer 2 for normal operation out 43h,al NEWIODELAY mov ax,500h ; counter value out 42h,al ; lsb NEWIODELAY mov al,ah ; msb out 42h,al endif ;Gx86_PCI_REG ;R119 ret ;[]==============================================================[] ; ;TEST_8254: ; ; Test an 8254 channel. ; ;Saves: NONE ; ;Entry: AL Timer number (0-2) ;Exit: NONE ; ;[]==============================================================[] TEST_8254 LABEL NEAR ifndef NO_8254_CHANNEL_TEST push si mov ch,0ffh ; pattern, all 1's mov dx,40h ; setup counter register add dl,al shl al,6 ; channel to be test in bit 7,6 mov ah,al ; save it test_8254_1: or al,10h ; mode 0, binary count, lsb only out 43h,al ; init timer NEWIODELAY ; delay mov al,ch ; pattern to be test out dx,al ; write to counter register NEWIODELAY mov al,ah ; latch command out 43h,al ; tell timer controller NEWIODELAY in al,dx ; read count back NEWIODELAY cmp al,ch ; compare with written pattern jne short test_8254_fail ; jump if fail or al,al ; done? jz short test_8254_ret ; jump if so xor ch,ch ; 0 pattern mov al,ah ; selected counter jmp short test_8254_1 ; continue to test test_8254_fail: pop si stc ret test_8254_ret: pop si endif; NO_8254_CHANNEL_TEST clc ret POST_20S ENDP PAGE ;[]==============================================================[] ; ;POST_21S: ; ; If not a warm boot, test 8259 interrupt mask bits for ; channel 1. ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_21S POST_21S PROC NEAR mov ax,G_RAM mov ds,ax cmp word ptr ds:[USER_REBOOT],CTRL_ALT_DEL je short post_8259_exit xor ax,ax ; select interrupt controller #1 jmp short Test_8259_Mask ; jump if actual test routine POST_21S ENDP ;[]==============================================================[] ; ;POST_22S: ; ; If not a warm boot, test 8259 interrupt mask bits for ; channel 2. ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_22S POST_22S PROC NEAR cli mov ax,G_RAM mov ds,ax cmp word ptr ds:[User_Reboot],CTRL_ALT_DEL je short post_8259_exit mov ax,80h ; select interrupt controller#2 ; ; Fall through to TEST_8259_MASK ; ;[]==============================================================[] ; ;TEST_8259_MASK: ; ; Test the mask bits for an 8259 interrupt controller. ; ;Saves: NONE ; ;Entry: AX Port address of 8259 ;Exit: NONE ; ;[]==============================================================[] TEST_8259_MASK LABEL NEAR ifndef No_8259_Mask_Test push si ; save string cli ; disable interrupt mov dx,a8259+1 ; interrupt mask port base address add dx,ax xor al,al ; test pattern post_8259_cont: mov ah,al ; save pattern for comparison out dx,al ; write pattern to mask register NEWIODELAY in al,80h ; change bus state NEWIODELAY in al,dx ; read mask register back NEWIODELAY cmp al,ah ; is it what we wrote? jne short post_8259_fail ; jump if not equal inc al or al,al ; continue with next pattern jz short post_8259_ret ; return to caller if finished jmp short post_8259_cont post_8259_fail: pop si stc jmp short post_8259_exit post_8259_ret: pop si endif ;No_8259_Mask_Test clc post_8259_exit: mov al,0b8h ; init controller #1 out a8259+1,al NEWIODELAY ; mask channel 4 off mov al,0bfh ;mask IRQ 9 out b8259+1,al ret POST_22S ENDP ;[]==============================================================[] ; ;POST_23S: ; ; Test stuck 8259's... ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_23S POST_23S PROC NEAR clc ret POST_23S ENDP ;[]==============================================================[] ; ;POST_24S: ; ; Test 8259 functionality. ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_24S POST_24S PROC NEAR cli ; disable interrupts mov ax,G_RAM ; seg_0 mov ds,ax assume ds:G_RAM ; ; Move INT 08h vector to a temporary routine ; mov dx,word ptr [int08] ; save vector mov bx,word ptr [int08+2] mov word ptr [int08],offset Post_24S_Wait ; tmr isr entry mov word ptr [int08+2],cs ; code segment ; ; Enable just the timer interrupt ; mov al,0ffh ; mask all interrupts on controller 2 out B8259+1,al ; tell controller NEWIODELAY dec al ; mask all except timer (IRQ 8) out A8259+1,al ; tell controller ; ; Set up timer 0 ; mov al,30h ; setup timer counter 0 out 43h,al ; select counter 0 NEWIODELAY mov ax,8 ; load counter with a value out 40h,al ; write lsb NEWIODELAY mov al,ah ; write msb out 40h,al ; ; Wait for an interrupt ; xor ax,ax ; clear interrupt flag mov cx,7000h sti ; enable interrupt loop short $ ; wait for interrupt cli ; disable interrupts ; ; Turn off all of the interrupts ; push ax ; save interrupt counts mov al,0ffh ; mask all interrupts out A8259+1,al ; tell controller NEWIODELAY ; ; Reset timer ; mov al,36h out 43h,al ; select counter 0 NEWIODELAY xor al,al ; load counter with a value out 40h,al ; write lsb NEWIODELAY out 40h,al ; ; Restore INT 08h vector ; mov word ptr [int08],dx ; restore old vector mov word ptr [int08+2],bx ; ; Check if interrupt occurred. If no interrupt occurred, AX will ; contain a 0000h. Otherwise it will be non-zero, changed by ; the interrupt service routine. ; pop ax ; restore ax or ax,ax ; any interrupt at all? jnz short post_24s_ret stc jmp short post_24s_exit post_24s_ret: clc post_24s_exit: cli mov al,0b8h ; init controller #1 out a8259+1,al NEWIODELAY ; mask channel 4 off mov al,0bfh ;mask IRQ 9 out b8259+1,al ret POST_24S endp ;[]==============================================================[] ; ;POST_24S_WAIT: ; ; Temporary interrupt service routine for post 24. ; ;Saves: NONE ; ;Entry: NONE ;Exit: CX 1 (to reduce loop) ; AX Non-zero ; ;[]==============================================================[] ALIGN 4 POST_24S_WAIT PROC NEAR mov cx,1 ; to reduce execution time NEWIODELAY mov al,END_OF_INT ; eoi command out a8259,al ; tell controller NEWIODELAY iret POST_24S_WAIT ENDP ;[]==============================================================[] ; ;POST_25S: ; ; Test stuck NMI's ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_25S POST_25S PROC NEAR ;r143 start ifdef RPB_ENABLED ; RXX extrn rpb_reinit:near call rpb_reinit ; re=initialize rpb serial port endif ; RPB_ENABLED ;r143 end clc ret POST_25S ENDP ;[]==============================================================[] ; ;POST_26S: ; ; POSTs 26-29 are reserved for future testing... ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_26S POST_26S PROC NEAR PUBLIC POST_27S POST_27S LABEL NEAR PUBLIC POST_28S POST_28S LABEL NEAR PUBLIC POST_29S POST_29S LABEL NEAR clc ret POST_26S ENDP ;[]==============================================================[] ; ;POST_30S: ; ; EISA NVM Checksum. If good, execute EISA tests. If bad, ; execute ISA Tests. ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_30S POST_30S PROC NEAR cli mov word ptr EISA_MODE[bp],0 ; force ISA mode IF BUS_TYPE EQ EISA_BUS call Init_Eisa_Slots ENDIF ;BUS_TYPE Do_ISA_POST: mov cx,ISA_POST_CODE mov di,offset ISA_POST_Tests dip_1: call RAM_POST_Tests jc short dip_1 ; ; Join EISA/ISA back together... ; Do_Common_POST: mov cx,COMMON_POST_CODE mov di,offset Common_POST_Tests dcp_1: call RAM_POST_Tests jc short dcp_1 jmp HaltSystem POST_30S ENDP ;[]==============================================================[] ; ; POST_48S: ; ; Find and display the size of base memory (0-640k) and ; extended memory (1M+) ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_48S POST_48S PROC NEAR ifndef PCI_BUS call Try_Other_Shadow ;shadow adaptor ROM endif; PCI_BUS ;Before memory sizing , we must program chipset's remap feature if needed F000_call Ct_Remap ifndef KBC_KBDMOUSE_SWAP ;R115 mov ax,0f000h mov ds,ax lea si,SYSTEM5_BYTE ;R161 cmp byte ptr [si],AMIKBC ;R161 je short Send_C9 ;R161 cmp byte ptr [si],MRKBC ;R161 jne short No_Extra_Byte0 ;R161Send_C9: ;R161 mov al,0c9h ;disable D0/D1 command ;R161 out STAT8042,al ;command to KBC ;R161 NEWIODELAY ;R161 call F000_Buffer_8042_Full ;wait for command accepted ;R161No_Extra_Byte0: call Get_Switch ;R62 call Special_KBC_Init endif; KBC_KBDMOUSE_SWAP ;R115 cli mov ax,G_RAM ; setup ds point to low ram mov ds,ax mov Size_Sysram,ax ; reset memory size mov al,CMOS_STATUS[bp] test al,CKSM_STATUS ; CMOS checksum bad? jnz short p48_1 ; yes... mov ax,word ptr BASE_MEMORY[bp] ; move orig. amount to 40: area mov Size_Sysram,ax ; ; Size base memory (0-640K) ; p48_1: mov ax,G_RAM mov ds,ax ;R112 start ifdef Flash_2M_support ;ACPI tables are combine at 8000:0 with /other option (8000:0 is the only place that works) ;Need to save the content of ACPI. Just testing 640K base memory from 90000h on. mov dx,240h ; mov bx,9000h ;temp ACPI combined at 8000:0 ;and need to preserve else; Flash_2M_support ;R112 end mov dx,100h ; start after 4th 64K at mov bx,4000h ; 64K segment 4000:0000. endif; Flash_2M_support ;R112 cld ALIGN 4 p48_2: cmp bx,6000h ;R142 je short skip_mem_test ;R142 mov es,bx xor edi,edi mov eax,5a5a5a5ah mov dword ptr es:[di],eax mov dword ptr es:[0fff0h],eax ; change bus state cmp dword ptr es:[di],eax ; top of memory? jnz short p48_3 mov eax,0a5a5a5a5h ; double check memory existence... mov dword ptr es:[di],eax mov dword ptr es:[0fff0h],eax ; change bus state cmp dword ptr es:[di],eax ; top of memory? mov dword ptr es:[di],0 jnz short p48_3 skip_mem_test: ;R142 add dx,40h ; next 64k chunk add bx,01000h cmp bx,0a000h ; at A000:0000 yet? jne short p48_2 ; no, keep going p48_3: mov Size_SysRAM,dx ; save found system memory size sp_skip_1: ; ; Set the 128Kb extension board presence bit ; p48_4: and INFO_FLAG[bp],NOT EXT_128KB cmp dx,200h ; >512K memory? jbe short p48_5 or byte ptr INFO_FLAG[bp],EXT_128KB ; ; Detect if base memory has changed... ; p48_5: and byte ptr CMOS_STATUS[bp], NOT MEM_STATUS mov ax,BASE_MEMORY[bp] cmp ax,dx ; same as last power-up? je short p48_6 ; yes... mov BASE_MEMORY[bp],dx ; force base memory ;[]==============================================================[] ; Here we will size extended memory, starting at just over ; the 1M boundary. We will continue until we fail to read ; what we write or we come to the 64M boundary. ;[]==============================================================[] p48_6: ; Return... cli ;R15 - start xor ax,ax mov ds,ax ;segment at 0 ;save data to avoid destoried by memory sizing due to wrap-around push dword ptr ds:[0FFF8H] push dword ptr ds:[0FFFCH] ;write a pre-defined pattern to check wrap-around mov dword ptr ds:[0FFF8H],12345678H ;R15 - end mov ax,G_RAM mov ds,ax ; Go into protected mode... call Enable_Prot_Mode ; enable protected mode jc Exit_Mem_Sizing ; R15 ;R15 jnc short p48_61 ; in protected mode ; call Silent_Post_Error ; set post error ;R15 ;R15 clc ;R15 ret p48_61: ; Size extended memory from 1Mb xor eax,eax mov ax,10h p48_62: mov byte ptr ds:[(GDT_LOC+TEST_INDEX)+HIBASE+20000h],al mov byte ptr ds:[(GDT_LOC+TEST_INDEX)+MSBASE+20000h],ah mov si,TEST_INDEX mov es,si ; es = test segment mov ebx,es:[0fffch] ;R204 mov ecx,es:[0fff8h] ;R204 mov dword ptr es:[0fff8h],0 ; write data to memory mov dword ptr es:[0fffch],eax ; flush bus ;stop memory sizing if wrap-around ;R15 ;R15A call Check_Wrap_Around ;R15 ;R15A je short P48_64 ;R15 cmp dword ptr ds:[0fff8h], 12345678h ;R15A jne short P48_64 ;R15A cmp dword ptr es:[0fff8h],0 ; memory exist? mov dword ptr es:[0fff8h],0 ; clear offboard latches jne short p48_64 ; end of memory p48_621: mov dword ptr es:[0fff8h],0ffffffffh ; write data into memory mov dword ptr es:[0fffch],eax ; flush bus cmp dword ptr es:[0fff8h],0ffffffffh ; memory exist?? mov dword ptr es:[0fff8h],0ffffffffh ; clear off board parity latches jne short p48_64 ; jump if no more mem found mov dword ptr es:[0fff8h],0 ; write data into memory mov dword ptr es:[0fffch],eax ; flush bus cmp dword ptr es:[0fff8h],0 ; memory exist?? mov dword ptr es:[0fff8h],0 ; clear offboard parity latches jne short p48_64 ; jump if no more mem found p48_623: inc ax ; increment 64k mem count mov es:[0fffch],ebx ;R204 mov es:[0fff8h],ecx ;R204 ifdef MAX_DRAM_SIZE cmp ax,MAX_DRAM_SIZE ; DRAM size limit else; MAX_DRAM_SIZE ;R46 cmp ax,MAX_MEM_SIZE*4 ; (400H*4) 256Mb yet? ;R46A cmp ax,MAX_MEM_SIZE*4*2 ; (400H*4) 512Mb yet?;R46 ;R46B cmp ax,MAX_MEM_SIZE*4*4 ; (400H*16) 1Gb yet?;R46A cmp ax,MAX_MEM_SIZE*4*8 ; (400H*32) 2Gb yet?;R46B endif; MAX_DRAM_SIZE jae short P48_64 ; test only up to 256Mb jmp p48_62 ;R15 ;R15 jmp short p48_62 ; Enable parity p48_64: mov es:[0fffch],ebx ;R204 mov es:[0fff8h],ecx ;R204 ; Save amount found sub ax,10h ; ax = no. of 64k chunk above 1M shl eax,6 ; change to 1K mov EXT_MEM_SIZE[bp],eax ; save memory found cmp eax,0ffffh ; over 64Mb jbe short @F ; No. mov ax,0ffffh ; set 65535Kb max. @@: and ax,0FFC0h mov cx,ax ; save orginial size ; Write information to the screen... p48_65: call Shutdown_From_Mem_Test ; back to real mode... F000_call Ct_Ext_Mem_Limit ; limit extended size mov EXT_MEM_FOUND[bp],ax ; save amount of memory found in CMOS cmp cx,ax je short @F ; extended size changed xor ecx,ecx mov cx,ax mov EXT_MEM_SIZE[bp],ecx ; save memory found @@: sti ; Display amount of memory sp_skip_2: ; Check to see if the ext. memory has changed. p48_68: mov dx,EXT_MEM_FOUND[bp] ; get the found amount of ext. memory mov EXT_MEMORY[bp],dx ; set value p48_69: IF BIOS_SUPPORT_IBM_CPU call IBMCPU_Cacheable_Size endif ;BIOS_SUPPORT_IBM_CPU call Prg_K5_Write_Allocate ;R92 ;R15 - start Exit_Mem_Sizing: xor ax,ax mov ds,ax ;segment at 0 ;restore data to avoid destoried by memory sizing due to wrap-around pop dword ptr ds:[0FFFCH] pop dword ptr ds:[0FFF8H] ;R15 - end clc ret POST_48S ENDP ;R15 - start ;R15A;Input : AX - address for above 1Mb ;R15A;Output: zero set - wrap around occured ;R15A; non-zero - no wrap around ;R15ACheck_Wrap_Around proc near ;R15A ;R15A ;check if wrap-round at first 64Kb ;R15A mov byte ptr ds:[(GDT_LOC+TEST_INDEX)+HIBASE+20000h],00H ;R15A mov byte ptr ds:[(GDT_LOC+TEST_INDEX)+MSBASE+20000h],00H ;R15A ;R15A mov si,TEST_INDEX ;R15A mov es,si ; es = test segment ;R15A ;R15A cmp byte ptr es:[0fff8h],0 ; write data to memory ;R15A ;R15A mov byte ptr ds:[(GDT_LOC+TEST_INDEX)+HIBASE+20000h],al ;R15A mov byte ptr ds:[(GDT_LOC+TEST_INDEX)+MSBASE+20000h],ah ;R15A ;R15A mov si,TEST_INDEX ;R15A mov es,si ; es = test segment ;R15A ;R15A ret ;R15ACheck_Wrap_Around endp ;R15 - end ALIGN 4 PUBLIC Ptn_Tbl ; compuadd only Ptn_tbl dd 0aa55aa55h ; adjacent bit shorts ifdef Special_DRAM_Test_Pattern ;R86 dd 055aaa5a5h ;R86 Special else ;Special_DRAM_Test_Pattern ;R86 dd 055aa55aah ; opposite adjacent bits endif ;Special_DRAM_Test_Pattern ;R86 ; dd 001000101h ; odd bits for parity chip ; dd 0ffffffffh ; stuck at one dd 000000000h ; stuck at 0, boot with memory 0 PTN_TBL_END EQU $ ;[]==============================================================[] ; ;GNXPTN: ; ; Get the next memory test pattern. ; ; ;Saves: ES,DI ; ;Entry: EAX Current test pattern ;Exit: EAX Next test pattern ; C Set if done with patterns... ; ;[]==============================================================[] PUBLIC GNXPTN GNXPTN PROC NEAR push di push es push cs pop es ; segment of table mov di,offset ptn_tbl ; address of table mov cx,(ptn_tbl_end - offset ptn_tbl) shr 2 ; length cld ; forward direction repne scasd ; scan jcxz short gnxptn_done ; cx 0 not found mov eax,es:[di] ; load value clc gnxptn_ret: pop es pop di ret ; the only return point gnxptn_done: stc jmp short gnxptn_ret GNXPTN ENDP ;[]==============================================================[] ;POST_49S: ; Test all of memory above 1Mb using virtual 8086 mode ; paging mode. If warm boot, we only use one testing pattern ; (00000000h) which also happens to clear memory. ;Saves: NONE ;Entry: NONE ;Exit: NONE ;[]==============================================================[] PUBLIC POST_49S POST_49S PROC NEAR ;R261 - start ifdef RTM_CLOCKGEN extrn RTM_Turbo_Freq:near call RTM_Turbo_Freq endif; RTM_CLOCKGEN ;R261 - end ;R265 - start ifdef Superio_Need_before_Memory_Sizing extrn Superio_Before_Memory_Sizing:Near call Superio_Before_Memory_Sizing endif ;Superio_Need_before_Memory_Sizing ;R265 - end ;R222A - start ifdef LID_EMULATE_KEYLOCK call KeyLockCheck ;check keylock status endif; LID_EMULATE_KEYLOCK ;R222A - end ;R248 start ifndef KBC_KBDMOUSE_SWAP ifdef Check_KBD_MOUSE_WRONG_PLUG push ds push cs pop ds push word ptr CURSOR_X[bp] push word ptr CURSOR_Y[bp] mov byte ptr CURSOR_X[bp],0 mov byte ptr CURSOR_Y[bp],8 extrn Plugwrong_STR:near extrn Plugwrong_STR_LEN:ABS mov si,offset Plugwrong_STR call F000_Display_string CheckPlug: call Check_KB_WrongPlug jc short CheckPlug mov byte ptr CURSOR_X[bp],0 mov cx,Plugwrong_STR_LEN clearstr: mov al,' ' call F000_Display_Char loop short clearstr pop word ptr CURSOR_Y[bp] pop word ptr CURSOR_X[bp] pop ds endif ;Check_KBD_MOUSE_WRONG_PLUG endif; KBC_KBDMOUSE_SWAP ;R248 end ;R67 cli ;R67 cld ;R67 mov byte ptr MEM_ERR_STATUS[bp],0 ;R67 ;R67; Size base memory ;R67 ;R67 mov ax,G_RAM ;R67 mov ds,ax ;R67 ;R67 cli ;R67 mov dx,4 ; start at 256K ;R67 mov bx,Size_Sysram ; system memory size in 1k ;R67 shr bx,6 ; bx has maximum mem to be test ;R67 call Check_Warm_Boot ;R67 je short @F ;R67 mov si,offset Test_Mem_Msg ;R67 call Disp_Str_In_POST ;R67 @@: ;R67 call Mem_Test ;R67; Size extended memory ;R67 ;R67 mov ax,G_RAM ;R67 mov ds,ax ;R67 ASSUME DS:G_RAM ;R67 ;R67 cmp word ptr ds:[User_Reboot],CTRL_ALT_DEL ;R67 je short p49_0 ;R67 ;R67IFDEF NoteBook_Power_Management ;R67;R31 F000_Call Check_0V_Resume ;R67 Call F000_Check_0V_Resume ;R31 ;R67 jnz short p49_0 ;R67ENDIF ;NoteBook_Power_Management ;R67 ;R67ifdef VGA_SHARE_MEMORY ;R67 F000_call Ct_Share_Memory_Size ;R67 or ax,ax ;R67 jz short Share_0k ;R67 push ax ;R67 push cs ;R67 pop ds ;R67 mov si,offset Share_Size_Msg ;R67 call Disp_Str_In_BIOS ;R67 pop ax ;R67 F000_call Disp_Word_Int5 ;R67Share_0k: ;R67endif ;VGA_SHARE_MEMORY ;R67 ;R67 push ds ;R67 push 0f000h ;R67 pop ds ;R67 mov si,offset skip_mem_msg ;R67 call Disp_Str_In_BIOS1 ;R67 pop ds ;R67p49_0: ;R67 cli ;R67 mov dx,10h ; start in extended memory ;R67 mov ebx,EXT_MEM_SIZE[bp] ;R67 shr ebx,6 ;R67 ;R67 add bx,dx ; end of extended memory ;R67 ;R67 call Check_Warm_Boot ;R67 je short _uytr ;R67 mov si,offset Test_Ext_Msg ;R67 call Disp_Str_In_POST ;R67_uytr: ;R67 call Mem_Test ;R67 call Check_Warm_Boot ;R67 je short NO_SHOW_MEM ;R67 ;R67 ;R67 mov dx,MSG_LOC[bp] ;R67 call F000_Cursor_Set ;R67 ;R67ifdef Show_Total_After_Memory_Test ;R67 ;R67 ;show total memory size (multiple of 512K) ;R67 ;R67 mov cl,0 ;R67 F000_call Read_Memory ;R67 ;R67else ;Show_Total_After_Memory_Test ;R67 ;R67 ;show top memory address ;R67 ;R67 xor eax,eax ;R67 mov ax,END_SEG[bp] ;R67 shl eax,6 ;R67 cmp eax,640 ;R67 jne short @F ;R67 mov eax,1024 ;R67 @@: ;R67 ;R67endif ;Show_Total_After_Memory_Test ;R67 ;R67 F000_call Disp_Dword_Int6 ;R67 ;R67 call F000_Vcrlf ;R67 NO_SHOW_MEM: ;R67 ;R67 call KBD_A20_OFF ;R67 ;R67;R44AIFDEF USB_SUPPORT ;R44 ;R67;R44A; test byte ptr CMOS_STATUS[bp], KBD_STATUS ;R44 ;R67;R44A; jz @f ;R44 ;R67;R44A call usb_kbd ;R44 ;R67;R44B and byte ptr CMOS_STATUS[bp],not (KBD_STATUS+EQUIP_STATUS) ;R44 ;R67;R44A@@: ;R44 ;R67;R44AENDIF ;USB_SUPPORT ;R44 ;R67;R44C - start ;R67ifdef USB_SUPPORT ;R67 call Ct_SMI_Handler_Init ;R67;R63 call Usb_Kbd ;R67 call Usb_Init ;R63 ;R67 jc short @f ;no USB keyboard found ;R67 and byte ptr CMOS_STATUS[bp],not (KBD_STATUS+EQUIP_STATUS) ;R67@@: ;R67endif ;USB_SUPPORT ;R67;R44C - end ;R67 - start cli cld mov byte ptr MEM_ERR_STATUS[bp],0 ; Size base memory mov ax,G_RAM mov ds,ax ASSUME DS:G_RAM ;R129 - start ;R201 - start ifdef P6_BIOS_ONLY extrn Prg_1stCpu_Mtrr:near ;Program maximum 512Mb cacheable range before L2 initilization xor bh,bh ;512Mb Max. call Prg_1stCpu_Mtrr ifdef KLAMATH_CPU_ONLY push ds cli call ConfigurePProL2Cache ;L2 cache initialization ;Program cacheable range according to L2 cache capability extrn P2_L2_CacheRange:near call P2_L2_CacheRange ;Get L2 max. cacheable range or bh,bh ;512Mb maximum range ? jz short NoReSetMtrr ;yes, only 512Mb Max. xor ax,ax mov ds,ax mov byte ptr ds:[4FFH],bh ;temporary storage for 1st ;CPU's Max. cacheable range ;Re-program MTRR with higher cacheable range than 512Mb call Prg_1stCpu_Mtrr ;Set MTRR with Max. Crange NoReSetMtrr: pop ds endif; KLAMATH_CPU_ONLY endif; P6_BIOS_ONLY ;R201 - end ;R201;R148 - start ;R201ifdef KLAMATH_CPU_ONLY ;R201 mov si,offset ExtCache_Item ;get CMOS status of L2 cache ;R201 call F000_GetItem_Value ;R201 mov bl,al ;for Set_Cpu_Mtrr use ;R201endif; KLAMATH_CPU_ONLY ;R201;R148 - end ;R201 ;R201 mov esi,EXT_MEM_SIZE[bp] ;extended memory size ;R201 mov al,1 ;program address above 1Mb ;R201 call Set_Cpu_MtRR ;R201A - start IF BIOS_SUPPORT_586 mov esi,EXT_MEM_SIZE[bp] ;extended memory size mov al,1 ;program address above 1Mb call Set_Cpu_MtRR ENDIF ;BIOS_SUPPORT_586 ;R201A - end ifdef P6_BIOS_ONLY push ds ;R239 mov ax,4100H ;R239 mov ds,ax mov esi,EXT_MEM_SIZE[bp] ;extended memory size ;R239 mov dword ptr ds:[0],esi ;save extended size xor ax,ax ;R239 mov ds,ax ;R239 data segment mov dword ptr ds:[50CH],esi ;save extended size;R239 call Init_Apic ;R201 - start ifdef MP_SUPPORT ifdef KLAMATH_CPU_ONLY ;R201B ;Only for Penitum II CPUs , not for Pentium Pro call P2_L2_CacheRange ;Get L2 max. cacheable range xor ax,ax mov ds,ax cmp bh,byte ptr ds:[4FFH] ;need to re-program MTRR ? jbe short NoMPReSetMtrr mov bh,byte ptr ds:[4FFH] ;get new range to re-program ;Re-program MTRR due to 2nd CPU's range is smaller call Prg_1stCpu_Mtrr ;Set MTRR with Max. Crange NoMPReSetMtrr: endif;KLAMATH_CPU_ONLY ;R201B endif; MP_SUPPORT ;R201 - end pop ds endif; P6_BIOS_ONLY ifdef USB_SUPPORT ifndef SMIHANDLE_IN_XGROUP ;R183 call Usb_Init else ;SMIHANDLE_IN_XGROUP ;R183 Xcall Usb_Init ;R183 endif ;SMIHANDLE_IN_XGROUP ;R183 endif ;USB_SUPPORT ;R129 - end ifdef JUMPLESS_SUPPORT ;R247 ifdef POWER_ON_PRESS_SPECIAL_KEY_INTO_SETUP_SUPPORT ;R247 call into_the_Setup ;R247 endif; POWER_ON_PRESS_SPECIAL_KEY_INTO_SETUP_SUPPORT ;R247 endif; JUMPLESS_SUPPORT ;R247 ;R152E start ifdef Flash_2M_support push ds pushf cli call E000_A20_On ; turn on a20 gate ;R72 call E000_Enter_Prot_mode ;enter CPU protected mode mov ax,ds mov es,ax ;setup descriptor table call E000_Back_Real_Mode ;R186 enter CPU big real mode mov esi,160000h mov edi,80000h mov ecx,8000h db 67h rep movsd ;move extend 128k data to 160000h ;R186 call E000_Back_Real_Mode F000_CALL A20_Off ;turn gate A20 off popf pop ds endif ;Flash_2M_support ;R152E end ifndef ALWAYS_MEMORY_TEST ;R209 cmp word ptr ds:[User_Reboot],CTRL_ALT_DEL je Fill_Mem_0 endif ;ALWAYS_MEMORY_TEST ;R209 ;R198 IFDEF NoteBook_Power_Management if STD_Function EQ 1 ;R198 Call F000_Check_0V_Resume jnz Fill_Mem_0 ;skip memory testing if 0V suspend endif ;STD_Function EQ 1 ;R198 ;R198 ENDIF ;NoteBook_Power_Management ;R218 start ifdef VSA_VGA ifdef S2D_SUPPORT call FCheck_VSA_resume jnz Fill_Mem_0 endif ;S2D_SUPPORT endif ;VSA_VGA ;R218 end ifdef HPM_Support ;R176A call FCheck_HPM_Resume ;R176A jnz Fill_Mem_0 ;R176Askip memory testing endif ;HPM_Support ;R176A ;display "skip memory test" message at bottom line push ds push 0f000h pop ds mov si,offset skip_mem_msg call Disp_Str_In_BIOS1 pop ds ;R253- start ifndef QuickPost_ExtMem_Test_Used_Pattern_Tbl mov si,offset QuickPost_Item call F000_GetItem_Value or al,al jz short Not_Quick_post_test_mem mov al,TRUE call F000_Cpu_Cache Not_Quick_post_test_mem: endif; QuickPost_ExtMem_Test_Used_Pattern_Tbl ;R253- end ;Test base memory from 256kb-640kb cli ;R112 start ;R129ifdef Flash_2M_support ;R154;ACPI tables are combine at 8000:0 with /other option (8000:0 is the only place that works) ;R154;Need to save the content of ACPI. Just testing 640K base memory from 90000h on. ;R154 mov dx,9 ; start at 9000:0 mov dx,7 ; start from 7000:0 ;R154 ifdef Flash_2M_support ;R152B mov bx,8 ;R152B else ;Flash_2M_support ;R152B mov bx,Size_Sysram ; system memory size in 1k endif ;Flash_2M_support ;R152B ;R129else; Flash_2M_support ;R112 end ;R129 mov dx,4 ; start at 256K ;R129 mov bx,Size_Sysram ; system memory size in 1k ;R129endif; Flash_2M_support ;R112 shr bx,6 ; bx has maximum mem to be test ;R129 - start ;R154 ifdef Flash_2M_support ;R154 sub bx, 2 ;R154 else ;Flash_2M_support ;R151ifdef USB_SUPPORT ;R151 dec bx ;R151endif ;USB_SUPPORT ;R154 endif ;Flash_2M_support ;R129 - end ifdef Quiet_Post_Support ;R200 call Ck_Quiet_Post ;R200 jnc short _Kaaa ;R200 endif ;Quiet_Post_Support ;R200 mov si,offset Test_Mem_Msg call Disp_Str_In_POST _Kaaa: ;R200 call Mem_Test ;R152E;R152C start ;R152Eifdef Flash_2M_support ;R152E pushf ;R152E cli ;R152E call E000_A20_On ; turn on a20 gate ;R72 ;R152E call E000_Enter_Prot_mode ;enter CPU protected mode ;R152E mov ax,ds ;R152E mov es,ax ;setup descriptor table ;R152E ;R152E mov esi,160000h ;R152E mov edi,80000h ;R152E mov ecx,8000h ;R152E db 67h ;R152E rep movsd ;move extend 128k data to 160000h ;R152E ;R152E call E000_Back_Real_Mode ;R152E F000_CALL A20_Off ;turn gate A20 off ;R152E popf ;R152Eendif ;Flash_2M_support ;R152E;R152C end mov ax,G_RAM mov ds,ax ASSUME DS:G_RAM ifNdef No_Show_Share_Memory_Size ;R98C ifdef VGA_SHARE_MEMORY ifdef Quiet_Post_Support ;R200 call Ck_Quiet_Post ;R200 jnc short Share_0k ;R200 endif ;Quiet_Post_Support ;R200 ;display shared memorys size if VUMA or SMBA system F000_call Ct_Share_Memory_Size ;get shared mem. size or ax,ax ;no mem. shared ? jz short Share_0k ;yes, nothing to show push ax push cs pop ds mov si,offset Share_Size_Msg call Disp_Str_In_BIOS pop ax F000_call Disp_Word_Int5 Share_0k: endif ;VGA_SHARE_MEMORY endif ;No_Show_Share_Memory_Size ;R98C ;Test extended memory cli mov dx,10h ; start in extended memory mov ebx,EXT_MEM_SIZE[bp] shr ebx,6 add bx,dx ; end of extended memory ifdef Quiet_Post_Support ;R200 call Ck_Quiet_Post ;R200 jnc short _uaaaa ;R200 endif ;Quiet_Post_Support ;R200 mov si,offset Test_Ext_Msg call Disp_Str_In_POST _uaaaa: ;R200 ifdef Always_QUICKPOST ;R237 jmp short SkipMemTest1 ;R237 endif ;Always_QUICKPOST ;R237 ;R245 - start ifdef ACPI_SUPPORT cmp byte ptr POST_SPEED[bp],Normal_Boot jne short SkipMemTest1 endif ;ACPI_SUPPORT ;R245 - end ;R132 - start ifdef NO_MEM_TEST_IF_QUICKPOST ;skip memory testing if quick POST is enabled in setup mov END_SEG[bp],bx ;end of extended memory mov si,offset QuickPost_Item;get CMOS value call F000_GetItem_Value or al,al ;quick POST ? ;R132A jnz short SkipMemTest jnz short SkipMemTest1 ;R132A endif; NO_MEM_TEST_IF_QUICKPOST ;R132 - end ;R181 - start ifdef Quiet_Post_Support ;R200 call Ck_Quiet_Post ;R200 jnc short _Laaa ;R200 endif ;Quiet_Post_Support ;R200 ;display "skip memory test" message at bottom line push ds push 0f000h pop ds ifdef Graphics_Post ;R185B mov si,offset skip_mem_msg1 ;R185B test byte ptr EQUIPMENT[bp],DT_MONO ;R185B jnz short @F ;R185B cmp byte ptr EPALOGO_FLAG[bp], 055h ;R185C;change msg for show str je short @f ;R185C endif; Graphics_Post ;R185B mov si,offset skip_mem_msg @@: ;R185B call Disp_Str_In_BIOS1 pop ds _Laaa: ;R200 ;R181 - end call Mem_Test SkipMemTest: ;R32 mov dx,MSG_LOC[bp] call F000_Cursor_Set SkipMemTest1: ;R132A ifdef Quiet_Post_Support ;R200 call Ck_Quiet_Post ;R200 jnc short NO_SHOW_MEM ;R200 endif ;Quiet_Post_Support ;R200 ifdef Show_Total_After_Memory_Test ;show total memory size (multiple of 512K) mov cl,0 F000_call Read_Memory else ;Show_Total_After_Memory_Test ;show top memory address xor eax,eax mov ax,END_SEG[bp] shl eax,6 cmp eax,640 jne short @F mov eax,1024 @@: endif ;Show_Total_After_Memory_Test ifdef SPECIAL_SHARE_MEMORY_SHOW ;R98 push eax ;R98 F000_call Ct_Share_Memory_Size ;get shared mem. size ;R98 xor ecx,ecx ;R98 mov cx, ax ;R98 pop eax ;R98 add eax, ecx ;R98 endif ;SPECIAL_SHARE_MEMORY_SHOW ;R98 call E000_Disp_Dword_Int6 ;R72 ;R72 F000_call Disp_Dword_Int6 ;R132A - start ifdef NO_MEM_TEST_IF_QUICKPOST mov si,offset Memmory_Unit call Disp_Str_In_POST endif; NO_MEM_TEST_IF_QUICKPOST ;R132A - end call F000_Vcrlf NO_SHOW_MEM: Fill_Mem_0: ;R174C ;R126 - start ;R174C mov ax,G_RAM ;R174C mov ds,ax ;R174C ASSUME DS:G_RAM ;R174C test byte ptr POST_FLAG,SETUP_ON ; Is SETUP key pressed? ;R174C ;R126 - end ;R174C pushf cli call E000_A20_On ; turn on a20 gate ;R72 ;R72 F000_CALL A20_On ;enable gate A20 call E000_Enter_Prot_mode ;enter CPU protected mode mov ax,ds mov es,ax ;setup descriptor table call E000_Back_Real_Mode ;R186 enter CPU big real mode mov al,TRUE ;R253 call F000_Cpu_Cache ;R253 ;clear 256K-640Kb memory ;R104 mov edi,4*64*1024 ;start from 256k ;R104 mov ecx,(640-256)*1024/4 ;number of dword to clear ;R104 xor eax,eax ;R104 db 67h ;R104 rep stosd ;clear all extended memory ;R142 ;R104A - start ;R142 ;R104B ifndef P6_BIOS_ONLY ;R142 ;clear 256K-640Kb memory ;R142 ;R112 start ;R142 ifdef Flash_2M_support ;R142 ;ACPI tables are combine at 8000:0 with /other option (8000:0 is the only place that works) ;R142 ;Need to save the content of ACPI. Just testing 640K base memory from 90000h on. ;R142 ;R112A mov edi,9*64*1024 ;start from 576k ;R142 ;R112A mov ecx,(640-576)*1024/4 ;number of dword to clear ;R142 mov edi,4*64*1024 ;R112A ;R142 mov ecx,(512-256)*1024/4 ;R112A ;R142 else; Flash_2M_support ;R142 ;R112 end ;R142 mov edi,4*64*1024 ;start from 256k ;R142 ifdef USB_SUPPORT ;R129 ;R142 mov ecx,(640-256-64)*1024/4 ;R129 ;R142 else ;USB_SUPPORT ;R129 ;R142 mov ecx,(640-256)*1024/4 ;number of dword to clear ;R142 endif ;USB_SUPPORT ;R129 ;R142 endif; Flash_2M_support ;R112 ;R142 xor eax,eax ;R142 db 67h ;R142 rep stosd ;clear all extended memory ;R142 ;R104B endif; P6_BIOS_ONLY ;R142 ;R104A - end ;R142 start ;----- clear 4000:0 - 5000:FFFF memory mov edi,4*64*1024 mov ecx,128*1024/4 xor eax,eax db 67h rep stosd ;clear extended memory ;----- clear 7000:0 - 9000:FFFF memory mov edi,7*64*1024 ;start from 7000:0 ;R154 ifdef Flash_2M_support ;R154 mov ecx,64*1024/4 ;size = 64K ;R154 else; Flash_2M_support ;R151ifdef USB_SUPPORT ;R151 mov ecx,(192-64)*1024/4 ;size = 192K-64 ;R151else ;USB_SUPPORT ifdef Flash_2M_support ;R152B ;----- clear 7000:0 - 7000:FFFF memory ;R152B mov ecx,64*1024/4 ;R152Bsize = 64K else ;Flash_2M_support ;R152B ;R226 mov ecx,192*1024/4 ;size = 192K movzx ecx, word ptr ds:Size_Sysram ;R226 shl ecx, 10 ;R226;*1024 sub ecx, edi ;R226 shr ecx, 2 ;R226;/4 endif ;Flash_2M_support ;R152B ;R151endif ;USB_SUPPORT ;R154 endif; Flash_2M_support db 67h rep stosd ;clear all extended memory ;R142 end ;clear 1Mb to top of memory mov edi,1024*1024 ;start from 1Mb mov ecx,EXT_MEM_SIZE[bp] ;no of Kb of extended memory shl ecx,(10-2) ;convert to dword db 67h rep stosd ;clear all extended memory ;R67A - start ;read base memory to flush L2 cache xor esi,esi mov ecx,(640*1024)/4 ;number of dword to clear db 67h rep lodsd ;read memory to invalidate tag ;R67A - end ;R152B start ifdef Flash_2M_support mov esi,80000h mov edi,160000h mov ecx,8000h db 67h rep movsd ;move extend 128k data to 160000h ;----- clear 8000:0 - 9000:FFFF memory xor eax,eax mov edi,8*64*1024 ;start from 8000:0 mov ecx,128*1024/4 ;size = 128K db 67h rep stosd ;clear all extended memory endif ;Flash_2M_support ;R152B end ;R186 call E000_Back_Real_Mode F000_CALL A20_Off ;turn gate A20 off ;R174C popf call KBD_A20_OFF ;set KBC gate A20 off mov al,FALSE ;R253B call F000_Cpu_Cache ;R253B ;R74 - start ;R129 cli ;R129 mov esi,EXT_MEM_SIZE[bp] ;extended memory size ;R129 mov al,1 ;program address above 1Mb ;R129 call Set_Cpu_MtRR ;R129 ;R129ifdef P6_BIOS_ONLY ;R129 mov ax,4100H ;R129 mov ds,ax ;R129 mov esi,EXT_MEM_SIZE[bp] ;extended memory size ;R129 mov dword ptr ds:[0],esi ;save extended size ;R126 F000_call Init_Apic ;R129 call Init_Apic ;R126 ;R129endif; P6_BIOS_ONLY ;R74 - end ;R129ifdef USB_SUPPORT ;R96 call Ct_SMI_Handler_Init ;R129 call Usb_Init ;R78 jc short @f ;no USB keyboard found ;R78 and byte ptr CMOS_STATUS[bp],not (KBD_STATUS+EQUIP_STATUS) ;R78@@: ;R129endif ;USB_SUPPORT ;R67 - end clc ;R58 ret POST_49S ENDP ;R248 start ifndef KBC_KBDMOUSE_SWAP ifdef Check_KBD_MOUSE_WRONG_PLUG Check_KB_WrongPlug proc near mov al,0D4h out 64h,al call Free_8042_Ibuf call Send_KbRdId cmp al,0FAh jne short Noplug call Full_8042_Obuf in al,60h or al,al ;mouse? jz short Noplug ;Yes, jmp cmp al,0abh jne short Noplug call Full_8042_Obuf in al,60h stc ret Noplug: clc ret Check_KB_WrongPlug ENDP Send_KbRdId proc near mov al,0f2h out 60h,al call Free_8042_Ibuf call Full_8042_Obuf ret Send_KbRdId endp Free_8042_Ibuf: in al,64h ;get status test al,02h ;input buffer jnz short Free_8042_Ibuf ret Full_8042_Obuf: push cx push dx mov dl, 6 aa: xor cx, cx @@: in al,64h test al,01h ;output buffer jnz short Full_8042_Obuf_EXIT loop short @b dec dl jnz short aa Full_8042_Obuf_EXIT: in al,60h ;read input data pop dx pop cx ret endif ;Check_KBD_MOUSE_WRONG_PLUG endif; KBC_KBDMOUSE_SWAP ;R248 end ifdef NO_MEM_TEST_IF_QUICKPOST ;R132A Memmory_Unit db 'K OK',0 ;R132A endif; NO_MEM_TEST_IF_QUICKPOST ;R132A ifNdef No_Show_Share_Memory_Size ;R98C ifdef VGA_SHARE_MEMORY Share_Size_Msg: ifdef SPECIAL_SHARE_MEMORY_SHOW ;R98 ;R98A POS <,25,7> ;R98 POS <,26,7> ;R98A db 'with K shared memory' ;R98 ;R98A POS <,29,7> ;R98 POS <,30,7> ;R98A else ;SPECIAL_SHARE_MEMORY_SHOW ;R98 ;R98A POS <,25,7> POS <,26,7> ;R98A db '+ K shared memory' ;R98A POS <,26,7> POS <,27,7> ;R98A endif ;SPECIAL_SHARE_MEMORY_SHOW ;R98 db 0 endif ;VGA_SHARE_MEMORY endif ;No_Show_Share_Memory_Size ;R98C ;R67;[]==============================================================[] ;R67; ;R67;MEM_TEST: ;R67; ;R67; Test a large block of extended memory. ;R67; ;R67;Saves: NONE ;R67;Destroys: CX ;R67; ;R67;Entry: BX End of memory test area in 64K chunks (10h=1M) ;R67; DX Start of memory test area in 64K chunks (10h=1M) ;R67; CS:SI Compressed message to print. ;R67;Exit: C Set if error ;R67;[]==============================================================[] ;R67 ;R67 PUBLIC MEM_TEST ;R67MEM_TEST PROC NEAR ;R67 ;R67 cmp dx,bx ;R67 jge p49_exit ;R67 ;R67 mov START_SEG[bp],dx ;R67 mov END_SEG[bp],bx ;R67 ;R67; ;R67; Enable protected mode... ;R67; ;R67 ;R67 F000_call Cursor_Get ; get the cursor location ;R67 mov MSG_LOC[bp],dx ; and save it for future reference ;R67 ;R67;[]-------------------------------------------------------------[] ;R67;Check quick post or not ;R67 mov si,offset QuickPost_Item ;R67 call F000_GetItem_Value ;R67 push ax ;R67 ;R67IFDEF NoteBook_Power_Management ;R67;R31 F000_Call Check_0V_Resume ;R67 Call F000_Check_0V_Resume ;R31 ;R67 jz short @F ;R67 pop ax ;R67 mov ax,1 ;R67 push ax ;R67 @@: ;R67ENDIF ;NoteBook_Power_Management ;R67 ;R67;[]-------------------------------------------------------------[] ;R67 ;R67 call Enable_Prot_Mode ;R67 jnc short p49_1 ; protected mode is OK ;R67 pop ax ;R67 ;R67 stc ;R67 jmp p49_91 ;R67 ;R67; ;R67; Prepare to do memory testing... ;R67; ;R67 ;R67p49_1: ;R67 ;R67 mov bx,Test_Index ; bx = test DT ;R67 mov si,GDT_LOC+TEST_INDEX ;R67 ;R67;[]-------------------------------------------------------------[] ;R67;Check quick post or not ;R67 pop ax ;R67 or al,al ; quick POST? ;R67 jnz short P49_15 ; yes ;R67;[]-------------------------------------------------------------[] ;R67 ;R67; ;R67; Get test pattern and fill memory ;R67; ;R67 ;R67 test byte ptr POST_FLAG,SETUP_ON ; Is CTRL+ALT+ESC pressed? ;R67 jnz short p49_90 ;R67 ;R67 cmp word ptr ds:[User_Reboot],CTRL_ALT_DEL ;R67 jne short p49_2 ; not warm boot, use normal testing patterns ;R67 ;R67p49_15: ;R67 mov eax,00000000h ; simulate final pattern... ;R67 jmp short p49_21 ;R67 ;R67p49_2: ;R67 mov eax,dword ptr cs:[Ptn_Tbl] ;R67 ;R67p49_21: ;R67 mov dx,START_SEG[bp] ; reset dx ;R67 ;R67 mov cx,4000h-1 ;R67 call Mem_Write ; fill segment ;R67 ;R67; ;R67; Verify memory has correct data against EAX ;R67; ;R67 ;R67p49_3: ;R67 ;R67 ALIGN 4 ;R67 ;R67p49_31: ;R67 ;R67 mov byte ptr ds:[(GDT_LOC+TEST_INDEX)+HIBASE+20000h],dl ;R67 mov byte ptr ds:[(GDT_LOC+TEST_INDEX)+MSBASE+20000h],dh ;R67 ;R67 mov es,bx ;R67 xor di,di ;R67 ;R67 mov cx,4000h-1 ; 32k-1 word count at a time ;R67 rep scasd ; compare data again memory ;R67ifndef PCCHIP ;R67 jz short p49_32 ; memory is OK... ;R67 ;R67 jmp Mem_VError ; memory verify error ;R67 ;R67p49_32: ;R67 xor di,di ;R67 ;R67 cmp es:[di-4],edx ;R67 je short p49_33 ;R67 ;R67 mov eax,edx ;R67 jmp Mem_AError ; address error ;R67endif ;PCCHIP ;R67 ;R67p49_33: ;R67 mov es:[di-4],eax ;R67 ;R67; Display memory size and check for being pressed ;R67 ;R67 call Disp_Mem_Msg ;R67 jc short P49_90 ; finish testing ? ;R47 ;R67 ;R67 cli ;R67 call Enable_Prot_Mode ;R67p49_34: ;R67 inc dx ; point to next 64k segment ;R67 ;R67 cmp dx,END_SEG[bp] ; RAM done? ;R67 jb short p49_31 ; continue if not done... ;R67 ;R67p49_4: ;R67 call Gnxptn ; get next test pattern ;R67 jnc short p49_21 ; not done yet... ;R67 ;R67p49_90: ;R67 call Shutdown_From_Mem_Test ; kill machine for now ;R67 sti ;R67 clc ;R67 ;R67; Used by error routines... ;R67 ;R67p49_91 LABEL NEAR ;R67 pushf ;R67 ;R67 popf ;R67p49_exit: ;R67 push ds ;R67 push 0f000h ;R67 pop ds ;R67 mov si,offset CLR_SKIP_MEM_MSG ;R67 call Disp_Str_In_BIOS1 ;R67 pop ds ;128k ;R67 ret ;R67MEM_TEST ENDP ;R67 ;R67;[]==============================================================[] ;R67; ;R67;MEM_WRITE: ;R67; ;R67; Clear out memory with the pattern which is in EAX. ;R67; ;R67;Saves: NONE ;R67; ;R67;Entry: CX Number of dwords to clear. If CL !=0, mark last save pattern in si ;R67;Exit: None ;R67; ;R67;[]==============================================================[] ;R67 ;R67MEM_WRITE PROC NEAR ;R67 push edx ; save 64k chunk ;R67 ;R67 ALIGN 4 ;R67MW_1: ;R67 call Mem_Clear ;R67 ;R67 cmp dx,END_SEG[bp] ; extended ram done? ;R67 jb short mw_1 ; continue if not ;R67 ;R67mw_2: ;R67 ;R67 pop edx ; rest. 64k chunk ;R67 ret ;R67 ;R67Mem_Clear LABEL NEAR ;R67 ;R67 mov byte ptr ds:[(GDT_LOC+TEST_INDEX)+HIBASE+20000h],dl ;R67 mov byte ptr ds:[(GDT_LOC+TEST_INDEX)+MSBASE+20000h],dh ;R67 ;R67 mov es,bx ;R67 xor di,di ;R67 ;R67 push cx ;R67 ;R67 rep stosd ; store data into memory ;R67 ;R67 pop cx ;R67 ;R67 or cl,cl ; was this to clear or test? ;R67 jz short no_marking ; to clear... ;R67 ;R67 mov es:[di],edx ; mark ;R67no_marking: ;R67 inc dx ; point to next 64k segment ;R67 ret ;R67 ;R67MEM_WRITE ENDP ;R67 - start ;R73 - start QUICK_MEM_TEST = 0 ;normal memory testing ifdef P6_BIOS_ONLY QUICK_MEM_TEST = 1 ;quick memory testing endif; P6_BIOS_ONLY ;R73 - end ;[]==============================================================[] ; ;MEM_TEST: ; ; Test a large block of extended memory. ; ;Saves: NONE ;Destroys: CX ; ;Entry: BX End of memory test area in 64K chunks (10h=1M) ; DX Start of memory test area in 64K chunks (10h=1M) ; CS:SI Compressed message to print. ;Exit: C Set if error ;[]==============================================================[] PUBLIC MEM_TEST MEM_TEST PROC NEAR cmp dx,bx ;R267 jge p49_exit jae p49_exit ;R267 mov START_SEG[bp],dx mov END_SEG[bp],bx ; ; Enable protected mode... ; F000_call Cursor_Get ; get the cursor location mov MSG_LOC[bp],dx ; and save it for future reference ;[]-------------------------------------------------------------[] ;Check quick post or not mov si,offset QuickPost_Item call F000_GetItem_Value push ax ;[]-------------------------------------------------------------[] call Enable_Prot_Mode pop ax jnc short p49_1 ; protected mode is OK stc jmp p49_91 p49_1: ifdef TEST_ONLY_ONE_MEM_PTN ;R197 jmp short P49_15 ;test pattern "0";R197 endif; TEST_ONLY_ONE_MEM_PTN ;R197 ;[]-------------------------------------------------------------[] ;Check quick post or not or al,al ; quick POST? ;R253 - start ifndef QuickPost_ExtMem_Test_Used_Pattern_Tbl jz short Quick_test_mem mov dx,START_SEG[bp] ; reset dx Quick_test_mem_0: call Disp_Mem_Msg jc short P49_90 ; finish testing ? add dx,4 ; point to next 256k segment cmp dx,END_SEG[bp] ; RAM done? jc short Quick_test_mem_0 ; continue if not done... jmp short P49_90 ; finish testing . Quick_test_mem: else; QuickPost_ExtMem_Test_Used_Pattern_Tbl ;R253 - end jnz short P49_15 ; yes endif; QuickPost_ExtMem_Test_Used_Pattern_Tbl ;R253 ;[]-------------------------------------------------------------[] ; ; Get test pattern and fill memory ; test byte ptr POST_FLAG,SETUP_ON ; Is CTRL+ALT+ESC pressed? jnz short p49_90 ;R253A ifdef QuickPost_ExtMem_Test_Used_Pattern_Tbl ;R253 jmp short p49_2 p49_15: xor eax,eax ; simulate final pattern... jmp short p49_21 p49_2: ;R253A endif; QuickPost_ExtMem_Test_Used_Pattern_Tbl ;R253 ; ; Prepare to do memory testing... ; mov eax,dword ptr cs:[Ptn_Tbl] p49_21: mov bx,Test_Index ; bx = test DT mov si,GDT_LOC+TEST_INDEX mov dx,START_SEG[bp] ; reset dx if QUICK_MEM_TEST NE 1 ;R73 mov cx,4000h call Mem_Write ; fill segment endif; QUICK_MEM_TEST ;R73 ; ; Verify memory has correct data against EAX ; ALIGN 4 p49_31: mov byte ptr ds:[(GDT_LOC+TEST_INDEX)+HIBASE+20000h],dl mov byte ptr ds:[(GDT_LOC+TEST_INDEX)+MSBASE+20000h],dh mov es,bx xor di,di if QUICK_MEM_TEST EQ 1 ;R73 mov cx,4000h ; 32k word count at a time rep stosd ; store data into memory xor di,di endif; QUICK_MEM_TEST ;R73 mov cx,4000h ; 32k word count at a time rep scasd ; compare data again memory jnz Mem_Verror ; memory bad ; Display memory size and check for being pressed call Disp_Mem_Msg jc short P49_90 ; finish testing ? ;R47 cli call Enable_Prot_Mode p49_34: inc dx ; point to next 64k segment cmp dx,END_SEG[bp] ; RAM done? jb short p49_31 ; continue if not done... p49_4: call Gnxptn ; get next test pattern jnc short p49_21 ; not done yet... p49_90: call Shutdown_From_Mem_Test ; kill machine for now sti clc ; Used by error routines... p49_91: p49_exit: ;clear message at bottom line push ds push 0f000h pop ds ifdef Graphics_Post ;R185B mov si,offset CLR_SKIP_MEM_MSG1 ;R185B test byte ptr EQUIPMENT[bp],DT_MONO ;R185B jnz short @F ;R185B cmp byte ptr EPALOGO_FLAG[bp], 055h ;R185C;change msg for show str je short @f ;R185C endif; Graphics_Post ;R185B mov si,offset CLR_SKIP_MEM_MSG @@: ;R185B call Disp_Str_In_BIOS1 pop ds ret MEM_TEST ENDP if QUICK_MEM_TEST NE 1 ;R73 ;[]==============================================================[] ; ;MEM_WRITE: ; ; Clear out memory with the pattern which is in EAX. ; ;Saves: NONE ; ;Entry: CX Number of dwords to clear. ;Exit: None ; ;[]==============================================================[] MEM_WRITE PROC NEAR push edx ; save 64k chunk ALIGN 4 MW_1: mov byte ptr ds:[(GDT_LOC+TEST_INDEX)+HIBASE+20000h],dl mov byte ptr ds:[(GDT_LOC+TEST_INDEX)+MSBASE+20000h],dh mov es,bx xor di,di push cx rep stosd ; store data into memory pop cx inc dx ; point to next 64k segment cmp dx,END_SEG[bp] ; extended ram done? jb short mw_1 ; continue if not pop edx ; rest. 64k chunk ret MEM_WRITE ENDP endif;QUICK_MEM_TEST ;R73 ;R67 - end ;[]==============================================================[] ; ;MEM_AERROR: ; ; Memory address error. Marked value at the end of segment ; was not found. ; ;Saves: NONE ; ;Entry: DX Segment where error occurred ; ES:[DI] Found data ; EAX Expected data ; ;Exit: NONE ; ;[]==============================================================[] MEM_AERROR PROC NEAR MEM_AERROR ENDP ;[]==============================================================[] ; ;MEM_VERROR: ; ; Memory verify error. ; ;Saves: NONE ; ;Entry: DX Segment where error occurred ; ES:[DI] Found data ; EAX Expected data ; ;Exit: NONE ; ;[]==============================================================[] MEM_VERROR PROC NEAR MEM_VERROR ENDP ;[]==============================================================[] ; ;MEM_VERROR: ; ; Memory parity error... ; ;Saves: NONE ; ;Entry: DX Segment where error occurred ; ES:[DI] Found data ; EAX Expected data ; ;Exit: NONE ; ;[]==============================================================[] MEM_PERROR PROC NEAR MEM_PERROR ENDP ;[]==============================================================[] ; ;MEM_ERROR: ; ; General memory error handler... ; ;Saves: NONE ; ;Entry: DX Segment where error occurred ; ES:[DI] Found data ; EAX Expected data ; ;Exit: NONE ; ;[]==============================================================[] PUBLIC MEM_ERROR MEM_ERROR PROC NEAR call Shutdown_From_Mem_Test sti ; set error flag for later display or byte ptr CMOS_STATUS[bp],EQUIP_STATUS or byte ptr MEM_ERR_STATUS[bp],MEM_ERR me_9: stc jmp p49_91 MEM_ERROR ENDP ;[]==============================================================[] ; ;DISP_MEM_MSG: ; ; Display the current memory segment checked. Also check to ; see if a key was pressed. ; ;Saves: NONE ; ;Entry: dx = 64k chunk to display ;Exit: NONE ; ;[]==============================================================[] ALIGN 4 PUBLIC DISP_MEM_MSG DISP_MEM_MSG PROC NEAR call Shutdown_From_Mem_Test ; get out prot mode sti ; ; Write amount of memory on same line as last time... ; push eax xor eax,eax mov ax,dx ; put memory segment in ax for display inc ax ; segment already tested push bx push si push dx push ax ; popped later ; Begin memory sizing change mov dx,MSG_LOC[bp] call F000_Cursor_Set ; set to right location pop ax shl eax,6 ifndef ALWAYS_MEMORY_TEST ;R209 call Check_Warm_Boot je short sp_skip_3 endif ;ALWAYS_MEMORY_TEST ;R209 ifdef Quiet_Post_Support ;R200 call Ck_Quiet_Post ;R200 jnc short sp_skip_3 ;R200 endif ;Quiet_Post_Support ;R200 call E000_Disp_Dword_Int6 ;R72 ;R72 F000_call Disp_Dword_Int6 mov si,offset OK_Msg call Disp_Str_In_POST sp_skip_3: sti ; End memory sizing change ; ; Check to see if key was pressed... ; push ds mov ax,G_RAM mov ds,ax test byte ptr POST_FLAG,SETUP_ON ; Is CTRL+ALT+ESC pressed? pop ds ;R47 jnz short Vdmm_3 ; yes,skip memory testing jnz short Go_CmosSetup ; R47 mov ah,01h int 16h ; check if key available... jnz short vdmm_2 ; key available... vdmm_1: pop dx pop si pop bx pop eax clc ;not finish ;R47 ret vdmm_2: xor ah,ah int 16h ; clear key from buffer cmp al,1bh ; was key an jne short vdmm_1 ; no, continue vdmm_3: pop dx pop si pop bx pop eax ; ; Go clear the rest of memory ; ;R67 cli ;R67 call Enable_Prot_Mode ; get back in protected mode ;R67 ;R67 mov dx,START_SEG[bp] ;clear all memory xor eax,eax ;R67 mov cx,4000h ;R67 call Mem_Write mov dx,END_SEG[bp] ; fake out that we're finished... ;R67 call Shutdown_From_Mem_Test ; get out prot mode ;R67 sti ;R47 - start clc ;not finish ret ;Skip memory clearing to enter setup as soon as possible Go_CmosSetup: pop dx pop si pop bx pop eax stc ;finish mem testing ;R47 - end ret DISP_MEM_MSG ENDP ;[]==============================================================[] ; ;CLEAR_BTM_LINE: ; ; Clear the bottom line... ; ;Saves: SI ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] CLEAR_BTM_LINE PROC NEAR ret CLEAR_BTM_LINE ENDP ;[]==============================================================[] ; ;WRITE_BTM_LINE: ; ; Write the bottom line... ; ;Saves: NONE ; ;Entry: CS:SI Offset of string to display ;Exit: NONE ; ;[]==============================================================[] PUBLIC WRITE_BTM_LINE WRITE_BTM_LINE PROC NEAR F000_call Cursor_Get push dx ; save the cursor location ;Begin POST border changes mov dx,1601h call F000_Cursor_Set ; set the cursor location call Disp_Str_In_BIOS ; print even on warm boot... ;End POST border changes pop dx call F000_Cursor_Set ; restore the cursor ret WRITE_BTM_LINE ENDP ;R203 start ifdef Support_EPA1 ;------------------------------------------------------------------ ;------------------------------------------------------------------ Display_Sec_EPA: push es mov di,(EPA1_Expand_Address+1)*4;;;;;(10h+1)*4 ;EPA 1 index call POST_decompress jc short DSE_Exit ;R203A ;R203C start ifdef Graphics_Post mov ax,Temp_CBROM_Segment mov ds,ax cmp dword ptr ds:[0], 'MBWA' ;compare is Award BMP file signature? jne @F mov byte ptr EPALOGO_FLAG[bp],0aah ;set flag to Graphics EPA ;R203F call Graphics_Post_proc mov cx, EPA_X*8 ;R203F EPA_X position mov dx, EPA_Y*16 ;R203F EPA_Y position call Draw_LOGO_Pattern ;R203F call Set_RGB ;R203F @@: else ;Graphics_Post ;R203C end ifndef NO_EPA_LOGO ;R203E ;----- put EPA1 pattern to external character area (ASCII 80h-0ffh) mov ax,4000h mov ds,ax mov ax,MOV_SHAD_SEG mov es,ax cld mov al,ds:[0] ;row mov bl,ds:[1] ;column mul bl movzx bx,al push bx add ax,2 mov si,ax xor di,di @@: mov cx,14 rep movsb xor ax,ax stosw dec bl jnz short @B pop cx push bp xor bp,bp mov ax,1100h mov bx,1000h mov dx,80h int 10h pop bp ;------------------------------------------------------------------ call Clear_EPA_Area ;---- Draw EPA1 pattern to screen --------------------------------- mov di,2 mov al,80h mov dh,EPA_Y ;row row_loop1: mov dl,EPA_X ;column movzx cx,byte ptr ds:[0] Next_char1: push cx mov bl,[di] call draw_EPA_logo inc al ;R213 start cmp al,251 ;award font start jb short Not_AWARD_logo_area2 ;No,jump xor al,al ;skip it to next area Not_AWARD_logo_area2: ;R213 end inc di inc dl pop cx loop short Next_char1 inc dh cmp dh,byte ptr ds:[1] jbe short row_loop1 ;------------------------------------------------------------------ ;----- Reset cursor position for POST ----------------------------- mov ah,2 xor bh,bh mov dl,CURSOR_X[bp] mov dh,CURSOR_Y[bp] int 10h ;------------------------------------------------------------------ endif ;NO_EPA_LOGO ;R203E endif ;Graphics_Post ;R203C DSE_Exit: ;R203A pop es ret endif ;Support_EPA1 ;R203 end ;[]==============================================================[] ; ; POST_50S: ; ; Testing EISA memory found in slots initialization. ; ;Saves: NONE ; ;Entry: ;Exit: Carry flag set if error ; ;[]==============================================================[] PUBLIC POST_50S POST_50S PROC NEAR cli ;R270 - start ifdef CLEAR_PASSWORD_SUPPORT push DGROUP pop ds ;data segment for message ;display F000_call Ck_Password_Switch endif; CLEAR_PASSWORD_SUPPORT ;R270 - end ;R74 mov esi,EXT_MEM_SIZE[bp] ;extended memory size ;R74 mov al,1 ;program address above 1Mb ;R74 call Set_Cpu_MtRR ;R74 ;R74ifdef P6_BIOS_ONLY ;R74 mov ax,4100H ;R74 mov ds,ax ;R74 mov esi,EXT_MEM_SIZE[bp] ;extended memory size ;R74 mov dword ptr ds:[0],esi ;save extended size ;R74 F000_call Init_Apic ;R74endif; P6_BIOS_ONLY ifndef ALWAYS_SHOW_CPU_TYPE ;R93B call Check_Warm_Boot je short No_CpuDisplay endif; ALWAYS_SHOW_CPU_TYPE ;R93B push word ptr CURSOR_X[bp] ;save cursor pos. ifdef P6_BIOS_ONLY ;R48 mov word ptr CURSOR_X[bp],0626H ;R211 ;R211 mov word ptr CURSOR_X[bp],0621H ;R48 else; P6_BIOS_ONLY ;R48 mov word ptr CURSOR_X[bp],061cH endif; P6_BIOS_ONLY ;R48 call Show_Processor_Number ;show process no.;R21 ;R21 F000_call Show_Processor_Number ;show process no. pop word ptr CURSOR_X[bp] ;restore cursor pos. No_CpuDisplay: ifdef PNP_BIOS ifdef Quiet_Post_Support ;R200 call Ck_Quiet_Post ;R200 jnc short _JAAAA ;R200 endif ;Quiet_Post_Support ;R200 call PNP_Disp_Logo _JAAAA: ;R200 call PNP_Early_Init ;R157 endif ;PNP_BIOS ;R199 start push ds ;R199A mov ax,G_RAM ;R199A mov ds,ax ;R199A ASSUME DS:G_RAM ;R199A and byte ptr POST_FLAG,not VIRUS_DETECT mov si,offset Virus_Item call F000_GetItem_Value or al,al ;R203 jnz short Virus_code_Empty jnz Virus_code_Empty ;R203 or byte ptr POST_FLAG,VIRUS_DETECT ifdef Trend_AntiVirus ;R227 mov di,(7+1)*4 or 4000h mov di,(VRS_Expand_Address+1)*4;;;;;(7+1)*4 ;R227 call POST_decompress ;R203 jc short Virus_code_Empty ;Yes,skip jc Virus_code_Empty ;R203 Yes,skip extrn Trend_AntiVirus_Msg:near mov si,offset Trend_AntiVirus_Msg call Disp_Str_In_POST ;R227 start mov ax,Temp_CBROM_Segment mov ds,ax mov si,6 call F000_Display_String ;R227 end call Display_Sec_EPA ;R203 endif ;Trend_AntiVirus Virus_code_Empty: pop ds ;R199A ;R199 end ;R188 -start ifdef Bootblock_16K_Support ifdef Automatic_Load_Awdflash ifNdef No_Automatic_Load_Awdflash_InPOST ;R225 ifdef Graphics_Post mov si,offset To_Enter_Awdflash1 test byte ptr EQUIPMENT[bp],DT_MONO ;MONO ? jnz short @F cmp byte ptr EPALOGO_FLAG[bp], 055h je short @f endif; Graphics_Post mov si,offset To_Enter_Awdflash @@: call Disp_Str_In_BIOS1 push ds mov ax,G_RAM mov ds,ax ASSUME DS:G_RAM or byte ptr POST_FLAG,AWD_Str_Show pop ds endif ;No_Automatic_Load_Awdflash_InPOST ;R225 endif ;Automatic_Load_Awdflash endif ;Bootblock_16K_Support ;R188 -end ;R30 - start ifdef PNP_BIOS ifdef NEW_SUPERIO_KERNEL ifdef CT_IO_DECODE ;R30B F000_Call Ct_Disable_IO_DECODE ;R30B endif ;CT_IO_DECODE ;R30B call Disable_SuperIO_ComLptPort ;disable all COM & LPT ;port on super I/O ifdef Secondary_IO_Use ;R228 call Disable_SecondIO_ComLptPort ;R228 endif; Secondary_IO_Use ;R228 call Detect_IO_AndRecord endif; NEW_SUPERIO_KERNEL endif; PNP_BIOS ;R30 - end call Init_Onboard_Super_IO call Init_Onboard_AUDIO F000_call Init_Onboard_Io ;R144A call Init_Onboard_Sensor ;R144 ;r143 start ifdef RPB_ENABLED ; RXX extrn rpb_reinit:near call rpb_reinit ; re=initialize rpb serial port endif ; RPB_ENABLED ;r143 end ;R271A ;R223 -start ;R271A ifdef DMI_EVENT_LOG_IN_SETUP ;R271A mov si,offset Clear_DMI_Event_Log_Item ;R271A call F000_GetItem_Value ;R271A or al,al ;disabled ? ;R271A jz short Clear_DMI_Event_Log_Disabled ;don't clear Event Log if disabled ;R271A ;R271A ;R223A strat ;R271A xor dx,dx ;R271A mov bx, offset Clear_DMI_Event_Log_Item ;clear Clear_DMI_Event_Log_Item ;R271A f000_call Write_Item_Value ;R271A ;R223A end ;R271A ;R223A and [bp+58h],not 01000000b ;R271A ;R271A push eax ;R271A mov ax,1 ; control ;R271A push ax ;R271A ;R271 start ;R271A ifdef flash_in_smbase ;R271A xor eax,eax ;R271A else ;flash_in_smbase ;R271A ;R271 end ;R271A mov ax,TEMP_MEM ;R271A shl eax,16 ;R271A endif ;flash_in_smbase ;R271 ;R271A push eax ; data buffer ;R271A ifndef flash_in_smbase ;R271 ;R271A mov ax,0 ;R271A endif ;flash_in_smbase ;R271 ;R271A push ax ; sub func num ;R271A mov ax,54h ; Pnp Func num ;R271A push ax ;R271A FAR_CALL , 0F000h ;R271A add sp,0Eh ;R271A Clear_DMI_Event_Log_Disabled: ;R271A ret ;R271A endif ;DMI_EVENT_LOG_IN_SETUP ;R271A ;R223 -end clc ret POST_50S ENDP ;[]==============================================================[] ; ; POST_51S: ; ; IDE drive capacity detection. ; ;Saves: NONE ; ;Entry: ;Exit: Carry flag set if error ; ;[]==============================================================[] PUBLIC POST_51S POST_51S PROC NEAR PUBLIC POST_52S POST_52S LABEL NEAR PUBLIC POST_53S POST_53S LABEL NEAR PUBLIC POST_54S POST_54S LABEL NEAR PUBLIC POST_55S POST_55S LABEL NEAR PUBLIC POST_56S POST_56S LABEL NEAR clc ret PUBLIC POST_57S POST_57S LABEL NEAR PUBLIC POST_58S POST_58S LABEL NEAR PUBLIC POST_59S POST_59S LABEL NEAR clc ret POST_51S ENDP ;[]==============================================================[] ; ;POST_60S: ; ; Print setup message at the bottom of the screen and ; enable setup. ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_60S POST_60S PROC NEAR ; ; Enable SETUP ; ;R264 -start ifdef Ct_Special_Do_InPost_60 Xcall Ct_Special_Do_InPOST60 endif ;Ct_Special_Do_InPost_60 ;R264 -end mov ax,G_RAM mov ds,ax assume ds:G_RAM or ds:[Init_Err_Flg],IEF_SETUP_OK clc ret POST_60S ENDP ; ; POST 61+ have SETUP enabled... ; ;[]==============================================================[] ; ;POST_61S: ; ; Initialize and install mouse and 40: area stuff... ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_61S POST_61S PROC NEAR ;R120A if Desktop_Power_Management EQ 1 ;R120 ; BIOS must reset KB earlier if LANCE(LT38C41) + FUJITSU ; KB , otherwise system become very slow during memory ; test, But reset KB failure in this case for some ; combinations of KB and PS2 mouse. So reset KB earlier if no PS2 mouse ; support and reset KB later for PS2 M/B ifndef EARLY_RESET_KB call Check_PS2_Mouse_Support ;PS2 mosue support jz short No_Ps2_Mouse call Reset_Kb ;reset KB ifdef RESET_KBC_AFTER_INIT_PS2 test byte ptr CMOS_STATUS[bp],KBD_STATUS jz short No_Ps2_Mouse Call Reset_KBC endif ;RESET_KBC_AFTER_INIT_PS2 endif ;EARLY_RESET_KB No_Ps2_Mouse: ;R120A endif ;Desktop_Power_Management EQ 1 ;R120 ;R180 - start ifdef PS2_Mouse_force_seek extrn Ct_PS2_Mouse_Patch:near call Ct_PS2_Mouse_Patch endif ;PS2_Mouse_force_seek ;R180 - end ifdef PS2_SETUPABLE mov si,offset PS2_select_item call F000_GetItem_Value or al,al ;PS2 mouse enable jnz short Ms_Instal_Yes ;R251 - start ifdef USB_SUPPORT ifdef USB_MOUSE_SUPPORT ;R255 mov si, offset Usb_Mouse_Item ;R255 call F000_GetItem_Value ;R255 or al,al ;USB mouse enable ;R255 jnz short Ms_Instal_Yes call Report_USB_Mouse_Support ;R255 jnc short Ms_Instal_Yes ;R255 endif ;USB_MOUSE_SUPPORT endif ;USB_SUPPORT ;R251 - end ifdef MOUSE_IN_XGROUP ;R162A Xcall Clear_Ps2Mouse_Flag ;R162A else ;MOUSE_IN_XGROUP ;R162A call Clear_Ps2Mouse_Flag endif ;MOUSE_IN_XGROUP ;R162A jmp short Exit_Ms_Instal Ms_Instal_Yes: endif ;PS2_SETUPABLE ifdef MOUSE_IN_XGROUP ;R162A Xcall Ms_Instal else ;MOUSE_IN_XGROUP ;R162A call Ms_Instal ;R162A endif ;MOUSE_IN_XGROUP ;R162A ;R56A ;R56 - start ;R56A ;Enable Tri-state for IRQ 12 if no PS2 mouse plugged ;R56A mov ah,0c0H ;get system information ;R56A int 15h ;R56A ;R56A test byte ptr es:[bx+5],04H ;mouse plugged ? ;R56A jnz short NoPs2_Mouse ;mouse installed, do nothing ;R56A ;no mouse, disable IRQ 12 ;R56A ifdef NEW_SUPERIO_KERNEL ;R56A call Cut_Irq12 ;let IRQ 12 tri-state ;R56A endif; NEW_SUPERIO_KERNEL ;R56A NoPs2_Mouse: ;R56A ;R56 - end ifdef RESET_KBC_AFTER_INIT_PS2 mov ax,G_RAM mov ds,ax assume ds:G_RAM test byte ptr G_RAM:Hardware,00000100b jnz short Ps2_Mouse_yes Call Reset_KBC Ps2_Mouse_yes: endif ;RESET_KBC_AFTER_INIT_PS2 Exit_Ms_Instal: ;R187 - start ifdef PCI_BUS call fPatch_Ebda_Usage ;patch EBDA for DAC960 endif ;PCI_BUS ;R187 - end ;R56A - start ;Enable Tri-state for IRQ 12 if no PS2 mouse plugged ;R56C mov ah,0c0H ;get system information ;R56C int 15h ;R56B test byte ptr es:[bx+5],04H ;mouse plugged ? ;R56B jnz short NoPs2_Mouse ;mouse installed, do nothing ;R56B ;no mouse, disable IRQ 12 ;R56Bifdef NEW_SUPERIO_KERNEL ;R56B call Cut_Irq12 ;let IRQ 12 tri-state ;R56Bendif; NEW_SUPERIO_KERNEL NoPs2_Mouse: ;R56A - end ;R156A - start ifdef ACPI_Support mov dword ptr ACPI_TABLE_FLAG[bp],0 Call Check_ACPI_ON_OFF ;R182 jc short No_AcpiTable ;R182 mov di,(ACPITBL_Expand_Address+1)*4;;;;;10h call POST_decompress jc short No_AcpiTable mov ACPI_TABLE_FLAG[bp],edx call E_F000_Shadow_W mov edx,ACPI_TABLE_FLAG[bp] ;R194 test edx,03ffh ;R194 jz short @f ;R194 add edx,400h ;R194@@: ;R194 and edx,not 03ffh ;R194 - start add edx,ACPINVSSize*1024 test edx,0ffffh jz short @f add edx,10000h @@: and edx,not 0ffffh sub edx,ACPINVSSize*1024 ;R194 - end push es mov bx,0F000h mov es,bx mov di,offset ACPITableAddress + 8 mov es:[di],edx ;R156B - start cmp dword ptr EXT_MEM_SIZE[bp],63 * 1024 ja short @f ;R194 mov ax,es:[di] ;R194 mov di,offset ACPINVSAddress + 8 ;R194 add ax,es:[di] ;R194 shr ax,10 ; unit by 1K ;R194 test al, 11b ;R156C ;R194 jz short _No_Ass ;R156C ;R194 and al,not 11b ;R156C ;R194 add al, 100b ;R156C ;R194 _No_Ass: ;R156C mov eax,es:[di] ;R194 mov di,offset ACPINVSAddress + 8 ;R194 add eax,es:[di] ;R194 shr eax,10 ;R194 ;R244 sub EXT_MEM_FOUND[bp],ax ; save amount of memory found in CMOS ;R244 sub EXT_MEMORY[bp],ax ; set value mov di,offset ACPI_RESERVED_MEM ;R244 mov es:[di],ax ;R244 @@: ;R156B - end pop es call E_F000_Shadow_R No_AcpiTable: endif; ACPI_Support ;R156A - end ifdef QUERY_SYSTEM_ADDRESS_MAP lea si,Setup_PS2 F000_call Do_F000_Shadow endif; QUERY_SYSTEM_ADDRESS_MAP ;R169Aif Early_Init_PS2Mouse ;R169 ;R169A call Init_Ps2Mouse_Proc ;R169 ;R169Aendif; Early_Init_PS2Mouse ;R169 ;It have to call this routine , otherwise keyboard have no function ;if PHOENIX KBC used. ;R62 call Get_Switch ;dummy ;R70B;R70 - start ;R70Bifdef PHILIPS_LOGO ;R70B jmp short SHOW_PHILIPS_LOGO ;R70Bwait_1sec: ;R70B mov ah,86h ;R70B mov cx, 500000 / 65535 ;R70B mov dx, 500000 mod 65535 ;R70B int 15h ;R70B ;R70B ret ;R70B ;R70BSHOW_PHILIPS_LOGO: ;R70B call wait_1sec ;R70B mov bl,10 ;R70B;R70A mov dh,15h ;R70B;R70A mov cx,1515h ;R70B mov dh,0h ;R70B mov cx,2a00h ;R70B call Set_Creg ;R70B ;R70B call wait_1sec ;R70B mov bl,3 ;R70B mov dh,0 ;R70B mov cx,2A2Ah ;R70B call Set_Creg ;R70B ;R70B mov bl,8 ;R70B;R70A mov dh,15h ;R70B;R70A mov cx,0f0fh ;R70B mov dh,0h ;R70B mov cx,2a00h ;R70B call Set_Creg ;R70B ;R70B mov bl,4 ;R70B mov dh,2ah ;R70B mov cx,0 ;R70B call Set_Creg ;R70B ;R70B call wait_1sec ;R70B mov bx,2 ;R70B;R70A mov dh,15h ;R70B;R70A mov cx,1515h ;R70B mov dh,3fh ;R70B mov cx,3f15h ;R70B call Set_Creg ;R70B ;R70B call wait_1sec ;R70B mov bl,14 ;R70B mov dh,3fh ;R70B mov cx,3f15h ;R70B call Set_Creg ;R70B ;R70B call wait_1sec ;R70B mov bl,14 ;R70B mov dh,0 ;R70B mov cx,0 ;R70B call Set_Creg ;R70B ;R70B call wait_1sec ;R70B mov bl,14 ;R70B mov dh,3fh ;R70B mov cx,3f15h ;R70B call Set_Creg ;R70B ;R70B call wait_1sec ;R70B mov bl,14 ;R70B mov dh,0 ;R70B mov cx,0 ;R70B call Set_Creg ;R70B ;R70B call wait_1sec ;R70B mov bl,14 ;R70B mov dh,3fh ;R70B mov cx,3f15h ;R70B call Set_Creg ;R70B ;R70Bendif ;PHILIPS_LOGO ;R70B;R70 - end ;R246 ;R112 start ;R246 ifdef ACPI_Support ;R246 ;After extended memory test and INT15E820h, we can move the ;R246 ;ACPI table from 4000:0 up to top of extended memory. Also, fill ;R246 ;in ACPI tables' pointer and checksum. ;R246 ;R152 mov bx,Temp_EXP_Seg ;get expand address temp buffer segment ;R246 ;R152 mov es,bx ;move to ES ;R246 ;R152 mov bx,es:[Temp_EXP_Off+10h];get ACPI table compressed data offset ;R246 ;R152 cmp bx,0ffffh ;exist? ;R246 ;R152 je short No_ACPI_table ;No,skip ACPI table data ;R246 ;R152 mov di,es:[Temp_EXP_Off] ;get decompress code offset ;R246 ;R152 push es:[Temp_EXP_Off+12h] ;get ACPI table compressed data segment ;R246 ;R152 pop es ;move to Es ;R246 ;R152 push cs ;set far return segment ;R246 ;R152 push offset Exp_Ret_Addr ;set far return offset ;R246 ;R152 push 0dfffh ;set near return offset ;R246 ;R152 ;R246 ;R152 mov al,TRUE ;turn on CPU cache ;R246 ;R152 F000_Call Cpu_Cache ;R246 ;R152 mov dx,Exp_Data_Seg ;set decompress temp buffer address ;R246 ;R152 push 2000h ;------------------------ ;R246 ;R152 push di ;jump to decompress code ;R246 ;R152 retf ;------------------------ ;R246 ;R152Exp_Ret_Addr: ;R246 ;R152 mov al,FALSE ;turn off CPU cache ;R246 ;R152 F000_Call Cpu_Cache ;R246 ;R156A mov di,10h ;R152 ;R246 ;R156A call POST_decompress ;R152 ;R246 ;R156A jc short No_ACPI_table ;R152 ;R246 ;R156A - start ;R246 cmp dword ptr ACPI_TABLE_FLAG[bp],0 ;R246 jz short No_ACPI_table ;R246 ;R156A - end ;R246 extrn SetupACPI:near ;R246 call SetupACPI ;call to setup ACPI table ;R246 No_ACPI_table: ;R246 endif; ACPI_Support ;R246 ;R112 end clc ret POST_61S ENDP ;R182 - start ifdef ACPI_SUPPORT ;R156A CHECK_ACPI_ON_OFF Proc Near Call Ct_ACPI_Option jnc short AcpiOn Call E_F000_Shadow_W push es mov ax,0F000h mov es,ax mov di,offset RSD_PTR xor eax,eax stosd ;Clear Pointer mov di,offset ACPINVSAddress + 8 ;R182A stosd ;R182A Clear Table Size pop es Call E_F000_Shadow_R stc AcpiOn: ret CHECK_ACPI_ON_OFF Endp endif ;ACPI_SUPPORT ;R156A ;R182 - end ifdef RESET_KBC_AFTER_INIT_PS2 Reset_KBC Proc Near ; ; Tell 8042 to do self-test ; mov bl,10 p55_2: mov al,TEST_KBRD out STAT8042,al ; send self-test cmd. NEWIODELAY call F000_Buffer_8042_Full ; wait for buffer to clear call F000_Out_8042_Full ; wait for 8042 output to be full in al,DATA8042 NEWIODELAY cmp al,055h ; any errors on keyboard ctlr? je short p55_911 dec bl jnz short P55_2 p55_911: ifndef No_Keyboard_Switch_Delay ; Auto-switch delay mov cx,8000h loop short $ endif ;No_Keyboard_Switch_Delay ; ; Set 8042 command byte ; p55_3: mov al,60h ; 60h = write 8042 command byte out STAT8042,al NEWIODELAY call F000_Buffer_8042_Full ; wait for input buffer to be empty mov al,45h ; AT interface, keyboard enabled, system flag out DATA8042,al NEWIODELAY call F000_Buffer_8042_Full ; wait for input buffer to be empty mov al,ENABLE_KBRD ;enable keyboard out STAT8042,al newiodelay call F000_Buffer_8042_Full ; wait for input buffer to be empty mov al,0A7H ; disable mouse interface out STAT8042,al NEWIODELAY call F000_Buffer_8042_Full ; wait for input buffer to be empty clc p55_91: ret Reset_KBC ENDP endif ;RESET_KBC_AFTER_INIT_PS2 ;[]==============================================================[] ; ;POST_62S: ; ; Initialize cache controller. ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_62S POST_62S PROC NEAR F000_call Later_cache_Sizing ;R201ifdef KLAMATH_CPU_ONLY ;R80 ;R201 cli ;R188A ;R201 call ConfigurePProL2Cache ;R80 ;R201 sti ;R188A ;R201endif; KLAMATH_CPU_ONLY ;R80 if Early_Init_PS2Mouse ;R169A call Init_Ps2Mouse_Proc ;R169A endif; Early_Init_PS2Mouse ;R169A ;R277 - start ifdef Superio_On_Now_Function call Init_Ps2Mouse_Proc endif ;Superio_On_Now_Function ;R277 - end push ds push 0f000h pop ds assume ds:DGROUP test byte ptr DGROUP:A20_Byte,80h assume ds:NOTHING pop ds jz short @F call Try_Actual_Cache @@: clc ret POST_62S ENDP ;R277 - start ifdef Superio_On_Now_Function Init_Ps2Mouse_Proc Proc Near pushf cli mov al, 0a8h out 64h, al mov al, 60h out 64h, al Wait_key1: in al, 64h and al, 02h jnz short Wait_key1 mov al, 47h out 60h, al mov al, 0d4h out 64h, al Wait_key2: in al, 64h and al, 02h jnz short Wait_key2 mov al, 0f4h out 60h, al popf ret Init_Ps2Mouse_Proc Endp endif ;Superio_On_Now_Function ;R277 - end ;[]==============================================================[] ; ;POST_63S: ; ; Initialize shadow RAM... ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_63S POST_63S PROC NEAR clc ret POST_63S ENDP PUBLIC POST_64S POST_64S PROC NEAR clc ret POST_64S ENDP ;[]==============================================================[] ; ;POST_65S: ; ; Initialize floppy controller. ; Set up floppy related field in 40:hardware ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_65S POST_65S PROC NEAR ;R271A start ifdef DMI_EVENT_LOG_IN_SETUP mov si,offset Clear_DMI_Event_Log_Item call F000_GetItem_Value or al,al ;disabled ? jz short Clear_DMI_Event_Log_Disabled ;don't clear Event Log if disabled xor dx,dx mov bx, offset Clear_DMI_Event_Log_Item ;clear Clear_DMI_Event_Log_Item f000_call Write_Item_Value call far ptr clear_dmi_event_log_func Clear_DMI_Event_Log_Disabled: endif ;DMI_EVENT_LOG_IN_SETUP ;R271A end ifdef VSA_VGA ;R119 mov al,TRUE ;R119 call F000_Cpu_Cache ;R119 endif ;VSA_VGA ;R119 ;R185ifndef EPA_LOGO_Use_Graphics ;R181 ;R185ifdef FULL_SCREEN_LOGO ;R185 call Enter_Setup_Check ;R185else ;FULL_SCREEN_LOGO ;R185 F000_call Enter_Setup_Check ;R185endif ;FULL_SCREEN_LOGO ;R185else; EPA_LOGO_Use_Graphics ;R181 ;R185 F000_call Enter_Setup_Check;R181 ;R185endif; EPA_LOGO_Use_Graphics ;R181 ifdef Graphics_Post ;R185 call Enter_Setup_Check ;R185 else; Graphics_Post ;R185 F000_call Enter_Setup_Check ;R185 endif; Graphics_Post ;R185 POST_CODE 0BFh ifdef CUSTOM_LCD_OUTPUT ;R241 call LCD_Display_Msg ;R241 endif; CUSTOM_LCD_OUTPUT ;R241 xor di,di ;normal programming ;R177 F000_call PRG_CHIPSET call far ptr fProc_Prg_Chipset ;R177 F000_call Ct_Auto_Check jz short @F ;auto-config disabled ;R177 F000_call Prg_Auto call far ptr fPRoc_Prg_Auto ;R177 @@: ifdef PNP_BIOS ifndef M6117_CPU ;R130 call PNP_SuperIO_Init endif ;M6117_CPU ;R130 endif ;PNP_BIOS call Auto_Cfg_SuperIO ;R54 IF BUS_TYPE EQ EISA_BUS call Eisa_Error_Chk endif; BUS_TYPE EQ EISA_BUS mov ax,G_RAM mov ds,ax ; Begin floppy fixup ASSUME DS:G_RAM ;R64 - start ;Setup boot selection into BIOS data mov si,offset BootSeq_Item call F000_GetItem_Value ;read CMOS value mov byte ptr G_RAM:[BootSel],al;save boot selection ;R64 - end test byte ptr CMOS_STATUS[bp],CKSM_STATUS jz short p65_1 ; ; Checksum is bad. Force at least one floppy installed... ; or byte ptr [Hardware],FLOPPY_INSTALL ;cmos checksum error jmp short p65_2 ; ; Checksum is good. Read CMOS information then install ; p65_1: mov al,EQUIPMENT[bp] and al,NO_OF_FLOPPY+FLOPPY_INSTALL ;strip out the bits relate ;to floppy cmp byte ptr FLOPPY_TYPE[bp],0 jnz short Fdd_Exist and al,NOT FLOPPY_INSTALL Fdd_Exist: or byte ptr [Hardware],al p65_2: ; Begin floppy install display ; ; Print message and do floppy initialization ; ;R162 call Fp_Install ifdef FPINSTALL_IN_XGROUP ;R162A xcall Fp_Install ;R162 else ;FPINSTALL_IN_XGROUP ;R162A call Fp_Install ;R162A endif ;FPINSTALL_IN_XGROUP ;R162A p65_3: p65_9: ; End floppy install display ; End floppy fixup ;R188B ;R188 -start ;R188B ifdef Bootblock_16K_Support ;R188B ifdef Automatic_Load_Awdflash ;R188B ;R188B mov ax,G_RAM ;R188B mov ds,ax ;R188B assume ds:G_RAM ;R188B or ds:[Init_Err_Flg],IEF_AWDFLASH_OK ;R188B ;R188B endif ;Bootblock_16K_Support ;R188B endif ;Automatic_Load_Awdflash ;R188B ;R188 -end ;M01 - starts ifdef RPB_ENABLED extrn rpb_reinit:near call rpb_reinit ; re=initialize rpb serial port endif ; M01 ;M01 - ends clc ret POST_65S ENDP ;[]==============================================================[] ; ;POST_66S: ; ; Initialize fixed disk controller. ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_66S POST_66S PROC NEAR ifdef Bootblock_16K_Support ;R188 ifdef Automatic_Load_Awdflash ;R188 ifNdef No_Automatic_Load_Awdflash_InPOST ;R225 Xcall POST_Awdflash_Check ;R188 ;Enable directly run awdflash.exe during INT9 mov ax,G_RAM ;R188B mov ds,ax ;R188B assume ds:G_RAM ;R188B or ds:[Init_Err_Flg],IEF_AWDFLASH_OK ;R188B endif ;No_Automatic_Load_Awdflash_InPOST ;R225 endif ;Bootblock_16K_Support ;R188 endif ;Automatic_Load_Awdflash ;R188 ifdef AUTO_CFG_IO call AUTO_CFG_IDE_PORT endif; AUTO_CFG_IO ; Begin fixed install display ;R56B - start ;R187 mov ah,0c0H ;R56C ;R187 int 15h ;R56C ;R187 ;R187 test byte ptr es:[bx+5],04H ;mouse plugged ? ;R187 - start push ds push si push 0f000h pop ds lea si,SYSTEM1_BYTE test byte ptr ds:[si],04H ;PS2 mouse present ?;R187A ;R187A test byte ptr cs:[si],04H ;PS2 mouse present ? pop si pop ds ;R187 - end jnz short No_Cut_Irq12 ;mouse installed, do nothing ;no mouse, disable IRQ 12 ifndef CUT_IRQ12_BY_CT ;R210 ifdef NEW_SUPERIO_KERNEL call Cut_Irq12 ;let IRQ 12 tri-state endif; NEW_SUPERIO_KERNEL else; CUT_IRQ12_BY_CT ;R210 call CT_Cut_Irq12 ;R210 endif; CUT_IRQ12_BY_CT ;R210 ;R175 - start ;Disable mouse interface to prevent KBC hang up due to PS2 mouse ;hot plugging. mov al,0a7h ; Disable Mouse interface out STAT8042,al NEWIODELAY call F000_Buffer_8042_Full ;wait KBC ;R175 - end No_Cut_Irq12: ;R56B - end call Hd_Install ;R221 start ifdef Customer_Error_Code_Support ifdef ACER_OEM_POST_Error mov bl,IDE_device_item[bp] ;get primary device item ;R221G shr bl,4 ;isolate slave bits and bl,0fh ;R221G;isolate slave bits cmp bl,3 ;is LS120? ;R221B je short p66_4 ;Yes,skip ;R221B start jne short p66_400 mov ax,G_RAM mov ds,ax assume ds:G_RAM mov al,ds:[ATAPI_Byte] test al,4 ;have LS120 drive? jz short p66_400 ;No,goto set error test al,8 ;LS120 is drive A? jnz short p66_400 ;No,goto set error xor ah,ah xor dl,dl int 13h ;read from LS120 jc short p66_400 xor bx,bx mov ds,bx mov es,bx mov bx,7c00h mov cx,1 xor dx,dx mov di,3 ;read counter p66_402: mov ax,201h ;read boot sector to 2000h:0 int 13h ;read from LS120 jnc short p66_401 dec di jz short p66_400 jmp short p66_402 p66_401: xor di,di F000_Call CHECK_BOOT_RECORD jnc short p66_4 p66_400: ;R221B end or byte ptr FIXED_ERROR[bp],OEM_Err;No,set error for report p66_4: endif ;ACER_OEM_POST_Error endif ;Customer_Error_Code_Support ;R221 end ;R221 cmp byte ptr FIXED_ERROR[bp], 0 ; Any fixed disk errors? ;R221 jz short p66_3 ; no... ;R221 ;R221p66_3: p66_9: ; End fixed install display clc ret POST_66S ENDP ;[]==============================================================[] ; ;POST_67S: ; ; Initialize serial ports... ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_67S POST_67S PROC NEAR ifdef PNP_BIOS call Cp_Install clc ret endif ;PNP_BIOS ;r143 start ifdef RPB_ENABLED ; RXX extrn rpb_reinit:near call rpb_reinit ; re=initialize rpb serial port endif ; RPB_ENABLED ;r143 end POST_67S ENDP ;[]==============================================================[] ; ;POST_68S: ; ; Initialize parallel ports... ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_68S POST_68S PROC NEAR ; ; Already taken care of above... ; ; clc ret POST_68S ENDP ;[]==============================================================[] ; ;POST_69S: ; ; Initialize co-processor ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_69S POST_69S PROC NEAR AND HARDWARE,NOT 02H ; assume no coprocessor. and byte ptr EQUIPMENT[bp], not COPRO_INSTALL CLI ; NO INTERRUPTS FROM COPROC CALL CK_COPROCESSOR OR AL,AL ; 0 NONE JZ SHORT MATH_DONE DEC AL ; 1 IF 287 JZ SHORT FOUND_287 DEC AL JZ SHORT FOUND_387 ; 2 IF 387 JMP SHORT MATH_DONE ; CLOSE POSSIBILITIES FOUND_387: MOV EAX,CR0 OR EAX,10H ; SET ET BIT AND EAX,NOT 2 ; CLEAR MP BIT MOV CR0,EAX JMP SHORT ENABLE_NPX FOUND_287: MOV EAX,CR0 ; 287 PRESENT. SET MP BIT IN OR EAX,2 ; STATUS WORD TO PERMIT NORMAL AND EAX,NOT 10H ; CLEAR ET BIT MOV CR0,EAX ; 287 OPERATION. ENABLE_NPX: IN AL,B8259+1 ; SO ENABLE 287 INT IODELAY AND AL,0DFH OUT B8259+1,AL IODELAY OR HARDWARE,2 ; TELL THE BIOS AREA or byte ptr EQUIPMENT[bp],COPRO_INSTALL ; tell cmos too MATH_DONE: ;MAKE SURE SECOND LEVEL IS ENABLED IN AL,A8259+1 IODELAY AND AL,0FBH OUT A8259+1,AL clc ret POST_69S ENDP ;[]==============================================================[] ; ;POST_70S: ;[]==============================================================[] PUBLIC POST_70S POST_70S PROC NEAR clc ret POST_70S ENDP ;[]==============================================================[] ; ;POST_71S: ; ; Set speed before boot. ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ;[]==============================================================[] PUBLIC POST_71S POST_71S PROC NEAR ;Note: save boot_sector_buffer of offset to boot_sector_addr offset 0. ; save boot_sector_buffer of segment to boot_sector_addr offset 2. mov word ptr [boot_sector_addr],offset boot_sector_buffer mov word ptr [boot_sector_addr+2],seg boot_sector_buffer ;R199 and byte ptr POST_FLAG,not VIRUS_DETECT ;R199 mov si,offset Virus_Item ;R199 call F000_GetItem_Value ;R199 or al,al ;R199 jnz short No_Virus_Prot ;R199 or byte ptr POST_FLAG,VIRUS_DETECT ;R199No_Virus_Prot: ;R147 start ifdef Support_HDD_Write_Protect and byte ptr POST_FLAG,not HDD_Wt_Protect lea si,Hdd_Wt_Protect_Item call F000_GetItem_Value or al,al jz short @F or byte ptr POST_FLAG,HDD_Wt_Protect @@: endif ;Support_HDD_Write_Protect ;R147 end PUBLIC POST_72S POST_72S LABEL NEAR PUBLIC POST_73S POST_73S LABEL NEAR PUBLIC POST_74S POST_74S LABEL NEAR PUBLIC POST_75S POST_75S LABEL NEAR PUBLIC POST_76S POST_76S LABEL NEAR PUBLIC POST_77S POST_77S LABEL NEAR clc ret POST_71S ENDP ;R185ifdef FULL_SCREEN_LOGO ifdef Graphics_Post ;R185 public Switch_LOGO_To_Text Switch_LOGO_To_Text: test byte ptr EQUIPMENT[bp],DT_MONO jnz short @F test byte ptr Post_Temp_Byte[bp],Text_POST jnz short @F cli push ds push es pusha ;R221 start ifdef Customer_Error_Code_Support mov ax,12h ;set to graphics mode int 10h ;R221A mov ax,Temp_VGA_Seg ;text temp buffer ;R221A mov ds,ax ;R221A mov si,Temp_VGA_Off ;R221A cld ;R221A xor dh,dh ;start Y axis ;R221AFill_Text_LoopHi: ;R221A xor dl,dl ;start X axis ;R221AFill_Text_LoopLo: ;R221A lodsw ;load char and attribute ;R221A cmp al,' ' ;space char? ;R221A je short Goto_Next_Char ;Yes,skip to save display time ;R221A push dx ;R221A push ax ;R221A mov ah,2 ;set cursor ;R221A xor bh,bh ;page 0 ;R221A int 10h ;function call ;R221A pop ax ;R221A mov bl,ah ;R221A mov ah,0eh ;write char function ;R221A int 10h ;R221A pop dx ;R221AGoto_Next_Char: ;R221A inc dl ;Next charactor ;R221A cmp dl,80 ;Screen high ;R221A jb short Fill_Text_LoopLo ;R221A inc dh ;R221A cmp dh,25 ;Screen wide ;R221A jb short Fill_Text_LoopHi else ;Customer_Error_Code_Support ;R221 end mov ax,3 int 10h mov ax,Temp_VGA_Seg mov ds,ax mov si,Temp_VGA_Off mov di,0b800h mov es,di xor di,di mov cx,Temp_Scrn_Size cld rep movsw endif ;Customer_Error_Code_Support ;R221 ;Set cursor position to display item name mov dl,CURSOR_X[bp] ;get column position mov dh,CURSOR_Y[bp] ;get row position xor bh,bh ;first page mov ah,2 ;set cursor position int 10h or byte ptr Post_Temp_Byte[bp],Text_POST popa pop es pop ds sti @@: ifdef Quiet_Post_Support ;R200 call Ck_Quiet_Post ;R200 jc short @F ;R200 F000_Call Cursor_Off ;R200 @@: ;R200 endif ;Quiet_Post_Support ;R200 ret endif; Graphics_Post ;R185 ;R185endif ;FULL_SCREEN_LOGO ;R222 - start ifdef LID_EMULATE_KEYLOCK ;Function : 1. Check if keyboard is locked by switch. ; 2. Enable SMI for LID to control keylock for run-time ;Input : none ;Output : 1. POST error flag set if key is lock ; 2. LID/SMI is enabled KeyLockCheck proc near ;LID status low means keylocked mov al,00001000B ;clear LID status mov dx,ACPI_Port+0DH ;general purpose status out dx,al ;clear status NEWIODELAY in al,dx ;get LID status test al,00001000B ;LID signal asserted ? jz short DoKeyLocked ;yes, key is locked. ;key is not locked , enable active low for LID to generate SMI mov bl,00000010B ;active low for LID jmp short EnableLIDSMI DoKeyLocked: ;key is locked , enable active high for LID to generate SMI xor bl,bl ;active high for LID ;Send a dummy password to lock keyboard for keylock emulation call F000_Buffer_8042_Full mov al,0A5H ; set password out STAT8042,al call F000_Buffer_8042_Full mov al,070H ; dymmy scan code for password out DATA8042,al call F000_Buffer_8042_Full mov al,00H ; end of password out DATA8042,al call F000_Buffer_8042_Full mov al,0A6H ; enable password out STAT8042,al call F000_Buffer_8042_Full or byte ptr CMOS_STATUS[bp],EQUIP_STATUS or byte ptr FIXED_ERROR[bp],KEY_LOCK_Err NoKeyLocked: EnableLIDSMI: ;set LID polarity mov dx,ACPI_Port+02BH ;global control register in al,dx NEWIODELAY and al,NOT 00000010B ;LID polarity control or al,bl ;set polarity out dx,al ;set LID/SMI mov dx,ACPI_Port+0fH ;general purpost enable register in al,dx NEWIODELAY or al,00001000b ;enable LID/SMI out dx,al ret KeyLockCheck endp endif; LID_EMULATE_KEYLOCK ;R222 - end ;[]==============================================================[] ; ;POST_78S: ; ; Display messages ; ;Saves: NONE ; ;Entry: NONE ;Exit: NONE ; ; ;Note: 1. If you want to add more error halt settings you have ; to do four things: ; ; a. Save the error status somewhere on the stack and ; set EQUIP_STATUS in the CMOS_STATUS byte. ; b. Add an error table like Other_Error_Tbl (below) ; c. Call Report_Errors. Then, if check the ; error halt setting to see if any of the conditions ; apply to your error. If so, turn off your error ; flag on the stack. ; d. Immediately before waiting for a key (p78_0), check ; if your error status byte is zero. If so, skip to ; p78_9 otherwise pass through. ; ;[]==============================================================[] PUBLIC POST_78S POST_78S PROC NEAR ifdef Show_IDE_Changed_Message ;R242 call Check_IDE_Drive_Change ;R242 endif ;Show_IDE_Changed_Message ;R242 ;R222 - start ifdef LID_EMULATE_KEYLOCK call KeyLockCheck ;check keylock status endif; LID_EMULATE_KEYLOCK ;R222 - end ;R185ifndef EPA_LOGO_Use_Graphics ;R181 ;R185ifdef FULL_SCREEN_LOGO ;R185ifndef No_Auto_Switch_to_Text ;R116 ;R185 call Switch_LOGO_To_Text ;R185endif ;No_Auto_Switch_to_Text ;R116 ;R185endif ;FULL_SCREEN_LOGO ;R185endif; EPA_LOGO_Use_Graphics ;R181 ifndef No_Auto_Switch_to_Text ;R185 ifdef Graphics_Post ;R185 ;Check Full screen or EPA logo ;R185 cmp byte ptr EPALOGO_FLAG[bp], 055h ;R185;check is not Full Screen LOGO jne short @f ;R185 call Switch_LOGO_To_Text ;R185 @@: ;R185 endif; Graphics_Post ;R185 endif; No_Auto_Switch_to_Text ;R185 ifndef Notebook_Power_Management ;R91 p78_000: ; Begin manufacturing POST loop ; Begin Keylock checking push ds push 0f000h pop ds lea si,SYSTEM4_BYTE test byte ptr [si],NO_KEYLOCK pop ds jnz short No_Lock ;R100 - start ifdef SMC93x_KeyLock_From_GPIO if SMC93x_KeyLock_From_GPIO EQ 1 ;1 : USE GPIO10 Which_GPIO = 1 GPIO_PORT_MASK = 00000001b endif; SMC93x_KeyLock_From_GPIO if SMC93x_KeyLock_From_GPIO EQ 11h ;R100AUSE GPIO11 Which_GPIO = 1 ;R100A GPIO_PORT_MASK = 00000010b ;R100A endif; SMC93x_KeyLock_From_GPIO ;R100A extrn READ_GPIO:NEAR mov al,Which_GPIO call Read_GPIO and al,gpio_PORT_MASK jnz short No_Lock and byte ptr CMOS_STATUS[bp],not KBD_STATUS or byte ptr CMOS_STATUS[bp],EQUIP_STATUS or byte ptr FIXED_ERROR[bp],KEY_LOCK_Err jmp short No_Lock endif; SMC93x_KeyLock_From_GPIO ;R100 - end call Get_Switch test al,80h ;keylock ? jnz short No_Lock or byte ptr CMOS_STATUS[bp],EQUIP_STATUS ;R40 or byte ptr FIXED_ERROR[bp],01h or byte ptr FIXED_ERROR[bp],KEY_LOCK_Err ;R40 No_Lock: endif ;Notebook_Power_Management ;R91 ;R198 IFDEF NoteBook_Power_Management if STD_Function EQ 1 ;R198 ;R31 F000_Call Check_0V_Resume Call F000_Check_0V_Resume ;R31 jnz p78_9 endif ;STD_Function EQ 1 ;R198 ;R198 ENDIF ;NoteBook_Power_Management ;R218 start ifdef VSA_VGA ifdef S2D_SUPPORT call FCheck_VSA_resume jnz short p78_9 endif ;S2D_SUPPORT endif ;VSA_VGA ;R218 end ifdef HPM_Support ;R176A call FCheck_HPM_Resume ;R176A jnz p78_9 ;R176A endif ;HPM_Support ;R176A ;R38;R30 - start ;R38ifdef PNP_BIOS ;R38ifdef NEW_SUPERIO_KERNEL ;R38 call Disp_Conflict_IO ;R38endif; NEW_SUPERIO_KERNEL ;R38endif; PNP_BIOS ;R38;R30 - end ;R38 mov al,CMOS_STATUS[bp] ;R38 and al,EQUIP_STATUS ; are there any errors? ;R38 jz p78_9 ;R38 ;R38 call F000_Vcrlf ;R38 ;R38; End error window ;R38 ;R38; Begin separate fixed/floppy ;R38; ;R38; Check fixed errors... ;R38; ;R38 ;R38sp_skip_window: ;R38 ;R38 mov si,offset HaltOn_Item ;R38 call F000_GetItem_Value ;R38 and AWARD_INFO[bp],NOT ERROR_HALT ;R38 and al,ERROR_HALT ;R38 or AWARD_INFO[bp],al ;R38 ;R38 cmp al,NO_HALT_DISK ; no halt on disk set? ;R38 je short p78_001 ; yes... ;R38 cmp al,NO_HALT_DISK_KBD ; no halt on disk/kbd set? ;R38 je short p78_001 ; yes... ;R38 cmp al,NO_HALT_ERRORS ; no halt on any error set? ;R38 je short p78_001 ; yes... ;R38 ;R38 mov si, offset Fixed_Error_Tbl ;R38 call Report_Errors ;R38 ;R38 mov al,FIXED_ERROR[bp] ;R38 test al,UNABLE_FIXED_RESET+FIXED_DIAG_ERROR+UNABLE_FIXED_INIT+UNABLE_RECALIBRATE+SECTOR_VERIFY_ERROR ;R38 jz short @F ;R38 F000_call DISP_BYTE_HEX2 ;R38 @@: ;R38 jmp short p78_002 ; no... ;R38p78_001: ;R38 mov byte ptr FIXED_ERROR[bp],0 ; by turning this off, ;R38 ; we won't halt later... ;R38 ;R38; ;R38; Check floppy errors... ;R38; ;R38 ;R38p78_002: ;R38 ;R38 mov al,AWARD_INFO[bp] ; get error halt setting... ;R38 and al,ERROR_HALT ;R38 ;R38 cmp al,NO_HALT_DISK ; no halt on disk set? ;R38 je short p78_0021 ; yes... ;R38 cmp al,NO_HALT_DISK_KBD ; no halt on disk/kbd set? ;R38 je short p78_0021 ; yes... ;R38 cmp al,NO_HALT_ERRORS ; no halt on any error set? ;R38 je short p78_0021 ; yes... ;R38 ;R38 mov si, offset Floppy_Error_Tbl ;R38 call Report_Errors ;R38 ;R38 mov al,FLOPPY_ERROR[bp] ;R38 or al,al ;R38 jz short @F ;R38 F000_call DISP_BYTE_HEX2 ;R38 @@: ;R38 jmp short p78_01 ;R38p78_0021: ;R38 mov byte ptr FLOPPY_ERROR[bp],0 ; by turning this off, ;R38 ; we won't halt later... ;R38 and byte ptr CMOS_STATUS[bp], NOT FIXED_STATUS ;R38 ;R38 ;R38; End separate fixed/floppy ;R38 ;R38; ;R38; Check keyboard errors... ;R38; ;R38 ;R38p78_01: ;R38; Begin Keylock checking ;R38 ;R38 mov al,AWARD_INFO[bp] ; get error halt setting ;R38 and al,ERROR_HALT ;R38 ;R38 cmp al,NO_HALT_KBD ; no halt on kbd set? ;R38 je short p78_011 ; yes... ;R38 cmp al,NO_HALT_DISK_KBD ; no halt on kbd or disk set? ;R38 je short p78_011 ; yes... ;R38 cmp al,NO_HALT_ERRORS ; no halt on any errors set? ;R38 je short p78_011 ; yes... ;R38 ;R38 mov si, offset Kbd_Error_Tbl ;R38 call Report_Errors ;R38 ;R38 mov si, offset Kbd_Error_Tbl_1 ;R38 call Report_Errors ;R38 ;R38 jmp short p78_02 ;R38p78_011: ;R38 and byte ptr CMOS_STATUS[bp], NOT KBD_STATUS ;R38 ;R38; ;R38; Check remaining errors in AWARD_INFO (video, CMOS checksum, etc.) ;R38; ;R38 ;R38p78_02: ;R38 ;R38 mov al,AWARD_INFO[bp] ;R38 and al,ERROR_HALT ;R38 ;R38 cmp al,NO_HALT_ERRORS ; no halt on any error set? ;R38 je short @F ; no... ;R38 ;R38 mov si, offset Other_Error_Tbl ;R38 call Report_Errors ;R38 jmp short p78_03 ;R38@@: ;R38 and byte ptr CMOS_STATUS[bp], EQUIP_STATUS ; clear all error bits ;R38 ;R38p78_03: ;R38 ;R38 ;R38; Begin memory error check ;R38; ;R38; Check memory errors... ;R38; ;R38 mov al,AWARD_INFO[bp] ;R38 and al,ERROR_HALT ;R38 ;R38 cmp al,NO_HALT_ERRORS ;R38 je short @F ;R38 ;R38 mov si, offset Mem_Error_Tbl ;R38 call Report_Errors ;R38 jmp short p78_04 ;R38@@: ;R38 and byte ptr MEM_ERR_STATUS[bp], NOT MEM_ERR ;R38 ;R38p78_04: ;R38; End memory error check ;R38; ;R38; Check override, BIOS checksum errors... ;R38; ;R38 lea si, Override_Error_Tbl ;R38 call Report_Errors ;R38 ;R38 and byte ptr OVERRIDE[bp], NOT OVERRIDE_ENABLE ;R38p78_05: ;R38 and byte ptr CMOS_STATUS[bp], NOT EQUIP_STATUS ;R38 cmp byte ptr CMOS_STATUS[bp],0 ; check std. errors ;R38 jnz short p78_0 ;R38 ;R38; Begin separate fixed/floppy ;R38 ;R38 cmp byte ptr FIXED_ERROR[bp],0 ; check fixed errors ;R38 jnz short p78_0 ;R38 ;R38 cmp byte ptr FLOPPY_ERROR[bp],0 ; check floppy errors ;R38 jnz short p78_0 ;R38; End separate fixed/floppy ;R38 ;R38 cmp byte ptr MEM_ERR_STATUS[bp],0 ; check memory errors ;R38 jz short p78_901 ;R38 ;R38; ;R38; Wait for a key to be pressed ;R38; ;R38 ;R38p78_0: ;R38 call F000_VNormal ;R38 ;R38 test byte ptr Init_Err_Flg,IEF_TO_ENTER_SETUP ;R38 jnz short p78_901 ;R38 ;R38 call F000_Vcrlf ;R38 lea si,HALT_ERR_MSG ;128k ;R38 call Disp_Str_In_BIOS1 ;R38 ;R38p78_1: ;R38 xor ax,ax ;R38 int 16h ;R38 ;R38 cmp ax,5300h ;del key? ;R38 je short p78_901 ;R38 ;R38 cmp ax,3b00h ;F1 key? ;R38 jne short p78_1 ;R78 - start ifdef USB_SUPPORT test byte ptr CMOS_STATUS[bp],KBD_STATUS ;R122 jz short @f ;R122 ifndef SMIHANDLE_IN_XGROUP ;R183 call Report_USB_Keyboard else ;SMIHANDLE_IN_XGROUP ;R183 xcall Report_USB_Keyboard ;R183 endif ;SMIHANDLE_IN_XGROUP ;R183 jc short @f and byte ptr CMOS_STATUS[bp],not (KBD_STATUS) @@: endif ;USB_SUPPORT ;R78 - end ;R185ifndef EPA_LOGO_Use_Graphics ;R181 ;R185;R116 start ;R185ifdef FULL_SCREEN_LOGO ifdef No_Auto_Switch_to_Text ;Check Full screen or EPA logo ;R185 cmp byte ptr EPALOGO_FLAG[bp], 055h ;R185;check is not Full Screen LOGO jne short p78_9 ;R185 test byte ptr Post_Temp_Byte[bp],Text_POST jz short p78_9 endif ;No_Auto_Switch_to_Text ;R185endif ;FULL_SCREEN_LOGO ;R185;R116 end ;R185endif; EPA_LOGO_Use_Graphics ;R181 call Try_Report_Error ;R38 p78_9: p78_901: ;M02 - start ifdef RPB_ENABLED extrn rpb_block:near call rpb_block ; signal RPB to turn off for logo endif ; RPB_ENABLED ;M02 - end ifdef PM_SUPPORT ifndef NO_EPA_LOGO ;R185ifndef FULL_SCREEN_LOGO ifndef Graphics_Post ;R185 call Show_light_dark endif; Graphics_Post ;R185 ;R185endif ;FULL_SCREEN_LOGO endif ;NO_EPA_LOGO endif; PM_SUPPORT ;M02 - start ifdef RPB_ENABLED extrn rpb_unblock:near call rpb_unblock ; signal RPB to turn back on endif ; RPB_ENABLED ;M02 - end call F000_VNormal mov ah,0fh int 10h cmp al,10h jne short @F call F000_Vreverse @@: ;R185ifndef EPA_LOGO_Use_Graphics ;R181 ifndef Graphics_Post ;R185 ifndef No_Auto_Switch_to_Text ;R116 push ds push 0f000h pop ds ifdef Graphics_Post ;R185B mov si,offset BTM_LINE_CLR1 ;R185B test byte ptr EQUIPMENT[bp],DT_MONO ;R185B jnz short @F ;R185B cmp byte ptr EPALOGO_FLAG[bp], 055h ;R185C;change msg for show str je short @f ;R185C endif; Graphics_Post ;R185B mov si,offset BTM_LINE_CLR @@: ;R185B call Disp_Str_In_BIOS1 pop ds endif ;No_Auto_Switch_to_Text ;R116 endif; Graphics_Post ;R185 ;R185endif; EPA_LOGO_Use_Graphics ;R181 test byte ptr Init_Err_Flg,IEF_To_Enter_Setup jz short p78_91 and byte ptr Init_Err_Flg, NOT IEF_SETUP_OK ;R198 IFDEF NoteBook_Power_Management if STD_Function EQ 1 ;R198 ;R31 F000_Call Check_0V_Resume Call F000_Check_0V_Resume ;R31 jnz short p78_91 endif ;STD_Function EQ 1 ;R198 ;R198 ENDIF ;NoteBook_Power_Management ;R218 start ifdef VSA_VGA ifdef S2D_SUPPORT call FCheck_VSA_resume jnz short p78_91 endif ;S2D_SUPPORT endif ;VSA_VGA ;R218 end ifdef HPM_Support ;R176A call FCheck_HPM_Resume ;R176A jnz short p78_91 ;R176A endif ;HPM_Support ;R176A mov al,0AAh F000_call Setup far_jmp ,0f000h p78_91: ;R185ifndef EPA_LOGO_Use_Graphics ;R181 ;R185ifdef FULL_SCREEN_LOGO ifdef Graphics_Post ;R185 xor di,di mov es,di lea di,INT09 lea ax,KBDINT_VECT mov es:[di],ax mov es:[di+2],0f000h endif; Graphics_Post ;R185 ;R185endif ;FULL_SCREEN_LOGO ;R185endif; EPA_LOGO_Use_Graphics ;R181 call Enable_M1_FarHit sti clc ret POST_78S ENDP ;R242 - Start ;[]==============================================================[] ;[]==============================================================[] ifdef Show_IDE_Changed_Message public Check_IDE_Drive_Change Check_IDE_Drive_Change Proc Near pusha mov byte ptr IDE_Changed_Reg[bp],0 ;clear ;R242A - start test byte ptr CMOS_STATUS[bp],CKSM_STATUS jnz short Check_Next_Drive_4 ;R242A - end mov si,DRV_49_CYL call Cmp_Cmos_Stack jnc short Check_Next_Drive_1 or byte ptr IDE_Changed_Reg[bp],IDE_0_Changed Check_Next_Drive_1: mov si,DRV_48_CYL call Cmp_Cmos_Stack jnc short Check_Next_Drive_2 or byte ptr IDE_Changed_Reg[bp],IDE_1_Changed Check_Next_Drive_2: mov si,DRV_51_CYL call Cmp_Cmos_Stack jnc short Check_Next_Drive_3 or byte ptr IDE_Changed_Reg[bp],IDE_2_Changed Check_Next_Drive_3: mov si,DRV_50_CYL call Cmp_Cmos_Stack jnc short Check_Next_Drive_4 or byte ptr IDE_Changed_Reg[bp],IDE_3_Changed Check_Next_Drive_4: popa ret Cmp_Cmos_Stack: mov cx,8 Cmp_Cmos_Stack_loop: mov ax,si f000_call Get_Cmos cmp [bp+si], al jne short Cmp_Cmos_Stack_ret inc si loop short Cmp_Cmos_Stack_loop clc ret Cmp_Cmos_Stack_ret: stc ret Check_IDE_Drive_Change ENDP endif; Show_IDE_Changed_Message ;R242 - end ;R38 - starts ;[]==============================================================[] ;[]==============================================================[] Try_Report_Error Proc Near ;R232 - starts ifdef CLEAR_SCREEN_BEFORE_SHOWING_ERRORS mov si, offset Clear_Screen_Str call Disp_Str_In_POST mov word ptr CURSOR_X[bp], 0 endif ;CLEAR_SCREEN_BEFORE_SHOWING_ERRORS ;R232 - ends ;************* ;translate HaltOn_Item value into three bits in CL to tell ;whether individual catagory should be reported or not mov si, offset HaltOn_Item ;Error level item call F000_GetItem_Value and al, ERROR_HALT ;R87A ;R87 - start ;R87A ifdef NoteBook_Power_Management ;R87A or al,4 ;R87A endif ;NoteBook_Power_Management ;R87A ;R87 - end movzx si, al mov cl, cs:[si+(offset Halt_Level_Trans)] ;************* ;///////////////////////////////////////// test cl, HALT_OTHER jz short No_Halt_On_Other ifdef PNP_BIOS ifdef NEW_SUPERIO_KERNEL push cx call Disp_Conflict_IO or cl, cl pop cx jz short @F or cl, OTHER_ERR_REPORTED @@: endif; NEW_SUPERIO_KERNEL endif; PNP_BIOS No_Halt_On_Other: ;///////////////////////////////////////// mov si, offset Error_Tbl_List ;list of Error tables ;----------------------------------------------- ifdef Customer_Error_Code_Support ;R221 mov word ptr POST_Err_Code[bp],0 ;R221 clear value assume no error endif ;Customer_Error_Code_Support ;R221 ;R223A start ifdef POST_ERROR_TO_DMI_EVENT_LOG pusha push es mov ax,TEMP_MEM mov es,ax xor di,di mov cx,4 @@: ; clear buffer mov word ptr es:[di],0 add di,2 loop @B pop es popa endif ;POST_ERROR_TO_DMI_EVENT_LOG ;R223A end Next_Catagory: mov bx, cs:[si] ;BL = should report or not ;BH = bit to set if really ; error found mov di, cs:[si+2] ;DI = next catagory test cl, bl ;report error for this catag. jz short End_This_Catagory ;no ! add si, 4 ;skip checking bits ; & pointer to next addr. Next_Tbl_In_This_Catagory: cmp si, di ;end of this catagory ? je short End_This_Catagory ;yes ! pusha mov si, cs:[si] ;SI=error table addr. call Report_Errors ;output=CL ; if zero --> no error ; else --> error found or cl, cl ;any error reported ? popa jz short @F ;no ! or cl, bh ;mark CL to tell whether ; to wait "F1" key or not @@: inc si ;point to next tbl's addr. inc si ;point to next tbl's addr. jmp short Next_Tbl_In_This_Catagory ;try next error tbl End_This_Catagory: mov si, di ;SI point to next catagory cmp word ptr cs:[di], -1 ;have we finished all ; catagory of errors ? jne short Next_Catagory ;no, please continue ! ;----------------------------------------------- ;R221 start ifdef Customer_Error_Code_Support ;R221A Error_Code_X equ 23 ;POST screen X axis for display error code Error_Code_X equ 279 ;R221A POST screen X axis for display error code Error_Code_Y equ 178 ;R221A POST screen Y axis for display error code cmp word ptr POST_Err_Code[bp],0 je short No_error_occur mov di,(LOGO1_Expand_Address+1)*4;;;;;(11h+1)*4 ;logo1 compress index call POST_decompress ;decompress it jc short Dont_Show_Err_Msg ;error then skip mov ax, Temp_CBROM_Segment ;expand data segment mov ds, ax ;store in DS ;R221A inc byte ptr CURSOR_Y[bp] ;R221A mov al,CURSOR_Y[bp] ;text Y axis ;R221A mov cl,10h ;char high ;R221A mul cl ;R221A mov dx,ax ;pattern Y axis mov dx,Error_Code_Y ;R221A pattern Y axis xor cx,cx ;pattern X axis call Draw_LOGO_Pattern Dont_Show_Err_Msg: ;R221A mov byte ptr CURSOR_X[bp],Error_Code_X ;set erroe code X axis ;R221A mov al,byte ptr POST_Err_Code[bp+1] ;display error code ;R221A F000_call DISP_BYTE_HEX2 ;R221A mov al,byte ptr POST_Err_Code[bp] ;R221A F000_call DISP_BYTE_HEX2 ;R221A start mov cx,Error_Code_X ;pattern X axis mov ax,POST_Err_Code[bp] ;display error code Show_Num_Loop: rol ax,4 push ax push cx and ax,0fh ;error code in AX mov cx,580 mul cx ;size of cach number pattern add ax,6548h ;size of Error message pattern mov si,ax ;set to SI push ds pop es mov di,4 ;draw start offset rep movsb ;move it pop cx mov dx,Error_Code_Y+4 ;pattern Y axis call Draw_LOGO_Pattern pop ax add cx,32 ;next X axis cmp cx,Error_Code_X+32*4 ;end char jb short Show_Num_Loop ;No,continue ;R221A end ;R221B start Cmos_Error_Pause = 1 ifdef No_Report_Cmos_Error Cmos_Error_Pause = 0 endif ;No_Report_Cmos_Error ifdef NO_RTC_BATTERY_CHECK Cmos_Error_Pause = 0 endif ;NO_RTC_BATTERY_CHECK if Cmos_Error_Pause EQ 1 test byte ptr CMOS_STATUS[bp],RTC_STATUS+CKSM_STATUS jz short @F ;R221C lea si,TO_ENTER_SETUP1 ;R221C call Disp_Str_In_BIOS1 sti ;R221C ;R221F jmp $ ;R221C extrn Poll_Power_SW:near ;R221F jmp Poll_Power_SW ;R221F @@: endif ;Cmos_Error_Pause ;R221B end ;R221C sti ;enable interrupt for keyboard cli ;R221C ;R221F jmp $ ;system halt extrn Poll_Power_SW:near ;R221F jmp Poll_Power_SW ;R221F No_error_occur: else ;Customer_Error_Code_Support ;R221 end ;R153 - start ifdef Special_Patch_for_FUGU ifdef SMC93x_KeyLock_From_GPIO if SMC93x_KeyLock_From_GPIO EQ 11h ;USE GPIO11 Which_GPIO = 1 ; GPIO_PORT_MASK = 00000010b ; endif; SMC93x_KeyLock_From_GPIO ; extrn READ_GPIO:NEAR _Check_GPIO: mov al,Which_GPIO call Read_GPIO and al,gpio_PORT_MASK jnz short _UnLock_Key jmp short _Check_GPIO _Unlock_Key: endif; SMC93x_KeyLock_From_GPIO ;R153A - starts ifdef NS307_KeyLock_From_GPIO ifndef GPIO_PORT GPIO_PORT EQU (800h and 0ffffh) endif; GPIO_PORT KEYLOCK_PORT_ADDRESS = GPIO_PORT ifdef KEYLOCK_GPIO_INDEX KEYLOCK_GPIO_MASK = (1 shl (KEYLOCK_GPIO_INDEX and 0fh)) PORT_SELECT = ((KEYLOCK_GPIO_INDEX and 0f0h) shr 4) endif ;KEYLOCK_GPIO_INDEX ;R153B -starts if PORT_SELECT eq 2 KEYLOCK_PORT_ADDRESS = GPIO_PORT + 4 endif; PORT_SELECT eq 2 ;R153B -ends _Check_GPIO: mov dx, word ptr KEYLOCK_PORT_ADDRESS + 1 in al, dx and al, NOT byte ptr KEYLOCK_GPIO_MASK out dx, al ;set gpio is input mov dx, word ptr KEYLOCK_PORT_ADDRESS in al, dx and al, byte ptr KEYLOCK_GPIO_MASK jnz short _UnLock_Key jmp short _Check_GPIO _Unlock_Key: endif ;NS307_KeyLock_From_GPIO ;R153A - ends endif; Special_Patch_for_FUGU ;R153 - end test cl, DISK_ERR_REPORTED+KB_ERR_REPORTED+OTHER_ERR_REPORTED jz short No_Wait_Key_F1 test byte ptr Init_Err_Flg,IEF_TO_ENTER_SETUP jnz short No_Wait_Key_F1 ;R223A -start ifdef POST_ERROR_TO_DMI_EVENT_LOG pusha ifdef DMI_EVENT_LOG_IN_SETUP push ax mov si,offset DMI_Event_Log_Item call F000_GetItem_Value or al,al ;disabled ? pop ax jz short DMI_Event_Log_Disabled ;don't save Event Log if disabled endif ;DMI_EVENT_LOG_IN_SETUP mov ax,TEMP_MEM shl eax,16 mov bx,0 ; handle(must 0) mov cx,57h ; Pnp Func num push ax push ax push eax push eax push bx push cx FAR_CALL , 0F000h add sp,10h DMI_Event_Log_Disabled: popa endif ;POST_ERROR_TO_DMI_EVENT_LOG ;R223A -end ;====================== ;Show "F1" message on screen to inform user call F000_Vcrlf ;M01 - starts ifdef RPB_USE_VT100_KEYS_FOR_PS extrn rpb_display_error_wait_msg:near ; call rpb_display_error_wait_msg ; jnc Keep_Wait_F1 ; endif ; RPB_USE_VT100_KEYS_FOR_PS ; ;M01 - ends ifNdef Hidden_FULL_HALT_MSG ;R272 ifdef Graphics_Post ;R185A cmp byte ptr EPALOGO_FLAG[bp], 055h ;R185A;change msg for show str jne short @f ;R185A lea si, FULL_HALT_MSG ;R185A jmp short show_err_msg ;R185A @@: ;R185A test byte ptr EQUIPMENT[bp],DT_MONO ;R185B jz short @F ;R185B lea si, FULL_HALT_MSG ;R185B jmp short show_err_msg ;R185B @@: ;R185B endif; Graphics_Post ;R185A lea si,HALT_ERR_MSG show_err_msg: ;R185A call Disp_Str_In_BIOS1 endif ;Hidden_FULL_HALT_MSG ;R272 ;R216-start ;R216cifndef Flash_16K_8K_8K_Unit ;R216b ifdef CMOS_Default_in_Flash lea si,test_ERR_MSG call Disp_Str_In_BIOS1 endif ;CMOS_Default_in_Flash ;R216cendif ; Flash_16K_8K_8K_Unit ;R216b ;R216-end ;R224 - start ifdef WAIT_KEY_10_SEC ifdef WAIT_10_SEC_IF_KB_ERR ;R235 test byte ptr CMOS_STATUS[bp],KBD_STATUS ;R235 jz short NO_SET_10_SEC ;R235 endif; WAIT_10_SEC_IF_KB_ERR ;R235 push ds mov ax, g_ram mov ds, ax assume ds:g_ram mov byte ptr g_ram:[MOTOR_OFF_WAIT], 182 ;10 sec pop ds NO_SET_10_SEC: ;R235 endif; WAIT_KEY_10_SEC ;R224 - end Keep_Wait_F1: ;r143 start ifdef RPB_ENABLED ; RXX extrn rpb_reinit:near call rpb_reinit ; re=initialize rpb serial port endif ; RPB_ENABLED ;r143 end ifndef NO_HALT_ON_ANY_ERROR ;R189 ;R202 - start ifdef NO_HALT_BUT_WAIT_3_SEC ;wait 3 seconds and continue to boot mov ah,86h ;function "Wait" mov cx, 3000000 / 65535 ;wait for 3 seconds mov dx, 3000000 mod 65535 int 15h jmp short No_Wait_Key_F1 endif; NO_HALT_BUT_WAIT_3_SEC ;R202 - end ;R224 - start ifdef WAIT_KEY_10_SEC ifdef WAIT_10_SEC_IF_KB_ERR ;R235 test byte ptr CMOS_STATUS[bp],KBD_STATUS ;R235 jz short NO_WAIT_10_SEC ;R235 endif; WAIT_10_SEC_IF_KB_ERR ;R235 No_Key_Pressed: push ds mov ax,g_ram mov ds, ax cmp byte ptr g_ram:[MOTOR_OFF_WAIT], 0 ;time is up? pop ds je short No_Wait_Key_F1 mov ax,0100h ;wait for key int 16h jz short No_Key_Pressed NO_WAIT_10_SEC: ;R235 endif; WAIT_KEY_10_SEC ;R224 - end xor ax,ax ;wait for key int 16h ;M01 - starts ifdef RPB_USE_VT100_KEYS_FOR_PS ; extrn rpb_check_special_keys:near call rpb_check_special_keys jnc Got_Key_F1 ; Special RPB key hit endif ; RPB_USE_VT100_KEYS_FOR_PS ;M01 - ends cmp ax,5300h ;del key? je short Got_Key_F1 ;yes, continue with POST ! cmp ax,3b00h ;F1 key? je short Got_Key_F1 ;R216;yes, continue with POST ! ;R216-start ;R216cifndef Flash_16K_8K_8K_Unit ;R216b ifdef CMOS_Default_in_Flash cmp ax,3c00h ;F2 key? je short Got_Key_F2 ;yes, continue with POST ! endif ;CMOS_Default_in_Flash ;R216cendif ; Flash_16K_8K_8K_Unit ;R216b ;R216-end jne short Keep_Wait_F1 ;no, keep on waiting for "F1" ;R216-start ;R216cifndef Flash_16K_8K_8K_Unit ;R216b ifdef CMOS_Default_in_Flash Got_Key_F2: pusha pushf push di push si call ROMCMOS_DATA_BACKUP ; CMOS_DATA_BACKUP pop si pop di popf popa endif ;CMOS_Default_in_Flash ;R216cendif ;Flash_16K_8K_8K_Unit ;R216b ;R216-end Got_Key_F1: endif; NO_HALT_ON_ANY_ERROR ;R189 ;====================== No_Wait_Key_F1: endif ;Customer_Error_Code_Support ;R221 ret Try_Report_Error Endp ;------------------------------------------------- ;------------------------------------------------- HALT_DISK EQU 00000001b HALT_KB EQU 00000010b HALT_OTHER EQU 00000100b DISK_ERR_REPORTED EQU 00010000b KB_ERR_REPORTED EQU 00100000b OTHER_ERR_REPORTED EQU 01000000b Halt_Level_Trans: db HALT_DISK+HALT_KB+HALT_OTHER ;'All Errors ',0 db 0 ;'No Errors ',0 db HALT_DISK+HALT_OTHER ;'All,But Keyboard',0 db HALT_DISK+HALT_KB+HALT_OTHER ;'Invalid ',1 db HALT_KB+HALT_OTHER ;'All,But Diskette',0 db HALT_DISK+HALT_KB+HALT_OTHER ;'Invalid ',1 db HALT_OTHER ;'All,But Disk/Key',0 db HALT_DISK+HALT_KB+HALT_OTHER ;'Invalid ',1 public Error_Tbl_List ;R223A Error_Tbl_List: db HALT_DISK ;bit to check report or not db DISK_ERR_REPORTED ;bit to set for error found dw offset @F ;pointer to next catagory dw offset Fixed_Error_Tbl ;error table offset dw offset Floppy_Error_Tbl ;error table offset ifdef Show_IDE_Changed_Message ;R242 dw offset IDE_Changed_TBL ;Change table offset ;R242 endif; Show_IDE_Changed_Message ;R242 @@: db HALT_KB ;bit to check report or not db KB_ERR_REPORTED ;bit to set for error found dw offset @F ;pointer to next catagory dw offset Kbd_Error_Tbl ;error table offset dw offset Kbd_Error_Tbl_1 ;error table offset @@: db HALT_OTHER ;bit to check report or not db OTHER_ERR_REPORTED ;bit to set for error found dw offset @F ;pointer to next catagory dw offset Other_Error_Tbl ;error table offset dw offset Mem_Error_Tbl ;error table offset dw offset Override_Error_Tbl ;error table offset ;R172 - start ifdef OEM_Error_Special_Show1 dw offset OEM_Error_Special_Tbl1 endif; OEM_Error_Special_Show1 ifdef OEM_Error_Special_Show2 dw offset OEM_Error_Special_Tbl2 endif; OEM_Error_Special_Show2 ;R172 - end ;R219 -start ifdef Show_PS2_UnConnect_Message dw offset Mouse_Error_Tbl ;error table offset endif ;Show_PS2_UnConnect_Message ;R219 -end @@: dw -1 ;no more ! ;R38 - ends ;R172 - starts ifdef OEM_Error_Special_Show1 extrn OEM_Error_Special_String1:near OEM_Error_Special_Tbl1: dw OEM_Error_CMOS1 db OEM_Error_CMOS_Bits1 dw offset OEM_Error_Special_String1 db 0 ; end of table endif; OEM_Error_Special_Show1 ifdef OEM_Error_Special_Show2 extrn OEM_Error_Special_String2:near OEM_Error_Special_Tbl2: dw OEM_Error_CMOS2 db OEM_Error_CMOS_Bits2 dw offset OEM_Error_Special_String2 db 0 ; end of table endif; OEM_Error_Special_Show2 ;R172 - ends ;[]==============================================================[] ; ;REPORT_ERRORS: ; ; Use the status information given from a table to check ; error status. ; ;Saves: DS ; ;Entry: CS:SI Offset to error table ;R38 ;Exit: NONE ;Exit: CL = 0 --> no error msg shown ;R38 ; else --> error msg has been shown ;R38 ; ;[]==============================================================[] PUBLIC REPORT_ERRORS REPORT_ERRORS PROC NEAR xor cl, cl ;R38 push ds ; save ds push cs pop ds lodsw ; get offset on stack mov di,ax mov bh,byte ptr [bp+di] ; get value to test re_1: lodsb ; get test mask... mov bl,al lodsw ; get test string or bl,bl ; done with table? je short re_9 ; yes... test bh,bl ; do we have an error? je short re_1 ; no... ;R38 push si ; save table index ;R38 push bx ;R38 mov si,ax ; get string to display ;R38 call F000_Vcrlf ;R38 push ds ;R38 push 0f000h ;R38 pop ds ;R38 call Disp_Err_Msg ; display it... ;R38 pop ds ;R38 pop bx ;R38 pop si ;R38 ;R38 cmp di,FIXED_ERROR ;R38 je short re_9 ;R38 cmp di,FLOPPY_ERROR ;R38 je short re_9 ;R223 -start ifdef POST_ERROR_TO_DMI_EVENT_LOG pusha push es ;R223A push ds push si ;R223A ifdef DMI_EVENT_LOG_IN_SETUP push ax mov si,offset DMI_Event_Log_Item call F000_GetItem_Value or al,al ;disabled ? pop ax ;R223B jz short DMI_Event_Log_Disabled ;don't save Event Log if disabled jz short DMI_Event_Log_Disabled1 ;R223B don't save Event Log if disabled endif ;DMI_EVENT_LOG_IN_SETUP mov dx,bx ;R223Asave error code mov bx,TEMP_MEM mov es,bx ;R223A start xor bx,bx mov si,offset GPNV_Error_list @@: cmp word ptr cs:[si+bx],di je short @F add bx,2 ;R223C cmp bx,6 ;R223C jb short @B jmp short @B ;R223C @@: shr bx,1 or byte ptr es:[bx],dh ;R223A end ;R223A xor di,di ;R223A mov word ptr es:[di],ax ;R223A mov word ptr es:[di+2],cs ;R223A shl ebx,16 ;R223A mov ax,0 ; handle(must 0) ;R223A mov cx,57h ; Pnp Func num ;R223A push bx ;R223A push bx ;R223A push ebx ;R223A push ebx ;R223A push ax ;R223A push cx ;R223A FAR_CALL , 0F000h ;R223A add sp,10h ;R223ADMI_Event_Log_Disabled: ;R223A pop ds ;R223A start push di mov cx,6 mov di,8 mov bx,offset Time_Cmos_tbl @@: mov si,word ptr cs:[bx] mov al,byte ptr ss:[bp+si] mov es:[di],al inc di add bx,2 loop short @B pop di DMI_Event_Log_Disabled1: ;R223B pop si ;R223A end pop es popa endif ;POST_ERROR_TO_DMI_EVENT_LOG ; -end ifdef Customer_Error_Code_Support ;R221 or POST_Err_Code[bp],ax ;R221 else ;Customer_Error_Code_Support ;R221 ;R38 - starts pusha ;R243C - start ifdef RESTORE_POSTSCN_FOR_ERROR push ds push es push ax ;restore INT 10H for POST error message display mov ax,G_RAM mov ds,ax ASSUME DS:G_RAM mov esi,dword ptr ds:[TEMP_BP+2] ;get original vector xor ax, ax mov es,ax mov es:[10H*4],esi ;restore INT 10H pop ax pop es pop ds NoPostError: endif; RESTORE_POSTSCN_FOR_ERROR ;R243C - end call F000_Vcrlf mov si,ax ; get string to display ;M01 - starts ifdef RPB_ENABLED ifdef RPB_BOOT_FAIL_TRIGGER ; M01 push cs ; push code segment pop ds ; point DS to CS F000_call rpbf_preboot_agent_trigger ; connect with Preboot Agent on failure endif endif ;M01 - ends call Disp_Err_Msg ; display it... popa endif ;Customer_Error_Code_Support ;R221D mov cl, -1 ;to tell caller that ;error has been reported ;R40 cmp di,FIXED_ERROR ;R40 jne short @F ;R40 cmp bl, 01h ;reporting Key lock ? ;R40 je short @F ;yes ! ;R40 mov al,FIXED_ERROR[bp] ;R40 F000_call DISP_BYTE_HEX2 ;R40 jmp short re_9 ;R40 @@: cmp di,FLOPPY_ERROR jne short @F ifndef Customer_Error_Code_Support ;R221D mov al,FLOPPY_ERROR[bp] F000_call DISP_BYTE_HEX2 endif ;Customer_Error_Code_Support ;R221D jmp short re_9 @@: ;R38 - ends jmp short re_1 ; get next error entry... ;R221Dendif ;Customer_Error_Code_Support ;R221 re_9: pop ds ret REPORT_ERRORS ENDP ;R85 public F000_Set_Cyrix ;R49 ;R85 F000_Set_Cyrix Proc Near ;R85 F000_Call Set_Cyrix ;R85 ret ;R85 F000_Set_Cyrix Endp ;R85 ;R85 ;R85 F000_Get_Cyrix Proc Near ;R85 F000_Call Get_Cyrix ;R85 ret ;R85 F000_Get_Cyrix Endp ;R85 ;R85 Enable_M1_FarHit proc near ;R85 ;R85 ifndef P6_BIOS_ONLY ;R85 ;R85 call Check_M1_Cpu ;R85 jne short Not_M1_Cpu ;R85 ;R85 F000_call UNlock_Cyrix ;R85 ;R85 ;R82 - start ;R85 ifdef HIGH_6X86_L2_HIT_RATE ;R85 ;Enable WT_ALLOC of CCR5 to improve L2 cache hit rate for CCT386.EXE ;R85 ;For 256Kb cache it improve hit rate from 26% upto 62% for 6x86 CPUs ;R85 mov cl,0E9H ;CCR5 ;R85 call F000_Get_Cyrix ;R85 or al,01H ;enable WT_ALLOC ;R85 call F000_Set_Cyrix ;R85 endif; HIGH_6X86_L2_HIT_RATE ;R85 ;R82 - end ;R85 ;R85 ;set bit 6 of index 30H ;R85 mov cl,30H ;R85 call F000_Get_Cyrix ;R85 or al,40H ;R85 call F000_Set_Cyrix ;R85 ;R85 ;enable far hit ;R85 mov ebx,28h ;R85 db 0fh,26h,0cbh ;mov tr1,ebx ;R85 db 0fh,24h,0d0h ;mov eax,tr2 ;R85 and al,NOT 02H ;enable far hits ;R85 db 0fh,26h,0d0h ;mov tr2,eax ;R85 ;R85 ;clear bit 6 of index 30H ;R85 mov cl,30H ;R85 call F000_Get_Cyrix ;R85 and al,NOT 40H ;R85 call F000_Set_Cyrix ;R85 ;R85 F000_call lock_Cyrix ;R85 ;R85 Not_M1_Cpu: ;R85 endif; P6_BIOS_ONLY ;R85 ;R85 ret ;R85 Enable_M1_FarHit endp ;[]==============================================================[] ; ; Table format: ; ; Word Contains offset on stack of byte to get error ; information from. ; ; After this, for each error to be reported there is: ; ; Byte Mask to use on byte from stack. (00 terminates) ; Word Offset to compressed string to print if mask ; returns non-zero. ; ; ;[]==============================================================[] ; Begin fixed/floppy separation ;R221 start ifdef Customer_Error_Code_Support FIXED_ERROR_TBL: dw FIXED_ERROR ;offset on stack to use... db FIXED_DIAG_ERROR ;error event dw 0000000000000001b ;error code (0001h) db HDD_Drive0_Err ;error event dw 0000000000000010b ;error code (0002h) db HDD_Drive1_Err ;error event dw 0000000000000100b ;error code (0004h) db HDD_Drive2_Err ;error event dw 0000000000001000b ;error code (0008h) db HDD_Drive3_Err ;error event dw 0000000000010000b ;error code (0010h) db OEM_Err ;error event dw 1000000000000000b ;error code (8000h) db 0 ;end of table Err_Code_Used_Bits = Err_Code_Used_Bits+3 ;total bits of used FLOPPY_ERROR_TBL: dw FLOPPY_ERROR ;offset on stack to use... db UNABLE_FLOPPY_RESET ;error event dw 0000000000100000b ;error code (0020h) db FLOPPY_TYPE_MISMATCH ;error event dw 0000000001000000b ;error code (0040h) db 0 ; end of table Err_Code_Used_Bits = Err_Code_Used_Bits+2 ;total bits of used ; End fixed/floppy separation KBD_ERROR_TBL: dw CMOS_STATUS ;offset on stack to use... db KBD_STATUS ;error event dw 0000000010000000b ;error code (0080h) db 0 ; end of table Err_Code_Used_Bits = Err_Code_Used_Bits+1 ;total bits of used KBD_ERROR_TBL_1: dw FIXED_ERROR ;bit 1 = 1 : key lock db KEY_LOCK_Err ;error event dw 0000000100000000b ;error code (0100h) db 0 ; end of table Err_Code_Used_Bits = Err_Code_Used_Bits+1 ;total bits of used OTHER_ERROR_TBL: dw CMOS_STATUS ;offset on stack to use... db SWITCH_STATUS ;error event dw 0000001000000000b ;error code (0200h) ifndef No_Report_Cmos_Error db CKSM_STATUS ;error event dw 0000010000000000b ;error code (0400h) endif ;No_Report_Cmos_Error db RTC_STATUS ;error event dw 0000100000000000b ;error code (0800h) db 0 ; end of table Err_Code_Used_Bits = Err_Code_Used_Bits+2 ;total bits of used ; Begin memory error table MEM_ERROR_TBL: DW MEM_ERR_STATUS ;offset on stack to use... DB MEM_ERR ;error event dw 0001000000000000b ;error code (1000h) DB 0 ; end of table ; End memory error table OVERRIDE_ERROR_TBL: DW OVERRIDE ;offset on stack to use... DB OVERRIDE_ENABLE ;error event dw 0010000000000000b ;error code (2000h) DB 0 ; end of table ifdef Show_PS2_UnConnect_Message MOUSE_ERROR_TBL: DW MOUSE_ERROR ;offset on stack to use... DB MOUSE_NO_DETECT ;error event dw 0100000000000000b ;error code (4000h) DB 0 ; end of table endif ;Show_PS2_UnConnect_Message else ;Customer_Error_Code_Support ;R221 end FIXED_ERROR_TBL: DW FIXED_ERROR ; offset on stack to use... ;R40 DB UNABLE_FIXED_RESET ; mask to use ;R40 DW OFFSET UNABLE_RESET_MSG ; offset of error message to display DB FIXED_DIAG_ERROR DW OFFSET FIXED_DIAG_MSG ;R40 DB UNABLE_FIXED_INIT ;R40 DW OFFSET UNABLE_INIT_MSG ;R40 ;R40 DB UNABLE_RECALIBRATE ;R40 DW OFFSET UNABLE_RECALIBRATE_MSG ;R40 ;R40 DB SECTOR_VERIFY_ERROR ;R40 DW OFFSET SECTOR_VERIFY_MSG ;R40 start db HDD_Drive0_Err dw offset HDD_Drive0_Err_Str db HDD_Drive1_Err dw offset HDD_Drive1_Err_Str db HDD_Drive2_Err dw offset HDD_Drive2_Err_Str db HDD_Drive3_Err dw offset HDD_Drive3_Err_Str ;R40 end DB 0 ; end of table FLOPPY_ERROR_TBL: DW FLOPPY_ERROR DB UNABLE_FLOPPY_RESET DW OFFSET FLOPPY_RESET_MSG DB FLOPPY_TYPE_MISMATCH DW OFFSET FLOPPY_MISMATCH_MSG DB 0 ;R242 - start ifdef Show_IDE_Changed_Message IDE_Changed_TBL: DW IDE_Changed_REG DB IDE_0_Changed DW offset IDE_Drive0_Changed_Str DB IDE_1_Changed DW offset IDE_Drive1_Changed_Str DB IDE_2_Changed DW offset IDE_Drive2_Changed_Str DB IDE_3_Changed DW offset IDE_Drive3_Changed_Str DB 0 endif; Show_IDE_Changed_Message ;R242 - start ; End fixed/floppy separation KBD_ERROR_TBL: DW CMOS_STATUS DB KBD_STATUS DW KBD_ERR_MSG DB 0 ; end of table KBD_ERROR_TBL_1: DW FIXED_ERROR ;bit 1 = 1 : key lock ;R40 db 01h db KEY_LOCK_Err ;R40 dw offset KEY_LOCK_MSG DB 0 OTHER_ERROR_TBL: DW CMOS_STATUS DB SWITCH_STATUS DW OFFSET VID_SWITCH_MSG ifndef No_Report_Cmos_Error ;R12 DB CKSM_STATUS DW OFFSET CKSM_ERROR_MSG endif ;No_Report_Cmos_Error ;R12 DB RTC_STATUS DW BATTERY_FAIL_MSG DB 0 ; end of table ; Begin memory error table MEM_ERROR_TBL: DW MEM_ERR_STATUS DB MEM_ERR DW OFFSET MEM_ERROR_MSG DB 0 ; End memory error table OVERRIDE_ERROR_TBL: DW OVERRIDE DB OVERRIDE_ENABLE DW OFFSET OVERRIDE_ENABLE_STR DB 0 ;R219 -start ifdef Show_PS2_UnConnect_Message MOUSE_ERROR_TBL: DW MOUSE_ERROR DB MOUSE_NO_DETECT DW OFFSET MOUSE_ERR_STR DB 0 endif ;Show_PS2_UnConnect_Message ;R219 -end endif ;Customer_Error_Code_Support ;R221 ;R223A start ifdef POST_ERROR_TO_DMI_EVENT_LOG public GPNV_Error_List GPNV_Error_List: DW FIXED_ERROR DW FLOPPY_ERROR DW CMOS_STATUS DW MEM_ERR_STATUS DW OVERRIDE ifdef Show_PS2_UnConnect_Message DW MOUSE_ERROR endif ;Show_PS2_UnConnect_Message DB 0 Time_Cmos_tbl: dw 9 dw 8 dw 7 dw 4 dw 2 dw 0 endif ;POST_ERROR_TO_DMI_EVENT_LOG ;R223A end ;R51 ifdef NO_CPU_CLOCK_DISPLAY ;R89CPU_Type_Clk1: db ' CPU',0 ;R89A CPU_Type_Clk1: db 'CPU',0 ;R89 CPU_Type_Clk1: db ' CPU Found',0 ;R89A ;R51 endif; NO_CPU_CLOCK_DISPLAY ;R30 - start ifdef PNP_BIOS ifdef NEW_SUPERIO_KERNEL Detect_IO_AndRecord proc near call Cp_Install ;Copy detected port into temporary area at 0:510H mov ax,G_RAM mov ds,ax ;DS = BIOS Data Area assume ds:G_RAM push ds mov ax,510H ;temporary address mov es,ax xor di,di ;destination address mov si,offset COMM_PORT_ADDRS push si mov cx,7 ;total 7 ports to copy rep movsw pop di ;DI=40:0 pop es ;es=G_RAM mov cx,7 xor ax,ax rep stosw ;clear port address ret Detect_IO_AndRecord endp ;========================================================================= ;Input : None ;Output : CL = 0 --> no error msg shown ;R38 ; else --> error msg has been shown ;R38 ;========================================================================= Disp_Conflict_IO proc near ;R38 push CMOS_STATUS[bp] and byte ptr CMOS_STATUS[bp],NOT EQUIP_STATUS;clear error mov cx,3 LoopCflt_IO: mov ax,cx ; device number dec al ; start from 0 call Get_Node_IO jc short NextCflt_IO call Chk_Conflict ;check if conflict NextCflt_IO: loop short LoopCflt_IO ;R38 - starts mov cl, -1 test byte ptr CMOS_STATUS[bp],EQUIP_STATUS jnz short @F xor cl, cl @@: ;R38 - ends ;R38 pop CMOS_STATUS[bp] ;R38 or byte ptr CMOS_STATUS[bp],EQUIP_STATUS ;mark error ret Disp_Conflict_IO endp ;Input : ax - port number to display ;Output: none Disp_PortAddr proc near ;display port number pushad F000_call AX_To_HEX3 F000_call SHOW_Six_Digit inc byte ptr CURSOR_X[bp] popad ret Disp_PortAddr endp ;Input : ax - port to check conflict ;Output: carry set - port conflicted ; non-carry - no conflict Chk_Conflict proc near pusha push ds mov cx,510H ;temporay area stored conflict mov ds,cx ;I/O address mov bx,ax ;save port address mov cx,7 ;7 I/O ports to check xor si,si ChkNxt_Conflict: lodsw or ax, ax ;R30A jz short _JIJHFR ;R30A cmp ax,bx ;match ? je short Yes_Conflict _JIJHFR: ;R30A loop short ChkNxt_Conflict jmp short NoConflict ;no conflict Yes_Conflict: push ax test byte ptr CMOS_STATUS[bp],EQUIP_STATUS ;mark error jnz short Skip_CnflStr call F000_Vcrlf ;R37 mov si,offset Conflict_Str call Disp_Err_Msg ; display it... Skip_CnflStr: pop ax call Disp_PortAddr or byte ptr CMOS_STATUS[bp],EQUIP_STATUS ;mark error or byte ptr MEM_ERR_STATUS[bp],80H ;mark error NoConflict: pop ds popa ret Chk_Conflict endp Conflict_Str db 'Conflict I/O Ports : ',0 endif; NEW_SUPERIO_KERNEL endif; PNP_BIOS ;R30 - end ;R31 - start ;R198 IFDEF NoteBook_Power_Management if STD_Function EQ 1 ;R198 Public F000_Check_0V_Resume F000_Check_0V_Resume: F000_Call Check_0V_Resume ret endif ;STD_Function EQ 1 ;R198 ;R198 ENDIF ;NoteBook_Power_Management ;R31 - end ;R218 start ifdef VSA_VGA ifdef S2D_SUPPORT FCheck_VSA_resume: F000_call Check_VSA_resume ret endif ;S2D_SUPPORT endif ;VSA_VGA ;R218 end ifdef HPM_Support ;R176A FCheck_HPM_Resume: ;R176A F000_Call Check_HPM_Resume;R176A ret ;R176A endif ;HPM_Support ;R176A ;R33 - starts Public F_C000_Shadow_R ;R106 F_C000_Shadow_R: F000_Call C000_Shadow_R ret Public F_C000_Shadow_RW ;R106 F_C000_Shadow_RW: F000_call C000_Shadow_RW ret ;R33 - ends ;R65 - start ;[]==============================================================[] ; ; REPORT_ERROR_WSPKR: ; ; Reports errors before the video is available. The unique ; number of long and short beeps can identify the type ; of the error. ; ; ;Saves: NONE ; ;Entry: DH Number of long beeps to make ; DL Number of short beeps to make ; ;Exit: NONE ; ;Author: Award ;Date: 04/18/90 ; ; Name | Date | Description ; --------------------------------------------------------------- ; TIM | 18-Apr-90 | Update to 4.0 ; ;[]==============================================================[] ALIGN 4 PUBLIC REPORT_ERR_WSPKR REPORT_ERR_WSPKR PROC NEAR ifndef NO_POST_BEEP CLI PUSHF PUSH DS MOV BX,G_RAM ; CAUSED A BUG WHEN MOVED MOV DS,BX ; set ds=0 ASSUME DS:G_RAM OR DH,DH ; any long beeps? JZ SHORT SHORT_B ; no... ; ; Long beeps ; ALIGN 4 ; 303A LONG_B: MOV BL,6 call E000_Snd_Spkr ;R72 ;R71 F000_CALL SND_SPKR LOOP SHORT $ DEC DH JNZ SHORT LONG_B ; ; Short beeps ; ALIGN 4 ; 303A SHORT_B: MOV BL,1 call E000_Snd_Spkr ;R72 ;R72 F000_CALL SND_SPKR LOOP SHORT $ DEC DL JNZ SHORT SHORT_B LOOP SHORT $ LOOP SHORT $ POP DS POPF STI endif; NO_POST_BEEP RET REPORT_ERR_WSPKR ENDP ;R65 - end ;R72 - start ;Function : Enable gate A20 routine, code located in E-segment ;Input : none ;Output : none public E000_A20_On E000_A20_On proc near F000_CALL A20_On ret E000_A20_On endp E000_Snd_Spkr proc near F000_CALL Snd_Spkr ret E000_Snd_Spkr endp E000_Disp_Dword_Int6 proc near F000_CALL Disp_Dword_Int6 ret E000_Disp_Dword_Int6 endp ;R72 - end ;R85 ifdef KLAMATH_CPU_ONLY ;R80 ;R85 include P6L2cach.inc ;R80 ;R85 endif; KLAMATH_CPU_ONLY ;R80 ;R85 ;R85 include P6DATA.INC ;R216-start ;R216cifndef Flash_16K_8K_8K_Unit ;R216b ifdef CMOS_Default_in_Flash ROMCMOS_DATA_BACKUP PROC NEAR push ds push es push bp Xcall Search_CMOS_label push bx and si,0fff0h ;GET CMOS LENGTH Value ;R216a mov dl,byte ptr ds:[si] ;R216a mov dh,byte ptr ds:[si+1] ;GET ROM CMOS Checksum mov dl,byte ptr ds:[si+6] ;R216a; mov dh,byte ptr ds:[si+6+1] ;R216a;GET ROM CMOS Checksum Xcall CMOS_DRAM_CHECKSUM ;GET CMOS RAM Checksum cmp dh,al ;Compare RomChecksum == CMOSRamChecksum pop si je short ROM_Have_CMOS_Backup;ROM Have CMOS Real Data mov dh,0aah ;R216d; Xcall Check_Flash_CMOS ;R216d; ;R216d; push si ;R216d; mov cx, 10h ;start CMOS 10H ;R216d; mov bx,bp ;bp Address Value Transfer To BX Register ;R216d; add bx,cx ;bp + 10H ;R216d;WRITE_TO_CMOS_DRAM_LP: ;R216d; mov al,cl ;ah=index,al=value ;R216d; mov ah,byte ptr ss:[bx] ;[BP] Value Transfer To ;R216d; mov byte ptr DS:[si],ah ;To DRAM ;R216d; inc si ;R216d; inc cl ;R216d; inc bx ;R216d; mov ch,dl ;FLASH CMOS len == dl ;R216d; add ch,0fh ;R216d; cmp cl,ch ;Compare FLASH CMOS len == 128 byte ;R216d; jbe short WRITE_TO_CMOS_DRAM_LP ;R216d; pop bx ;R216d; push si ;R216d; Xcall CMOS_DRAM_CHECKSUM ;Get CMOSRAM CheckSum ;R216d; pop bx ;R216d; push si ;R216d; Xcall DRAM2FLASH ;Get DRAMData To FlashRom ;R216d; pop si jmp short ROMDATA_Backup_exit;R216 ROM_Have_CMOS_Backup: mov dh,003h ;R216d; Xcall Check_Flash_CMOS ;R216d; ;R216d; Xcall Search_CMOS_label ;R216d; push bx ;R216d; and si,0fff0h ;GET CMOS LENGTH Value ;R216d;;R216a mov dh,byte ptr ds:[si] ;R216d; mov dh,byte ptr ds:[si+6] ;R216a; ;R216d; pop si ;R216d; mov cx, 10h ;R216d; mov bx,bp ;R216d; add bx,cx ;R216d;BP_TX_LP: ;R216d; push 8000h ;CMOS_Data_Area==8000h ;R216d; pop ds ;R216d; mov al,byte ptr DS:[si] ;CMOSDRAM Value Transfer ;R216d; mov byte ptr ss:[bx],al ;To [BP] ;R216d; inc si ;R216d; inc cl ;R216d; inc bx ;R216d; xor ch,ch ;R216d; mov ch,dh ;FLASH_CMOS_len==dh ;R216d; add ch,0fh ;R216d; cmp cl,ch ;R216d; jbe short BP_TX_LP ;R216b; NO_ROMDATA: ROMDATA_Backup_exit: pop bp pop es pop ds ret ROMCMOS_DATA_BACKUP endp endif ;CMOS_Default_in_Flash ;R216cendif ; Flash_16K_8K_8K_Unit ;R216b ;R216-end ;R108 - start ifdef CMOS_BACKUP_SUPPORT CMOS_DATA_AREA EQU 3000H CMOS_DATA_AREA_Flash EQU 0DF80H ;***************************************** ;Name: E000_get_cmos ;Entry: called ;Input: al = memory cell to get in cmos ; dh - Data storage (0=data in CMOS, 1=Data in Flash-ROM) ;Output: al = value ;Description: ; ;get_cmos will: ;1. address cell at 70H and read cell and return in al ;CMOS READ ONLY LOCATION : 0CH ;************************************************ ALIGN 4 E000_GET_CMOS PROC NEAR or dh, dh ; where is data stored jnz short FLASH_Get ALIGN 4 OUT CMOS,AL ; address to interface jcxz short $+2 jcxz short $+2 ALIGN 4 IN AL,CMOS+1 jcxz short $+2 jcxz short $+2 RET FLASH_Get: push bx push ds push CMOS_Data_Area pop ds mov bl, al xor bh, bh mov al, byte ptr DS:[bx] pop ds pop bx RET E000_GET_CMOS ENDP ;************************************************ ;Name: E000_set_cmos ;Entry: called ;Input: al = memory cell to store in cmos ; ah = value to store ; dh - Data storage (0=data in CMOS, 1=Data in Flash-ROM) ;Output: al = value ;Description: ; ;set_cmos will: ;1. address cell at 70H and write to cell and return in al ;************************************************ E000_SET_CMOS PROC NEAR or dh, dh ; where is data stored jnz short FLASH_Set ALIGN 4 OUT CMOS,AL ; address to interface jcxz short $+2 jcxz short $+2 xchg al,ah ;ah=index,al=value ALIGN 4 OUT CMOS+1,AL ; and output it jcxz short $+2 jcxz short $+2 RET FLASH_Set: push bx push ds push CMOS_Data_Area pop ds mov bl, al xor bh, bh mov byte ptr DS:[bx], ah pop ds pop bx RET E000_SET_CMOS ENDP ;Input DH - 0 Read data from CMOS Write data to DRAM ;Input DH - 1 Read data from DRAM Write data to CMOS CMOS_DRAM_TX proc near pusha mov cl, 10h CMOS_DRAM_TX_LP: push dx mov al, cl call E000_Get_CMOS xor dh, 01h mov ah, al mov al, cl call E000_Set_CMOS pop dx inc cl cmp cl, 07fh jbe short CMOS_DRAM_TX_LP popa ret CMOS_DRAM_TX endp ;Read data from Flash ROM, Write data to DRAM FLASH2DRAM proc near push es push ds pusha push 0f000h pop ds ifndef ESCD_M2 mov si, CMOS_Data_Area_Flash else ;ESCD_M2 mov si, (CMOS_Data_Area_Flash-0A000h);-A000h for ESCD M2 endif ;ESCD_M2 push CMOS_Data_Area pop es xor di, di mov cx, 128 F000_CALL Flash_Read popa pop ds pop es ret FLASH2DRAM endp ;Read data from DRAM, Write data to Flash ROM DRAM2FLASH proc near push es push ds pusha push CMOS_Data_Area pop ds xor si, si push 0F000h pop es ifndef ESCD_M2 mov di, CMOS_Data_Area_Flash else ;ESCD_M2 mov di, (CMOS_Data_Area_Flash-0A000h);-A000h for ESCD M2 endif ;ESCD_M2 mov cx, 128 F000_CALL Flash_Write popa pop ds pop es ret DRAM2Flash endp Check_Flash_CMOS proc near pusha push ds push es call Flash2DRAM ;Copy CMOS data(in Flash) to DRAM mov dh, 01h ;CMOS data in Flash invalid? call CMOS_checksum_A jz short Flash_Valid ;CMOS data in Flash valid xor dh, dh call CMOS_checksum_A ;CMOS data in CMOS valid? jnz short CMOS_Invalid xor dh, dh ;Copy CMOS data to DRAM call CMOS_DRAM_TX call DRAM2FLASH ;Write CMOS data to Flash Rom CMOS_Invalid: ;CMOS & FLASH invalid, load default value and write to FLASH mov di, 1 ;Load default value call Check_CMOS_Sum jmp short Check_Flash_CMOS_Exit Flash_Valid: xor dh, dh call CMOS_checksum_A ;CMOS data in CMOS valid? jz short CMOS_Flash_Valid call Flash2DRAM ;Copy CMOS data(in Flash) to DRAM mov dh, 1 ;Copy DRAM data to CMOS call CMOS_DRAM_TX jmp short Check_Flash_CMOS_Exit CMOS_Flash_Valid: call Flash2DRAM ;Copy CMOS data(in Flash) to DRAM call CMP_CMOS_Flash ;Compare CMOS data and Flash data jz short Check_Flash_CMOS_exit xor dh, dh ;Copy CMOS data to DRAM call CMOS_DRAM_TX call DRAM2Flash ;Copy CMOS data(in CMOS) to Flash call Flash2DRAM ;Copy CMOS data(in Flash) to DRAM Check_Flash_CMOS_Exit: pop es pop ds popa ret Check_Flash_CMOS endp ;Return: ZF - CMOS EQ Flash ; NZ - NOT (CMOS EQ Flash) CMP_CMOS_FLASH proc near pusha push ds push 0f000h pop ds mov si, offset DGROUP:Cmos_Check_Sum cld Next_CMP: lodsb ;Get CMOS starting address or al, al jz short Finish_CMP mov cl, al lodsb ;Get CMOS Ending address mov ch, al lodsb ;Get CMOS Checksum low byte mov dl, al CMOS_Flash_CMP_Loop: mov al, cl xor dh, dh ;Get Data from CMOS call E000_Get_CMOS mov dl, al inc dh ;Get Data from Flash mov al, cl call E000_Get_CMOS cmp dl, al jne CMP_Fail inc cl cmp cl, ch jbe short CMOS_Flash_CMP_Loop jmp short Next_CMP CMP_Fail: Finish_CMP: pop ds popa ret CMP_CMOS_Flash endp ;Input : DH - Data storage (0=data in CMOS, 1=Data in Flash-ROM) ;Return: ZF - Checksum OK ; NZ - Checksum fail CMOS_Checksum_A proc near pusha mov si, offset DGROUP:Cmos_Check_Sum cld Next_Sum: lodsb ;Get CMOS starting address or al, al jnz short @F jmp short Finish_Sum @@: mov cl, al lodsb ;Get CMOS Ending address mov ch, al lodsb ;Get CMOS Checksum low byte mov dl, al call CMOS_Checksum jnz short chksum_fail jmp short Next_Sum Finish_Sum: chksum_fail: popa ret CMOS_Checksum_A endp ;Input : CL - CMOS start location ; CH - CMOS End location ; DL - CMOS checksum low byte ; DH - Data storage (0=data in CMOS, 1=Data in Flash-ROM) ;Return: ZF - Checksum OK ; NZ - Checksum fail CMOS_Checksum proc near pusha xor bx, bx CHKSUM_Loop: mov al, cl call E000_Get_CMOS xor ah, ah add bx, ax inc cl cmp cl, ch jbe short CHKSUM_Loop mov al, dl ;Get checksum call E000_Get_CMOS mov ch, al inc dl mov al, dl call E000_Get_CMOS mov cl, al ;Checksum in CX cmp cx, bx popa ret CMOS_Checksum endp endif ;CMOS_BACKUP_SUPPORT ;R108 - end ;R152D;R152 start ;R152D;============================================================================= ;R152D; Procedure: POST_decompress ;R152D; for POST runtime decompress ROM BIOS ;R152D; Input : DI = decompress index (reference CBROM.EXE) ;R152D; Output: decompress ROM BIOS to 4000:0 ;R152D; destroy : ALL register but DS,ES ;R152D;============================================================================= ;R152D public POST_decompress ;R152DPOST_decompress: ;R152D push ds ;R152D push es ;R152D;R156 pushad ;R152D push bp ;R156 ;R152D ;R152D cli ;R152A ;R152D ;R152D mov al,TRUE ;R152D call F000_Cpu_Cache ;R152D ;R152D;----- push data and offset for decompress request ;R152D mov bx,Temp_EXP_Seg ;R152D mov es,bx ;R152D ;R152Difdef Flash_2M_support ;R152D mov esi,160000h ;R152D cmp es:[di+Temp_EXP_Off+2],8000h ;R152D je short @F ;R152D add esi,10000h ;R152D@@: ;R152D push es ;R152D push di ;R152D call E000_A20_On ;R152B turn on a20 gate ;R152D call E000_Enter_Prot_mode ;R152D mov ax,ds ;R152D mov es,ax ;R152D;R152C mov edi,MOV_SHAD_SEG ;R152D;R152C shl edi,4 ;R152D mov edi,80000h ;R152C ;R152D mov ecx,4000h ;R152D cld ;R152D db 67h ;R152D rep movsd ;move extend 128k data to 160000h ;R152D call E000_Back_Real_Mode ;R152D F000_CALL A20_Off ;R152Bturn gate A20 off ;R152D pop di ;R152D pop es ;R152Dendif ;Flash_2M_support ;R152D ;R152D mov ebx,es:[di+Temp_EXP_Off] ;R152D or ebx,ebx ;R152D jz short Decomp_Data_Empty ;R152D cmp bx,0ffffh ;R152D je short Decomp_Data_Empty ;R152Difdef Flash_2M_support ;R152D;R152C push MOV_SHAD_SEG ;R152D push 8000h ;R152C ;R152Delse ;Flash_2M_support ;R152D push es:[di+Temp_EXP_Off+2] ;R152Dendif ;Flash_2M_support ;R152D mov di,es:[Temp_EXP_Off] ;R152D pop es ;R152D push cs ;R152D push offset @F ;R152D push 0dfffh ;R152D;----- Execute decompress ----- ;R152D mov dx,Exp_Data_Seg ;R152D push 2000h ;R152D push di ;R152D retf ;R152D@@: ;R152D;R152C start ;R152Difdef Flash_2M_support ;R152D mov di,8000h ;R152D mov es,di ;R152D xor di,di ;R152D xor eax,eax ;R152D mov cx,4000h ;R152D rep stosd ;R152Dendif ;Flash_2M_support ;R152D;R152C end ;R152D;R179 mov al,FALSE ;R152D;R179 call F000_Cpu_Cache ;R152D clc ;R152D jmp short POST_decomp_Ret ;R152DDecomp_Data_Empty: ;R152D stc ;R152DPOST_decomp_Ret: ;R152D pushf ;R179 ;R152D mov al,FALSE ;R179 ;R152D call F000_Cpu_Cache ;R179 ;R152D popf ;R179 ;R152D ;R152D pop bp ;R156 ;R152D;R156 popad ;R152D pop es ;R152D pop ds ;R152D ret ;R152D;R152 end ;R271A start ifdef DMI_EVENT_LOG_IN_SETUP public clear_dmi_event_log_func clear_dmi_event_log_func proc far ;R271B push eax ;R271B start mov ax,0f000h ;BIOS/DMI selector push ax ;push BIOS selector to stack for function call push ax ;push DMI selector to stack for function call ;R271B end mov ax,1 ; control push ax ifdef flash_in_smbase xor eax,eax else ;flash_in_smbase mov ax,TEMP_MEM shl eax,16 endif ;flash_in_smbase push eax ; data buffer ifndef flash_in_smbase mov ax,0 endif ;flash_in_smbase push ax ; sub func num mov ax,54h ; Pnp Func num push ax FAR_CALL , 0F000h add sp,0Eh ret clear_dmi_event_log_func endp endif ;DMI_EVENT_LOG_IN_SETUP ;R271A end ECODE ENDS FCODE SEGMENT PARA PUBLIC 'CODE' ASSUME CS:DGROUP FCODE ENDS END