; []===========================================================[] ; ; NOTICE: THIS PROGRAM BELONGS TO AWARD SOFTWARE INTERNATIONAL(R) ; INC. IT IS CONSIDERED A TRADE SECRET AND IS NOT TO BE ; DIVULGED OR USED BY PARTIES WHO HAVE NOT RECEIVED ; WRITTEN AUTHORIZATION FROM THE OWNER. ; ; []===========================================================[] ; ;============================================================================= ; FILE: DMI.EQU ; ; DESC: DMI EQUates ; This information is based upon the: ; ; Desktop Management BIOS Specification ; Version 2.0 ; ; BY: Tim Markey, Award Software International Inc. ; DATE: 8/1/1995 ;============================================================================= ;Rev Date Author Description ;----------------------------------------------------------------------------- ;R21 04/19/99 STV Changed save CMOS data to flash area for "Support_CMOS_Backup_Data" ;R20 02/26/99 BAR Support 32bit address to update Flash. ;R19 01/26/99 BAR Support update ESCD DMI in SMM mode. ; define switch "Flash_IN_SMBASE" ;R18 12/29/98 STV Add func 52h Command(06h) - A block of information ;R17 09/29/98 KVN Release DMI and ESCD pool in flash ROM when not define ; "ESCD_SUPPORT" and "FLASH_SUPPORT" in BIOS.CFG ;R16 09/16/98 STV Added define "SMBIOS_SUPPORT_VER" EQU for SMBIOS VER. ;R15 09/15/98 STV Added SMBIOS 2.2 for define "SMBIOS_V22_Support" ;R14D 08/10/98 STV Fixed R14 DMI_MAX_POOL_SIZE Define size ;R14C 06/18/98 STV R14B's codes establish some data in shadow part. ; It will over-lap original resided codes. Taking R14B away ;R14B 06/18/98 STV Fixed GPNV Data size. ; 1M Flash : 1.P6 BIOS - 200h 2.Not P6 BIOS - 400h ; 2M Flash : 1.P6 BIOS - 400h 2.Not P6 BIOS - 1000h ;R14A 06/16/98 STV 1.Added DMI_GPNV_Support definition(DMI func 54h). ; 2.Fixed DMI func 55h,56h,57h. ;R14 05/27/98 STV Added DMI_GPNV_Support definition(DMI func 55h,56h,57h). ;R13 05/14/98 BAR Added Flash1M_16K_8K_8K_Unit definition. ;R12 12/17/97 KVV Support SMBIOS V2.1 for new DMI spec ;R11 12/26/96 AVN Support MP Secondary Update Code For 1M/2M EEPROM ;R10 11/14/96 AVN Fixed Pass for AMIDIAG.EXE PnP BIOS test. ;R09 08/30/96 KVN Don't check MAX_STRUCTURE_SIZE for each DMI structure ;R08 08/29/96 KVN Don't care flash rom brand for SET_DMI_STRUCT (DMI function 52h) ;R07 08/21/96 KVN Added 2MB flash rom DMI function support ;R06 07/08/96 KVN Change P6 data pool offset and size. ;R05 07/12/96 TJM Add extern definitions for F000_Shadow_W and F000_Shadow_R ;R04 07/11/96 TJM Add BIOS_SELECTOR_OFFSET of shadow info ;R03 07/10/96 TJM Use BIOS Selector to access information ;R02 07/03/96 TJM Update POOL even if value hasn't changed (New Equate) ;R01 06/26/96 TJM Maximum Structure Size and Maximum number of structures reduced ;R00 04/10/96 TJM Beta release 1 ;============================================================================= ifdef dmi_enabled ;R17 ifdef FLASH_SUPPORT ;R17 ;============================================================================= ; 4K Parameter Block Layout (PowerBIOS): ; ; 0000h - 05FFh - ESCD storage ; 0600h - 0BFFh - DMI Information ; 0C00h - 0C7Fh - PnP Information (only 5 bytes used) ; 0C80h - 0FFFh - System Device Node Area ; ;============================================================================= PARAM_BLOCK_SIZE EQU 1000h ; 4K Parameter Block Size USE_BIOS_SELECTOR EQU 1 ; Use BIOS Selector to access information ; R03 ;R14D -start ifdef DMI_GPNV_support GPNV_MIN_BUF_SIZE EQU 200h GPNV_BLOCK_SIZE EQU 40h endif ;DMI_GPNV_support ;R14D -end ifdef POWRBIOS ifdef DMI_GPNV_support ;R14D ;R21 DMI_MAX_POOL_SIZE EQU DMI_SIZE - GPNV_MIN_BUF_SIZE ;R14D DMI_MAX_POOL_SIZE EQU DMI_SIZE - GPNV_MIN_BUF_SIZE - CMOS_BACKUP_SIZE ;R21 else ;DMI_GPNV_support ;R14D ;R21 DMI_MAX_POOL_SIZE EQU DMI_SIZE DMI_MAX_POOL_SIZE EQU DMI_SIZE - CMOS_BACKUP_SIZE ;R21 endif ;DMI_GPNV_support ;R14D DMI_TBL_OFFSET EQU DMI_OFFSET - FLASH_BASE ; offset from base DMI_STORAGE_SIZE EQU NVS_STORAGE_SIZE else ; EliteBIOS DMI_TBL_OFFSET EQU 0000h ; Offset from base FN_OFS EQU 00h ;R11 ifdef SST_PH29EE010 ;R11 DMI_STORAGE_SIZE EQU 1000h ; size needed to hold block ;R11 else ;R11 DMI_STORAGE_SIZE EQU 1000h ; size needed to hold block ;R11 endif ;R11 - start ifdef Flash_4K_Unit DMI_STORAGE_SIZE EQU 1000h ; size needed to hold block elseifdef Flash_16K_8K_8K_Unit DMI_STORAGE_SIZE EQU 2000h ; size needed to hold block elseifdef Flash1M_16K_8K_8K_Unit ;R13 DMI_STORAGE_SIZE EQU 2000h ; size needed to hold block ;R13 endif ;R11 - end ifdef P6_BIOS_ONLY ; R06 ifdef Flash_4K_Unit ; R11 ifdef DMI_GPNV_support ;R14D ;R21 DMI_MAX_POOL_SIZE EQU 800h - GPNV_MIN_BUF_SIZE ;R14D DMI_MAX_POOL_SIZE EQU 800h - GPNV_MIN_BUF_SIZE - CMOS_BACKUP_SIZE ;R21 else ;DMI_GPNV_support ;R14D ;R21 DMI_MAX_POOL_SIZE EQU 800h ; R01 DMI_MAX_POOL_SIZE EQU 800h - CMOS_BACKUP_SIZE ;R21 endif ;DMI_GPNV_support ;R14D elseifdef Flash_16K_8K_8K_Unit ; R11 ifdef DMI_GPNV_support ;R14D ;R21 DMI_MAX_POOL_SIZE EQU 1000h - GPNV_MIN_BUF_SIZE ;R14D DMI_MAX_POOL_SIZE EQU 1000h - GPNV_MIN_BUF_SIZE - CMOS_BACKUP_SIZE ;R21 else ;DMI_GPNV_support ;R14D ;R21 DMI_MAX_POOL_SIZE EQU 1000h ; R11 DMI_MAX_POOL_SIZE EQU 1000h - CMOS_BACKUP_SIZE ;R21 endif ;DMI_GPNV_support ;R14D elseifdef Flash1M_16K_8K_8K_Unit ; R13 ifdef DMI_GPNV_support ;R14D ;R21 DMI_MAX_POOL_SIZE EQU 1000h - GPNV_MIN_BUF_SIZE ;R14D DMI_MAX_POOL_SIZE EQU 1000h - GPNV_MIN_BUF_SIZE - CMOS_BACKUP_SIZE ;R21 else ;DMI_GPNV_support ;R14D ;R21 DMI_MAX_POOL_SIZE EQU 1000h ; R13 DMI_MAX_POOL_SIZE EQU 1000h - CMOS_BACKUP_SIZE ;R21 endif ;DMI_GPNV_support ;R14D endif ; R11 else ;P6_BIOS_ONLY ; R06 ifdef DMI_GPNV_support ;R14D ;R21 DMI_MAX_POOL_SIZE EQU 1000h - GPNV_MIN_BUF_SIZE ;R14D DMI_MAX_POOL_SIZE EQU 1000h - GPNV_MIN_BUF_SIZE - CMOS_BACKUP_SIZE ;R21 else ;DMI_GPNV_support ;R14D ;R21 DMI_MAX_POOL_SIZE EQU 1000h ; Size reserved for DMI Pool DMI_MAX_POOL_SIZE EQU 1000h - CMOS_BACKUP_SIZE ;R21 Size reserved for DMI Pool endif ;DMI_GPNV_support ;R14D endif ;P6_BIOS_ONLY ; R06 endif ;R08 ifdef INTEL_28F001BXT FLASH_GRANULARITY EQU 1000h ; Flash Granularity - Intel ;R08 ;R07 elseifdef SST_PH29EE010 ;R08 else ;SST_PH29EE010 ;R07 ;R08 FLASH_GRANULARITY EQU 128 ; Flash Granularity - SST ;R08 endif ifdef POWRBIOS DMI_STORAGE_BASE EQU NVS_STORAGE_BASE ; 32 bit DMI Storage Base PARAM_BLOCK_BASE EQU FLASH_BASE ; offset else ifdef Flash_16K_8K_8K_Unit ;R07 DMI_ADDR EQU 8000h ;R07 elseifdef Flash1M_16K_8K_8K_Unit ;R13 DMI_ADDR EQU 8000h ;R13 else ;Flash_16K_8K_8K_Unit ;R07 DMI_ADDR EQU 0C000h ; Base location of parameter block endif ;Flash_16K_8K_8K_Unit ;R07 endif ifndef Flash_IN_SMBASE ;R19 ifdef ESCD_M2 ; EliteBIOS ;DMI_STORAGE_BASE EQU 0FFFF0000h ; Main System BIOS Extended loc DMI_STORAGE_BASE EQU ESCD_BASE ; Main System BIOS Extended loc DMI_STORAGE_BASE_16 EQU 0F000h ;R10 - start ifdef Flash_4K_Unit PARAM_BLOCK_BASE EQU DMI_ADDR-0A000h DMI_OFFSET EQU DMI_ADDR-0A000h BIOS_SELECTOR_OFFSET EQU DMI_ADDR elseifdef Flash_16K_8K_8K_Unit PARAM_BLOCK_BASE EQU DMI_ADDR-08000h DMI_OFFSET EQU DMI_ADDR-08000h BIOS_SELECTOR_OFFSET EQU DMI_ADDR elseifdef Flash1M_16K_8K_8K_Unit ;R13 PARAM_BLOCK_BASE EQU DMI_ADDR-08000h ;R13 DMI_OFFSET EQU DMI_ADDR-08000h ;R13 BIOS_SELECTOR_OFFSET EQU DMI_ADDR ;R13 endif ;R10 - end ;R10 PARAM_BLOCK_BASE EQU DMI_ADDR-8000h ;R10 DMI_OFFSET EQU DMI_ADDR-8000h ;R10 BIOS_SELECTOR_OFFSET EQU DMI_ADDR ; Offset of shadow info R04 else ; ESCD_M2 - EliteBIOS DMI_STORAGE_BASE EQU 0F0000h ; 32 bit DMI Storage Base DMI_STORAGE_BASE_16 EQU 0F000h PARAM_BLOCK_BASE EQU DMI_ADDR DMI_OFFSET EQU DMI_ADDR endif ; ESCD_M2 ;R19 - start else; Flash_IN_SMBASE ifdef ESCD_32bits ;R20 ifdef flash_64k_unit DMI_STORAGE_BASE_32 EQU 0fff80000h ;R20 else; flash_64k_unit DMI_STORAGE_BASE_32 EQU 0ffff0000h ;R20 endif; flash_64k_unit endif; ESCD_32bits ;R20 DMI_STORAGE_BASE EQU 0F000H ; Main System BIOS Extended loc PARAM_BLOCK_BASE EQU DMI_ADDR DMI_OFFSET EQU DMI_ADDR ;R20 BIOS_SELECTOR_OFFSET EQU DMI_ADDR endif; Flash_IN_SMBASE ;R19 - end ;R14 start ifdef DMI_GPNV_support ;R14B GPNV_MIN_BUF_SIZE EQU 200h ;R14B GPNV_BLOCK_SIZE EQU 40h ;R14B DMI_GPNV_MAX_POOL_SIZE EQU DMI_MAX_POOL_SIZE - GPNV_MIN_BUF_SIZE ;R14C -start ;R14D GPNV_MIN_BUF_SIZE EQU 200h ;R14D GPNV_BLOCK_SIZE EQU 40h ;R14D DMI_GPNV_MAX_POOL_SIZE EQU DMI_MAX_POOL_SIZE - GPNV_MIN_BUF_SIZE ;R14C -end ;R14C ;R14B start ;R14C ifdef P6_BIOS_ONLY ;R14C ifdef Flash_16K_8K_8K_Unit ; 2M FLASH ;R14C GPNV_MIN_BUF_SIZE EQU 800h ;R14C GPNV_BLOCK_SIZE EQU 80h ;R14C DMI_GPNV_MAX_POOL_SIZE EQU DMI_MAX_POOL_SIZE - GPNV_MIN_BUF_SIZE ;R14C else ;Flash_16K_8K_8K_Unit ; 1M FLASH ;R14C GPNV_MIN_BUF_SIZE EQU 200h ;R14C GPNV_BLOCK_SIZE EQU 40h ;R14C DMI_GPNV_MAX_POOL_SIZE EQU DMI_MAX_POOL_SIZE - GPNV_MIN_BUF_SIZE ;R14C endif ;Flash_16K_8K_8K_Unit ;R14C else ;P6_BIOS_ONLY ;R14C ifdef Flash_16K_8K_8K_Unit ; 2M FLASH ;R14C GPNV_MIN_BUF_SIZE EQU 2000h ;R14C GPNV_BLOCK_SIZE EQU 100h ;R14C DMI_GPNV_MAX_POOL_SIZE EQU DMI_MAX_POOL_SIZE ;R14C else ;Flash_16K_8K_8K_Unit ; 1M FLASH ;R14C GPNV_MIN_BUF_SIZE EQU 800h ;R14C GPNV_BLOCK_SIZE EQU 80h ;R14C DMI_GPNV_MAX_POOL_SIZE EQU DMI_MAX_POOL_SIZE - GPNV_MIN_BUF_SIZE ;R14C endif ;Flash_16K_8K_8K_Unit ;R14C endif ;P6_BIOS_ONLY ;R14C ;R14B end Event_Logo_Block_Size EQU 10h ;R14A Post_Error EQU 08h ;R14A Event_Log_Handle EQU 0h ;R14A endif ;DMI_GPNV_support ;R14 end DMI_TERMINATOR EQU 0FFFFh ; Terminator ;R12 start ;R16 ifdef SMBIOS_V21_Support ;R16 DMI_BIOS_REV EQU 21h ; DMI BIOS Major/Minor Rev (BCD) ;R16 ;R15 start ;R16 elseifdef SMBIOS_V22_Support ;R16 DMI_BIOS_REV EQU 22h ; DMI BIOS Major/Minor Rev (BCD) ;R16 ;R15 end ;R16 else ;SMBIOS_V21_Support ;R16 ;R12 end ;R16 DMI_BIOS_REV EQU 20h ; DMI BIOS Major/Minor Rev (BCD) ;R16 endif ;SMBIOS_V21_Support ;R12 DMI_SIGNATURE EQU '$DMI' ; DMI Signature DMI_SIGNATURE_SIZE EQU 4 DMI_INFO_SIZE EQU 4 MAX_STRUCTS EQU 0030h ; R01 - Reduce this value to save space ;R09 MAX_STRUCTURE_SIZE EQU 0080h ; R01 - Reduce this value to save space MAX_STRING_LEN EQU 80h ; DMI Function Numbers DFN_GET_DMI_INFO EQU 50h ; Returns DMI information DFN_GET_DMI_STRUCT EQU 51h ; Copies into buffer DFN_SET_DMI_STRUCT EQU 52h ; Copies from buffer DFN_GET_DMI_STRUCT_CHNG_INFO EQU 53h ; Returns DMI Structure Change Info DFN_DMI_CONTROL EQU 54h ; Controls a system action DFN_GET_GPNV_INFO EQU 55h ; Returns info about the GPNV DFN_READ_GPNV_DATA EQU 56h ; Reads the entire specified GPNV DFN_WRITE_GPNV_DATA EQU 57h ; Writes into the GPNV DFN_RESERVED EQU 58h ; Reserved Function DFN_CLEAR_STRUCTS EQU 59h ; For Internal Testing Only ; DMI Return Codes DMI_SUCCESS EQU 00h ; Function Completed Successfully DMI_UNKNOWN_FUNCTION EQU 81h ; Invalid function number DMI_FUNCTION_NOT_SUPPORTED EQU 82h ; Function is not supported DMI_INVALID_HANDLE EQU 83h ; Invalid handle DMI_BAD_PARAMETER EQU 84h ; Invalid parameter DMI_INVALID_SUBFUNCTION EQU 85h ; Invalid subFunction parameter DMI_NO_CHANGE EQU 86h ; No changed DMI structs pending DMI_ADD_STRUCTURE_FAILED EQU 87h ; Insufficient storage space DMI_BUFFER_TOO_SMALL EQU 8Ch ; Memory not larger enough DMI_READ_ONLY EQU 8Dh ; Structure field read-only DMI_LOCK_NOT_SUPPORTED EQU 90h ; Locking not supported DMI_CURRENTLY_LOCKED EQU 91h ; GPNV is already locked. DMI_INVALID_LOCK EQU 92h ; Invalid lock value ; DMI Control values SET_DMI_POOL EQU 0001h ; Set DMI Structure DONT_READ_IN_POOL EQU 0002h ; Use existing work buffer for Pool FORCE_UPDATE EQU 0004h ; Update POOL even if value hasn't changed R02 dmi_struct_hdr struc dmi_type db ? dmi_len db ? dmi_handle dw ? dmi_struct_hdr ends dmi_info_struct struc num_structs dw ? max_struct_size dw ? dmi_info_struct ends dmi_change_struct struc change_status dw ? struct_handle dw ? dmi_change_struct ends dmi_set_struct struc command db ? ; structure-setting to be performed field_ofs db ? ; starting offset of to-be-changed item change_mask dd ? ; ANDing mask for existing struct data change_value dd ? ; ORing mask for existing struct data data_length dw ? ; for add command, full length of struct struc_type db ? ; dmi struct type struc_len db ? ; length of formatted area struc_handle dw ? ; structure's handle dmi_set_struct ends COMMAND_HEADER_SIZE EQU offset struc_type ; DMI Set Structure Commands DMI_CHANGE_BYTE EQU 00h ; Change single byte DMI_CHANGE_WORD EQU 01h ; Change single word DMI_CHANGE_DWORD EQU 02h ; Change single dword DMI_ADD_STRUCT EQU 03h ; Add DMI Structure DMI_DEL_STRUCT EQU 04h ; Delete DMI Structure DMI_CHANGE_STRING EQU 05h ; Change single byte if DMI_BIOS_REV GE 22h ;R18 DMI_CHANGE_BLOCK EQU 06h ;R18 Change block of information DMI_RESERVED_CMD EQU 07h ;R18 All commands above and EQUal Reserved else ;R18 DMI_RESERVED_CMD EQU 06h ; All commands above and EQUal Reserved endif ;R18 ; DMI Get Structure Change Infromation DMI_SINGLE_STRUC_CHANGE EQU 03h ; Single DMI structure changed DMI_MULTIPLE_STRUC_CHANGED EQU 04h ; Multiple DMI structures have changed DMI_STRUC_ADDED EQU 05h ; DMI Structure Added ; DMI Control Subfunctions DMI_CLEAR_EVENT_LOG EQU 00h ; DMI_CONTROL_LOGGING EQU 01h ; ; DMI NVS (CMOS) Fixed Indexes DMI_CMOS_CHANGE_STATUS EQU 41h ; DMI_CMOS_STRUC_HNDL_BYTE0 EQU 42h ; DMI_CMOS_STRUC_HNDL_BYTE1 EQU 43h ; extrn F000_Shadow_W:Near ; R03 extrn F000_Shadow_R:Near ; R03 endif ;FLASH_SUPPORT ;R17 endif ;dmi_enabled ;R17